About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for signal integrity (SI) system design engineers who have a deep expertise in the SI area, and hold strong system level design knowledge This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Lead system signal integrity (SI) design for AI supercomputer product in the data center application. Collaborate with chip, package, boards, rack and system engineers, design partners to drive system SI design and develop innovative interconnect and high-speed technologies Identify and evaluate new technologies and methodologies to improve signal and power integrity in product design, and contribute to the development of new products and technology by providing expertise in signal integrity Perform simulation and modeling to identify and troubleshoot signal integrity issues Lead system interconnect design, bring up and qualification As the scope of the role and team grows, understand and influence roadmaps for hardware partners for our datacenter networks, racks, and buildings. You might thrive in this role if you: Have at least 10 years of industry experience, including experience design hardware system and SerDes testing for data center applications Have a strong bias toward action, and won’t take no for an answer. Have experience and good knowledge of system design experience in the SI areas, from chip, SerDes, board, rack level Have ex
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Role overview
Job description
Job Details:
Job Description:
In this role, you will lead cross-functional collaboration to advance circuit simulation and modeling capabilities for advanced foundry technologies.
Your responsibilities will include:
- Vendor collaboration: Partnering with EDA vendors to enhance and validate industry-standard simulation tools and design flows.
- Technology alignment: Working closely with technology leaders, VLSI physical design teams, and PDK teams to ensure simulation and modeling capabilities are aligned with roadmap needs.
- PDK readiness: Driving readiness of high quality simulation and modeling solutions so they are available in time for PDK delivery.
Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
- Bachelor’s degree in electrical engineering or computer engineering or related engineering discipline with 12+ years or master’s degree in electrical engineering or a related discipline and at least 10 years of industry experience in the semiconductor field; or Ph.D. in Electrical Engineering or a related discipline with a minimum of 8 years of industry experience in the semiconductor field.
- 5+ years supporting circuit simulation tools and working with circuit simulation vendors to develop solutions.
- 5+ years collaborating with EDA vendors on optimizing circuit simulation and modeling for advanced technology nodes.
- 3+ years of hands-on experience with BSIM or other compact models for transistor modeling at advanced nodes (e.g., FinFET, GAA).
- 5+ years of comprehensive understanding of compact modeling, simulation methodologies used by digital and analog designers, aging modeling and methodologies and modeling interfaces to simulation tools like OMI.
Preferred Qualifications
- Demonstrated experience in technical leadership and Proven capability to collaborate across multiple teams and geographies.
5+ years of experience in leading technical teams in the areas of simulation and modeling. - Exceptional leadership skills with focus on collaboration and finding solutions.
Job Type:
Experienced HireShift:
Shift 1 (United States of America)Primary Location:
US, Oregon, HillsboroAdditional Locations:
US, Arizona, PhoenixPosting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust
N/ABenefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $173,660.00-284,580.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.What they are looking for
Skills & requirements
Qualification
Bachelor’s degree in electrical engineering or computer engineering or related engineering discipline with 12+ years or master’s degree in electrical engineering or a related discipline and at least 10 years of industry experience in the semiconductor field; or Ph.D. in Electrical Engineering or a related discipline with a minimum of 8 years of industry experience in the semiconductor field
Hiring company
Intel
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