Hardware Platform Development Intern Jobs

About Graphcore Graphcore is a global leader in artificial intelligence computing systems. We design advanced semiconductors and data center hardware that provide the specialized processing power needed to advance AI while improving the efficiency required for broad adoption. As part of SoftBank Group, Graphcore belongs to a family of companies developing transformative technologies. Our AI Engineering Campus in Austin plays an important role in building the hardware platforms that support the next generation of AI systems. The Opportunity As a Systems Engineering Intern, you will contribute to projects that combine hardware, firmware, and software engineering for advanced AI compute platforms. You will work with experienced engineers on subsystem design, laboratory testing, system validation, automation, and performance analysis. The internship provides hands-on experience with modern hardware development and system-level engineering. You will own clearly defined technical tasks with guidance from the team and document your methods, results, and conclusions. What You Will Do Support the design and testing of CPU and high-speed input and output subsystems for advanced compute platforms. Run laboratory tests and measurements to help evaluate performance, power, signal behavior, and reliability. Contribute to system-level validation by creating scripts and tools that streamline testing, data collection, and analysis. Explore emerging input and output technologies, including PCIe 6.0 and 800G Ethernet, and learn how they support advanced computing workloads. Assist with investigations into platform power, cooling, and energy efficiency, including liquid-cooling systems for high-performance processors. Use power meters, oscilloscopes, logic analyzers, or comparable lab equipment under appropriate supervision. Analyze test results, identify unexpected behavior, and work with engineers to reproduce and investigate issues. Collaborate across hardware, firmware, software, m

About Graphcore Graphcore is a global leader in artificial intelligence computing systems. We design advanced semiconductors and data center hardware that deliver the specialized processing power needed to advance AI while improving the efficiency required for broad adoption. As part of SoftBank Group, Graphcore belongs to a family of companies developing some of the world’s most transformative technologies. Our new AI Engineering Campus in Austin will play a central role in building the future of AI computing. The Opportunity We are seeking a system validation engineering intern to help drive server blade and rack validation efforts for next-generation AI infrastructure hardware systems. This role focuses on post-silicon system validation across the full lifecycle of server hardware systems, ensuring functional and performance meets product objectives. You will help drive end-to-end blade and rack validation including development, execution, and debug while collaborating across silicon, firmware, systems, and platform teams. The Blade and Rack Validation team is responsible for ensuring system readiness and quality at scale. The team works cross-functionally with firmware, silicon, and system engineering teams to validate complex AI compute platforms. Type: 12-week summer internship Timing: May - August (exact dates to be confirmed) Commitment: Full-time What You’ll Do Help drive and execute post-silicon validation goals of AI compute blades and racks including testcase planning, development, and automation Help drive validation testcase execution and system debug against program achievements and report validation progress and risks. Drive provisioning and integration of system components (SoC FW, BMC, RMC, OS) for rack-level readiness Triage test failures, collect debug data, and collaborate on root cause analysis. Track validation coverage and continuously improve test processes and infrastructure. What You’ll Bring Working towards a Bachelor's

About Graphcore Graphcore is a global leader in artificial intelligence computing systems. We design advanced semiconductors and data center hardware that deliver the specialized processing power needed to advance AI while improving the efficiency required for broad adoption. As part of SoftBank Group, Graphcore belongs to a family of companies developing some of the world’s most transformative technologies. Our new AI Engineering Campus in Austin will play a central role in building the future of AI computing. The Opportunity As a Mechanical Engineering Intern, you will contribute to the mechanical design and thermal validation of advanced AI hardware. Working alongside experienced mechanical and thermal engineers, you will gain hands-on experience with 3D computer-aided design (CAD), laboratory setup, test development, prototype evaluation, and engineering documentation. Type: 12-week summer internship Timing: May - August (exact dates to be confirmed) Commitment: Full-time What You’ll Do Contribute to mechanical design activities using Creo or comparable 3D CAD software, including part modeling, assemblies, drawings, and design updates under the guidance of experienced engineers. Work with the thermal engineering team to develop test procedures and help set up laboratory capabilities for evaluating AI hardware. Support thermal and mechanical testing using appropriate laboratory equipment; collect, organize, and analyze test data. Assist the mechanical and thermal design teams with prototype evaluation, troubleshooting, design verification, and documentation of findings. Collaborate with cross-functional engineering partners, communicate progress and issues clearly, and follow applicable laboratory and safety procedures. What You’ll Bring Current enrollment in a bachelor's, master's, or doctoral program in mechanical engineering or a related discipline during the internship. Students in other disciplines with relevant mechanical engineering exper

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE We are seeking an FP&A Finance Specialist to support our International Sales organization across APJ, EMEA, and LATAM. This highly analytical role will focus on business intelligence, financial analysis, and reporting, providing value-added insights that support business performance and strategic decision-making. You will partner closely with Sales and Finance leaders to translate financial, pipeline, bookings, and operational data into actionable insights that inform go-to-market decisions. You will also own critical reporting, forecasting, and financial models, support effective expense and procurement management, and help scale Finance through process standardization and automation. WHAT YOU'LL DO Update and maintain weekly, monthly, and quarterly reports and analytics, providing insightful metrics that support go-to-market strategy development and measure the effectiveness of execution. Analyze business trends, customer buying patterns, pipeline, deals, and markets to provide actionable insights. Manage the end-to-end procurement lifecycle for EMEA and APJ by approving or refining PRs and POs. Ensure financial accuracy by correcting GL and accounting distributions, verifying the completion of service delivery, and resolving duplicate entries. Proactively address inquiries regarding approval status across Slack and email channels to maintain business velocity. Assist in building critical business and financ

By submitting your resume, you’re expressing interest in our 2027 RDSS (Research and Development Substitute Services) program. Please confirm your eligibility with the local district office before applying the role. NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU & SOC acts as the brains of computers, robots, and self-driving cars that can understand the world. We are looking for Design Validation Engineer in Taipei for board/system power qualification and function test, responsible for NVIDIA Data Center platform, Graphics board, ARM Based platform and Autonomous Driving Platform. If you're creative and autonomous, we want to hear from you! What you'll be doing: Server/Motherboard/Mobile system functionality test. Clock/Sequency/GPIO signal measurement and verification. WAT (wide area test) function test. Gaming test. High/Low speed interface SI test. Co-work with hardware design engineers on debug and FA. Co-work with mechanical/thermal engineers for cooler/heatsink design. What we need to see: Masters degree in EE, computer science, or relative majors. Proficient with Linux system and GPU setup. Capable of writing simple shell scripts and analyzing test results using commands. Familiar with PC and Datacenter system hardware assembly, MB BIOS upgrade, and network troubleshooting Proficient with a programming language (C/C++, Python, Java, or Perl) Understand UEFI boot OS startup process and out-of-band (

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role As a Hardware Chips Programs Manager at OpenAI, you will help bring our chips hardware roadmap to life, navigating an array of technical and partnership challenges. We’re looking for people excited to push the frontiers of computing by navigating technical explorations and are passionate about building. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Manage the design and implementation planning of our ML acceleration hardware, working across technical, cross-functional and external stakeholders Lead planning and scheduling of chip hardware designs with our strategic partners and vendors Coordinate and marshal internal resources and communication for efficient interaction with partners and vendors. You might thrive in this role if you: Have experience as a technical program manager for data center hardware products (server, GPU, TPU, networking, storage and so on) Know the whole end-to-end system program management from concept, design, production, deployment into the data center Have some experience with System SW programs through NPI Want to help design some of the world’s largest supercomputing systems, working at the edge of complex hardware challenges Enjoy working with and enabling world-class AI Researchers and Engineers Are passionate about the technical program function, and enjoy independently owning and delivering on your tea

Who we are About Stripe Stripe is a financial infrastructure platform for businesses. Millions of companies—from the world’s largest enterprises to the most ambitious startups—use Stripe to accept payments, grow their revenue, and accelerate new business opportunities. Our mission is to increase the GDP of the internet, and we have a staggering amount of work ahead. That means you have an unprecedented opportunity to put the global economy within everyone’s reach while doing the most important work of your career. About the team Stripe Terminal helps businesses extend their online presence into the physical world. Our mission is to make it as easy for businesses to accept in-person payments as Stripe has made it to accept payments online. Terminal provides an integrated in-person payments platform spanning software, payment processing, device fleet management, and hardware. Our hardware portfolio includes Stripe-designed readers and accessories as well as devices from third-party hardware partners. Together, these products enable businesses to build reliable, differentiated in-person payment experiences across a broad range of use cases, countries, and operating environments. What you’ll do We’re looking for an experienced Product Manager to build the strategy, development, and expansion of Terminal’s hardware portfolio. This role will work across both first-party and third-party hardware, helping define the multi-year roadmap for the devices, accessories, and partner ecosystem that power Terminal. You will partner closely with hardware engineering, firmware and software engineering, design, operations, logistics, partnerships, sales, finance, legal, and regional teams. This is a highly cross-functional role for someone who can connect customer needs, technical constraints, business strategy, and execution across user experience, device capabilities, cost, quality, reliability, supply, and time to market. Responsibilities Set and execute a multi-year strategy and ro

ABOUT THE ROLE You will be joining a company that creates positivity, community, and fitness with technology. You will work in the PMO organization under Hardware Engineering Program Management. You will be responsible for leading HW NPI programs through the development cycle from charter to MP. This role is located in New York and will work with teams located in Seattle and Asia. Frequent travel to Seattle & Asia is required for this role. YOUR DAILY IMPACT AT PELOTON You will work with leads from Hardware Engineering, Product, Quality, SW, PMO, and Operations to create detailed and comprehensive program plans across a specific platform Plan and lead weekly executive level updates Establish a comprehensive program schedule with all dependencies, with identified critical paths at each stage of the program Maintain, track and update program level risks, mitigation plans, upcoming milestones, and team priorities while also ensuring cross functional alignment and agreement on those areas Coordinate and facilitate solutions to mitigate risks, keep projects on track Build and maintain platform budget Plan and execute Engineering builds successfully including managing build plan, Build Matrix, and Clear To Build YOU BRING TO PELOTON Bachelor's degree in Engineering, Business Administration or equivalent 5+ years experience with Hardware Program Management Experience in working with international suppliers and ODM’s Managed multiple product development cycles for a hardware complex system with cross functional dependencies Leadership skills and ability to influence and inspire team members Excellent communicator with the ability to translate complex technical issues or ideas to a wider audience Able to foster and build a collaborative working relationship with various stakeholders Very Strong analytical, problem solving and planning skills. Well organized Self-motivated, action-driven and biased towards results, and has a strong sense of ownership. Works well in a fast

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. Join forces with us on our mission to build a better IT industry. We are currently looking for a highly skilled Android BSP Engineer to our team in Stockholm or Malmö, Sweden. Please note that applicants must live in Sweden and hold a valid work permit at the time of application to be considered for this role. Responsibilities: Bring up Android on new custom hardware, from initial kernel boot through a fully functioning Android system Develop and customize the Android platform and board support package Configure and maintain the Linux kernel, device tree, boot configuration, and Android device configuration Integrate the Android software stack with custom hardware Integrate, port, develop, and maintain drivers and interfaces for RFID readers, sensors, and other peripherals Develop and integrate Android HALs, native services, system services, and application-facing APIs Configure Android init services, device permissions, SELinux policies, and VINTF manifests Diagnose problems across the bootloader, kernel, drivers, HALs, Android framework, and applications Debug hardware and software integration issues using logs, traces, test equipment, and hardware-debugging tools Optimize boot time, system performance, stability, power consumption, and reliability Build, configure, flash, and maintain Android system images Support system valid

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent builds AI and RISC-V compute hardware that requires best-in-class design tools and intellectual property to compete globally. The Sr. Strategic Sourcing Manager, Engineering Infrastructure leads procurement strategy for the design ecosystem, owning vendor negotiations, IP licensing agreements, and tool sourcing that enable our worldwide engineering teams to innovate at speed. The role suits someone who takes ownership of complex, multidimensional deals, operates independently with minimal oversight, and commands credibility with vendor executives, internal stakeholders, and the C-suite. This role is hybrid or remote, based out of Santa Clara, CA; Austin, TX or Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A strategic negotiator with 5+ years of experience sourcing complex technology (IP, design tools, or semiconductor components) in fast-paced environments Someone who builds trust-based vendor relationships and leverages them to unlock better terms, faster delivery, and innovative solutions A detail-oriented operator who thrives managing multiple concurrent deals while maintaining executive visibility and cross-func

Who We Are Nuro believes self-driving vehicles are the most immediate and profound opportunity for AI to drive positive change in the physical world. Safer streets, more time for what matters, and easier access to the world around us, that’s why we’re building a universal autonomy platform: self-driving for all roads and all rides. Founded in 2016, Nuro is a physical AI company developing Level 4 autonomous driving technology for a wide range of vehicles, use cases, and markets. Powered by the Nuro Driver™, our universal autonomy platform enables the global mobility ecosystem to deploy autonomy at scale, from robotaxis and logistics fleets to personal vehicles. With years of real-world deployment experience and a flexible, partner-led business model, Nuro is working toward a future where millions of autonomous vehicles powered by our technology help make everyday life safer, easier, and more connected. Nuro has raised over $2B in capital from Uber, NVIDIA, Google, Softbank, Fidelity, T. Rowe Price, and other leading investors. About the Team Our hardware team is growing and we are looking for a Senior Electrical Engineer to help lead our programs in our mission to better everyday life through robotics. The EE Modules team is a motivated group with a deep commitment to safety, performance, and reliability, which we apply to all of our projects and programs. About the Role As a Senior Electrical Engineer, you will help lead a talented cross functional team through full product lifecycles and engagement models ranging from in-house design to ODM and Tier1 projects with domestic and international partners. Our designs include sensors, vehicle controls, bleeding edge AI powered compute and anything our teams need in our journey toward a driverless world. About the Work Champion the specification, development, validation, and deployment of state-of-the-art AI hardware in Nuro's self-driving stack and support infrastructure. Drive module and system level electrical design

About Stripe Stripe is a financial infrastructure platform for businesses. Millions of companies—from the world’s largest enterprises to the most ambitious startups—use Stripe to accept payments, grow their revenue, and accelerate new business opportunities. Our mission is to increase the GDP of the internet, and we have a staggering amount of work ahead. That means you have an unprecedented opportunity to put the global economy within everyone’s reach while doing the most important work of your career. About the team Stripe Terminal helps Stripe users extend their online presence into the physical world. The Terminal team’s mission is to make it as easy for businesses to accept in-person payments as the Stripe API has done for online payments. With Terminal, businesses can unlock in-person payments use cases that are right for their business model—whether it’s creating a flagship retail experience, extending their website to a pop-up store, or enabling a mobile point-of-sale at their next event. What we are looking for: As an Android BSP Engineer, you will be responsible for the kernel and driver level system development, which includes building, troubleshooting, and writing automated tests for the Android system on our embedded payments platforms. This team works closely with partner teams throughout the hardware and software product lifecycle, from hardware manufacturing to Android app teams. We also work with external vendors on part selection and initial hardware bring-up. What you’ll do: Bring up new devices and lead debugging and performance tuning exercises that span multiple hardware/firmware/software teams. Design, implement, and maintain drivers and Android services that operate efficiently in a constrained environment and meet the reliability and security requirements of the industry. Own the definition of one or more work streams focused on hardware bring-up, peripheral drivers and communication, and power and performance management and opti

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are seeking an experienced SoC Architect to lead the definition and development of next-generation custom AI silicon for edge deployments. This role will be responsible for shaping the architecture of highly efficient, high-performance SoCs optimized for machine learning inference and on-device intelligence. You will work cross-functionally with internal engineering teams and external ecosystem partners to translate product requirements into scalable silicon solutions, driving execution from concept through delivery. In this role you will: Define the architecture and technical roadmap for custom SoCs targeted for edge applications. Drive system-level tradeoff analysis across compute, memory, interconnect, power, thermal, and cost constraints. Architect energy-efficient ML compute subsystems optimized for inference workloads and real-world deployment environments. Collaborate with internal hardware, software, systems, and product teams to align architecture with platform needs. Partner with external silicon vendors, IP providers, and manufacturing partners to execute development plans. Lead hardware/software co-design efforts to maximize performance per watt and end-to-end system efficiency. Guide implementation teams through microarchitecture, RTL development, validation, and bring-up phases. Operate effectively in agile development environments and help teams deliver against aggressive schedules and milestones. You might thrive in this role if: Proven exper

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE Everpure is seeking an experienced program manager to lead a high-visibility strategic initiative spanning across the tech ecosystem. Reporting to the Head of Business Operations, India, you will establish and run these programs to deliver local value and global visibility. WHAT YOU'LL DO 1. Build and scale the Everpure’s first Startup Engagement Initiative: Operationalize the initiative by collaborating across VCs and startup incubators Imagine and develop offerings to accelerate growth and adoption and innovate avenues for co-development Collaborate with Everpure’s Corporate VC team to identify partnership, investment, or acquisition opportunities. Lead founder relations, launch events, community programming, and all PR/comms related to these initiatives. 2. Run Customer Collaboration hub Operationalize a platform for global customer connects with Everpure’s product organization Own the engagement, including in-person forums, virtual progress check-ins, platform-topic sessions, roundtables, and targeted use-case deep dives. Drive for high quality results by coordinating structured pre-work with account teams and internal stakeholders to tailor agendas to customer priorities and business context. Manage membership commitments, renewal reviews, program-health reporting, privacy and transcription consent, and other operating controls. WHAT YOU BRING You are a highly self motivated individual with excep

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE Team lead for a group of engineers with responsibility for Linux and VMWare initiator stack behavior as well as Fibre Channel and NIC drivers on Pure storage array. WHAT YOU'LL DO The Kernel and Driver development team is responsible for several areas Working for a team that deals primarily in various storage area network protocols such as Fiber Channel and Ethernet. On the initiator side, the team will be responsible for Linux initiator behavior attached to Flasharray. Focus is on NVME (ROCE, FC, TCP/IP) but also includes FC-SCSI (FCP) and iSCSI interfaces. This includes software development/fixes for Linux initiator stack, debugging initiator problems, and creating compatibility documents for Purity. For VMWare, focus is on debugging issues with VMWare as an initiator, and creating compatibility documentation. For FibreChannel and NIC Drivers, focus is responsibility for FC-SCSI driver stack for storage side and responsibility for NIC drivers on networking side. This includes responsibility for related code, utilities, enhancements supporting RAS, as well as debugging failures found internally and in the field. Maintain Linux kernels for internal testing Documenting supported configurations for customers Responsibility for evaluating Linux initiator behavior and optimizing for Pure Storage Flasharray. This includes correctness as well as optimizing for performances. Will contribute bug fixes and enhancemen