Design Methodology in Singapore

ABOUT CUBIST Cubist Systematic Strategies, an affiliate of Point72, deploys systematic, computer-driven trading strategies across multiple liquid asset classes, including equities, futures and foreign exchange. The core of our effort is rigorous research into a wide range of market anomalies, fueled by our unparalleled access to a wide range of publicly available data sources. ROLE Dynamically managing portfolio risk by evaluating historical and real-time strategy performance. Overseeing automated trade execution and monitoring transaction costs. Supervising a small team of researchers and developers on a daily basis. Designing, researching, and managing sophisticated investment strategies by creating and engineering advance quantitative financial computer modeling systems to aid in analysis and research. Performing research to acquire historical and production data sources needed to build investment models. Designing and developing quantitative mathematical algorithms to link the diverse data sets from various providers. Engineering investment models that will make the buy and sell recommendations for the portfolios using advanced quantitative mathematic statistics and investment theory to design and program strategies that explicitly forecast risk, return, and trading costs. Using quantitative models to value securities. Conducting ongoing, cutting-edge quantitative research and analysis to enhance existing strategies and to expand into new markets. Developing aspects of successful statistical models, focusing on forecasting and optimization. Expanding trading universe and volume and expanding to other exchanges and products. REQUIREMENTS Advance degree (Masters or Ph.D.) in a computational or analytical field. Minimum of 10 years’ experience developing, researching or implementing quantitative models for equities, futures and/or FX. Hands on experience with all aspects of the research process, including methodology section, data collection and analysis, testing,

Create learning experiences that challenge leaders, inspire action and transform workplaces. As a senior learning and development consultant at Gallup, you’ll bring our research and advice to life by delivering transformational learning experiences, coaching leaders and partnering with clients to design learning journeys that address their most important workplace challenges. What You’ll Do Build trusted relationships with clients to uncover business challenges and determine learning and development opportunities Deliver Gallup’s research-based curriculum through compelling virtual and in-person experiences that help leaders, managers and individual contributors build thriving workplaces and improve performance Facilitate standard Gallup curriculum Configure existing curriculum to address unique client needs Create new learning content when the situation calls for it Coach and advise clients through individual sessions, post-course coaching and longer-term coaching journeys Master Gallup’s research, analytics and methodologies and translate complex findings into clear, relevant insights Share expertise and collaborate thoughtfully across internal teams with the responsiveness, foresight and follow-through needed to elevate client experiences and team performance Who We Want Executive-level facilitators who command a room with credibility, energy and confidence and turn learning experiences into engagements clients want to repeat Trusted advisers who ask insightful questions, quickly uncover what clients really need and confidently challenge thinking Versatile creators who know when to use proven curriculum, reconfigure what already exists or customize fresh learning content Driven partners who take ownership, move with urgency and make decisions with clients and teams in mind Agile learners who absorb complex research and methodologies quickly, think analytically, and embrace and apply feedback AI-curious consultants who use emerging tools such as AI while maintaini

About the Team: OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are seeking a Manufacturing Test Engineer to own and drive manufacturing test strategy, development, and execution for complex AI hardware systems. This role will define and implement test coverage across the product lifecycle, including ICT, functional circuit test, tray-level functional test, and system manufacturing test. You will work closely with hardware design engineering, diagnostic/software teams, manufacturing engineering, quality, and external system integrators and suppliers to translate product requirements into robust, scalable, and production-ready test solutions. You will also play a key role in reviewing test data, debugging failures, improving yield, and ensuring manufacturing test readiness from early development through volume production. In This Role, You Will: Define and drive the manufacturing test strategy for boards, trays, and system-level hardware assemblies across EVT, DVT, PVT, and production ramp. Develop and manage test coverage for: ICT / structural test FCT / board-level functional test Tray-level functional and integration test System-level manufacturing and bring-up test Partner closely with electrical engineering, system engineering, and diagnostic/software teams to define test requirements, review manufacturing test scripts and diagnostics, validate failure isolation needs, debug hooks, logging, and production screening strategies. Translate engineering requirements into practical, scalable manufacturing test plans that

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for a product manufacturing engineer, who will be responsible for driving technical initiatives related to manufacturing to ensure product success from concept to launch and through mass production with a specific focus on PCB and PCBa manufacturing and process. You’ll have the opportunity to work with a wide range of stakeholders, from design engineering and operations teams,TPMs, external industry vendors and partners to ensure that all products are developed and delivered on time and to the highest quality standards. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: In this role, you’ll be responsible for driving manufacturing and quality initiatives to ensure product success from concept to launch Lead the product design and the manufacturing process for next-gen AI hardware system development, you will have the opportunity to work with a wide range of stakeholders, from design engineering and operations teams, TPMs and external industry vendors and partners to ensure that all products are developed and delivered on time and to the highest quality standards. Lead the team to establish NPI product manufacturing process, systems and quality controls, defining clear milestones and deliverables, drive internal process improvements across multiple terms and functions Provide hands-on product manufacturing analysis during desi

NAND Design Rule Manager — Fab 10N/X, Singapore. Apply via Workday.

Staff Design Engineer - SOC — Singapore. Apply via Workday.

NAND PI Design Rule Snr Engineer — Fab 10N/X, Singapore. Apply via Workday.

Engineer - HIG HBM - PE Design Validation — Fab 10A, Singapore. Apply via Workday.

E5_MTS_SMTS NAND Design Rule Engineer in Process Integration — Fab 10N/X, Singapore. Apply via Workday.

Engineer - HIG HBM - PE Design Validation — Fab 10A, Singapore. Apply via Workday.

Engineer - HIG HBM - PE Design Validation — Fab 10A, Singapore. Apply via Workday.

Senior Analog Design Engineer — Singapore. Apply via Workday.

Senior Engineer, NAND Silicon Design Validation — MSB, Singapore. Apply via Workday.

ENGINEER, NAND SILICON DESIGN VALIDATION — MSB, Singapore. Apply via Workday.

Senior/Engineer, NAND Wafer Level Reliability & Design — Fab 10N/X, Singapore. Apply via Workday.