Returns Specialist 1 in Austin

Customer Quality & RMA Engineer Job Description POSITION OVERVIEW COMPANY OVERVIEW Infinitum Electric is a technology company pioneering the next generation of axial flux electric motors — lighter, more efficient, and more sustainable than conventional motor designs. Our motors are deployed in mission-critical applications for leading customers including hyperscale data center operators and industrial OEMs. As we scale rapidly in revenue, our Quality function is the backbone of customer trust and product integrity. POSITION SUMMARY The Customer Quality & RMA Engineer serves as the primary technical interface between Infinitum and its customers on all quality-related matters — including field complaints, warranty returns, RMA processing, corrective action management, and customer-facing quality reporting. This role owns the complete RMA lifecycle from customer notification through root cause resolution and verified closure, and is responsible for ensuring that every customer quality event is investigated with rigor, communicated with transparency, and resolved permanently. KEY RESPONSIBILITIES RMA Management & Field Complaint Resolution Own the end-to-end RMA process — from initial customer notification through receipt, inspection, root cause analysis, corrective action, and verified closure Triage and prioritize incoming field complaints and warranty returns based on customer impact, failure mode severity, and strategic account importance Conduct or coordinate physical inspection and failure analysis of returned motors and assemblies Maintain accurate, real-time RMA tracking data including cycle time, failure mode distribution, and cohort maturity trends Communicate RMA status, findings, and corrective actions to customers in a professional, timely, and technically credible manner Drive RMA rate reduction through systemic root cause analysis and closed-loop corrective action — targeting the structural elimination of recurring failure modes Custome

Principal Embedded SW/FW Engineer (Bringup) - Austin, Tx, USA Job Summary We have an exciting opportunity to be part of a collaborative, cross-functional development team validating cutting-edge, high-performance AI chips and platforms. You will play a key role in supporting new product introductions and post-silicon validation. Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to provide technical guidance to other engineering team members. In this role, you can leverage our experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes. The Team The Post-Silicon Bringup team sits within the Architecture and Validation team, we are responsible for bringup and validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and supporting the Silicon Characterisation team. Responsibilities and Duties Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon Deploy silicon validation tests on first silicon and debugging them Develop automated test framework and regression test suites in Python to optimize validation efficiency Collaborate closely with engineers from many other disciplines on a variety of topics Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies Analyse test results, identify and debug failures/defects Contribute to shared test and validation infrastructure Provide feedback to architects Candidate Profile Essential: Understanding of ML

1671 About the Role We are seeking a Senior Signal Integrity Engineer to develop, validate, and optimize high-speed signaling solutions across blade- and rack-level architectures for advanced compute platforms. This role sits at the intersection of silicon, package, interconnect, board, and system design , with a strong emphasis on hands-on measurement, simulation correlation, and cross-functional technical communication. Key Responsibilities End-to-end signal integrity analysis for blade- and rack-level system architectures. Analyze and optimize high-speed and low-speed I/O interfaces, including PCIe Gen4/5/6, Ethernet, DDR, SerDes, SPI , I2C, etc . and related interconnects. Perform time-domain and frequency-domain simulations using tools such as Ansys HFSS, Keysight ADS, Cadence Sigrity, CST, SPICE , or similar. Support hands-on lab validation using VNA, TDR, BERT, and high-speed oscilloscopes . Correlate simulation results with lab measurements to identify margin gaps, debug issues, and improve design methodology. Collaborate with silicon, package, board, connector, cable, and system design teams to optimize I/O channel performance. Work with interconnect vendors and ODMs to guide board layout, stack-ups, routing rules, and system design decisions. Review schematics, layouts, simulation results, and validation data for blade, backplane, and rack-level hardware. Prepare and communicate clear validation reports, measurement summaries, debug findings, and technical recommendations to internal teams, vendors, and senior technical stakeholders. Required Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field . Strong experience in signal integrity for high-speed digital systems. Hands-on measurement expertise using VNAs, TDRs, BERTs, and high-speed oscilloscopes . Experience measuring and analyzing S-parameters, impedance profiles, eye diagrams, jitter, timing margins, insertion loss, return loss, and cro