Senior Debug Validation Engineer in United States

Power and Performance Validation Engineer About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to senior leadership within Architecture and Validation, the Power and Performance Validation Lead will drive validation strategy and execution for advanced AI compute silicon and systems. The role is responsible for leading power, thermal and performance validation activities across pre-silicon and post-silicon environments to ensure products meet efficiency, reliability and scalability expectations. This role requires strong technical expertise and collaboration across multiple engineering disciplines to deliver robust validation methodologies, scalable automation frameworks and actionable performance insights. The Team The Power and Performance Validation team sits within the Architecture and Validation organisation and is responsible for validating the performance, efficiency and thermal behaviour of Graphcore silicon and systems. The team supports the full product lifecycle, from early architectural modelling through to first silicon bring-up, characterization and production readiness. Engineers work closely with cross-functional teams globally to debug compl

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of a best-in-class family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from a diverse group of backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are seeking a senior validation lead engineer to lead at-scale rack validation efforts for next-generation AI hyperscale systems. This role focuses on post-silicon system validation across the full lifecycle, ensuring functional, electrical, and thermal performance meets product objectives. You will own end-to-end blade and rack validation including planning, development, execution, and debug while collaborating across firmware, systems, and hardware teams. The Team The Rack Validation team is responsible for ensuring system readiness and quality at scale. The team works cross-functionally with firmware, silicon, and system engineering teams to validate complex AI compute platforms. Responsibilities and Duties Lead post-silicon validation of AI compute blades and racks including test planning, development, and automation. Drive provisioning and integration of system components (SoC FW, BMC, RMC, OS) for rack-level readiness. Own execution against program achievements and report validation progress and risks. Triage test failures, collect debug data, and collaborate on root cause analysis. Track

NVIDIA has been redefining computer graphics, desktop gaming, and enhanced computing capabilities for more than 25 years. Today, we are tapping into the unlimited potential of AI to define the next era of computing. As a NVIDIAN, you will work on problems that sit at the boundary of architecture, silicon, firmware, software, and production, where strong judgment matters as much as technical depth. We're the Silicon Design for Productization (DFP) Team, within the broader Silicon Co-Design Group, and we turn power and thermal design into executable productization methodology. Power and thermal are among the most complicated problems we work on at NVIDIA because they sit at the intersection of architecture, workload behavior, silicon variation, firmware policy, platform constraints, and product goals. Small decisions here have an outsized impact on performance, efficiency, reliability, bring-up speed, and ultimately what the product can deliver in the field. We define how features move from concepts to bring-up, characterization, validation, and release. In this role, you will help us build that bridge. We're looking for an engineer who reasons from first principles, flourishes with ownership in a fast-paced environment, and uses AI with sound judgment. What you’ll be doing: Lead the effort across multi-functional teams to keep the program’s power and thermal productization strategy clear, executable, and on track. Create methodology and silicon test plan based controller designs and architecture, including characterization process, debug tools, fuse/firmware settings and lab requirements. Drive resolution for challenging silicon issues through structured hypotheses, measurement plans, and root-cause closure. Steward the Power and Thermal playbook when the existing productization methodology

The DFP Engineer – Manufacturing role defines and implements the validation and screening of new silicon features within high‑volume manufacturing flows. You will translate product requirements into executable test methodologies, infrastructure, and detailed manufacturing test plans that ensure quality, yield, and efficiency at scale. This role sits at the intersection of multiple multi-functional teams to make manufacturing test an outstanding part of the overall codesign and DFP lifecycle. What you will be doing: Own end-to-end manufacturing test methodology across all test stages. Translate system specs and product POR into DFP requirements, test content, coverage, and flows. Define and maintain the DFP roadmap, including infrastructure and turning point planning. Partner multi-functionally to implement test content, debug hooks, and coverage improvements. Drive alignment on manufacturability, test time, binning strategies, and cost vs. coverage trade-offs. Embed testability requirements into design to enable robust screening and debug. Define data and analytics frameworks to support yield analysis and continuous improvement. Lead DFP documentation as the single source of truth and feed findings into future methodologies. What we need to see: MS in Electrical Engineering, Computer Engineering, or related field (or equivalent experience) 6&#43; years in silicon post‑silicon validation and/or high‑volume manufacturing test for complex SoCs, GPUs, CPUs, or similar. Hands‑on experience with test content bring‑up, limit setting, correlation to characterization, and yield/coverage optimization. Proficiency with scripting and data analysis (e.g., Python, MATLAB, R, SQL) for test data analytics, limit tuning, and yield/debug analysis. <

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are looking for an experienced System Level Test Engineer to join our Product Test and Diagnosis Department (PTD). In this role, you will contribute to the development and deployment of System Level Test (SLT) solutions for next-generation AI processors. Working closely with hardware, software, validation, and manufacturing teams, you will develop test content, automation, diagnostics, and characterization capabilities that support silicon bring-up, yield learning, and manufacturing deployment. The ideal candidate will have strong technical foundations in semiconductor test and validation, excellent debug skills, and a passion for improving product quality and manufacturability. The Team The Product Test and Diagnostics team’s role is to detect and manage hardware defects that arise from the manufacture and use of our products. This covers chips, boards and finished systems and takes place both in the manufacturing sites and in the field. Responsibilities and Duties Develop and maintain SLT test content, automation, d

We are seeking a highly skilled and hard-working Senior Test Developer / test engineer to join our multifaceted Enterprise Software QA team. This role offers an outstanding opportunity to leave your mark on the design, construction, optimization and testing of large-scale infrastructure for various foundational NVIDIA unified cloud services and data center offerings. If you are a dedicated engineer with strong expertise in cloud infrastructure and distributed systems and want to apply your skills with AI tools, this role could fit you perfectly. You will thrive in an exciting, innovative environment. What you'll be doing: Work with development teams on test plans for all layers of SW stack for cloud infrastructure, execution, reviews, failure analysis and assessing overall quality and risk. Work with customer PMs on software issues including technical feedback from OEMs and CSPs. Develop key benchmarks to track execution and deploy process improvements to improve efficiency Leverage AI skills to expedite the test scope, test plan, execution and automation workflows. Lead NVIDIA Cloud and Data Center bring up activities which will involve validation, reporting, working with engineering to debug issues, providing design input at times, adding coverage in different areas. Design, develop and maintain CI/CD pipelines for continuous testing in cloud environments when needed. Perform performance, scalability, and reliability testing of cloud services. Implement and maintain test environments in cloud platforms such as AWS, Azure, or Google Cloud. Supervise the infrastructure to alert on significant events, ensuring the highest level of system performance and reliability. Work with various different partner teams to ensure availability of clusters to test on and take the lead in resolve all issues. Working with tea

1671 About the Role We are seeking a Senior Signal Integrity Engineer to develop, validate, and optimize high-speed signaling solutions across blade- and rack-level architectures for advanced compute platforms. This role sits at the intersection of silicon, package, interconnect, board, and system design , with a strong emphasis on hands-on measurement, simulation correlation, and cross-functional technical communication. Key Responsibilities End-to-end signal integrity analysis for blade- and rack-level system architectures. Analyze and optimize high-speed and low-speed I/O interfaces, including PCIe Gen4/5/6, Ethernet, DDR, SerDes, SPI , I2C, etc . and related interconnects. Perform time-domain and frequency-domain simulations using tools such as Ansys HFSS, Keysight ADS, Cadence Sigrity, CST, SPICE , or similar. Support hands-on lab validation using VNA, TDR, BERT, and high-speed oscilloscopes . Correlate simulation results with lab measurements to identify margin gaps, debug issues, and improve design methodology. Collaborate with silicon, package, board, connector, cable, and system design teams to optimize I/O channel performance. Work with interconnect vendors and ODMs to guide board layout, stack-ups, routing rules, and system design decisions. Review schematics, layouts, simulation results, and validation data for blade, backplane, and rack-level hardware. Prepare and communicate clear validation reports, measurement summaries, debug findings, and technical recommendations to internal teams, vendors, and senior technical stakeholders. Required Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field . Strong experience in signal integrity for high-speed digital systems. Hands-on measurement expertise using VNAs, TDRs, BERTs, and high-speed oscilloscopes . Experience measuring and analyzing S-parameters, impedance profiles, eye diagrams, jitter, timing margins, insertion loss, return loss, and cro

We are developing advanced multi-rack, multi-tenant AI/ML datacenters with NVIDIA GB200, and upcoming GB300 GPUs. NVIDIA seeks a Senior Software Engineer for our CSP (Cloud Service Provider) Engagements team to focus on the cloud-native stack for datacenter products like GB200. In this role, You will define customer workflows, prototype stack enhancements, and debug the toughest Kubernetes &#43; Slurm issues in multi-rack, multi-tenant AI datacenters. You'll tackle complex scheduling challenges across racks, tenants, and clouds as part of the CSP engagements team. What you’ll be doing: Perform deep-dive debugging of multi-rack, multi-tenant clusters: scheduler behavior, container runtime issues, device-plugin crashes, RDMA/IB fabric anomalies, etc. Gather customer requirements and prototype feature extensions for Kubernetes operators, Slurm plugins, and custom micro-services that expose new GPU capabilities. Drive joint architecture reviews and “whiteboard” sessions with CSP and internal platform teams; convert findings into RFCs and upstream pull requests. Create reproducible testbeds (Helm/Ansible/Terraform) that mirror customer environments; automate validation and benchmark suites. Deliver technical collateral-design docs, how-to guides, demo scripts-and present at customer on-sites, KubeCon, and SlurmUG. Collaborate with AE, FAE, and Solution Architect teams to deliver integrated customer solutions and technical documentation. What we need to see: Strong source-level expertise in Kubernetes internals (scheduler, CRI/CNI/CSI, operators) and Slurm (federation, power-save, plugins). Hands-on experience integrating next-gen GPUs (Blackwell/GB200/GB300) or comparable accelerators into containerized clusters. Proven track record debugging large-scale, cloud-native stacks across ne

NVIDIA's Silicon Co-design Group (SCG) sits at a rare intersection: we own the full product development lifecycle, from early architecture definition through silicon bringup to product release. Our ArchDev team is the hub for silicon and system-level feature development, driving tradeoff analysis, system integration, and POR alignment across the entire organization. If you want to see your work go from whiteboard to world-class silicon, this is where that happens. What You'll Be Doing: Architect and integrate system-level performance and power management features, controllers, and policies to optimize product efficiency across datacenter and client products . Build feature roadmaps to address low-power, low-noise, and performance-per-watt product needs through prototyping, use-case analysis, and cost/benefit trade-offs. Partner with architecture, ASIC, board/platform, software/firmware, and marketing teams to drive design decisions and debug complex issues. Track industry trends and market needs and translate them into forward-looking roadmaps that keep NVIDIA's products ahead of the curve. Lead debug efforts, develop workarounds, and support bringup , validation, manufacturing, and customer escalations. What We Need to See: <

Healthcare is complex. We’re here to change that. RVO Health is a health technology company on a mission to make health easier to navigate, more accessible, and more affordable for everyone. Here, you'll help over 40 million people every month, with a team that genuinely cares about the work and each other. AT A GLANCE The Senior Software Engineer is a crucial role within our organization, requiring work in various capacities and adaptation to different work arrangements based on the needs set by the business. The successful candidate will be responsible for fulfilling their job duties in the following work situations: Where You'll Be Location: Denver, CO | Hybrid We believe great collaboration happens when we're together, solving problems, learning from each other, and connecting as a team. That's why we’re in our offices Tuesday through Thursday each week. You are welcome to work remotely Mondays and Fridays if you wish. Address: 1801 California St. Denver, CO 80202 What You’ll Do Lead the end-to-end design, development, and implementation of sophisticated software applications and systems aligned with business goals. Collaborate closely with stakeholders including product managers, designers, and other engineers to gather requirements and translate them into robust technical designs and solutions. Write high-quality, efficient, maintainable, and scalable code adhering to best practices and company standards. Debug, analyze, and resolve complex software defects and performance bottlenecks to ensure optimal system reliability and user experience. Conduct comprehensive testing and validation including unit, integration, and performance testing to guarantee software quality. Mentor and provide technical guidance to junior and mid-level engineers, fostering professional growth and knowledge sharing. Perform thorough code reviews to maintain high code quality, enforce coding standards, and promote best p

Healthcare is complex. We're here to change that. RVO Health is a health technology company on a mission to make health easier to navigate, more accessible, and more affordable for everyone. Here, you'll help over 40 million people every month, with a team that genuinely cares about the work and each other. AT A GLANCE The Senior Software Engineer is a crucial role within our organization, requiring work in various capacities and adaptation to different work arrangements based on the needs set by the business. Where You'll Be Location: Denver, CO | Hybrid We believe great collaboration happens when we're together, solving problems, learning from each other, and connecting as a team. That's why we're in our offices Tuesday through Thursday each week. You are welcome to work remotely Mondays and Fridays if you wish. Office Address: 1801 California St. Denver, CO 80202 What You’ll Do Lead the end-to-end design, development, and implementation of sophisticated software applications and systems aligned with business goals. Collaborate closely with stakeholders including product managers, designers, and other engineers to gather requirements and translate them into robust technical designs and solutions. Write high-quality, efficient, maintainable, and scalable code adhering to best practices and company standards. Debug, analyze, and resolve complex software defects and performance bottlenecks to ensure optimal system reliability and user experience. Conduct comprehensive testing and validation including unit, integration, and performance testing to guarantee software quality. Mentor and provide technical guidance to junior and mid-level engineers, fostering professional growth and knowledge sharing. Perform thorough code reviews to maintain high code quality, enforce coding standards, and promote best practices across the team. Continuously improve software development processes, tools, and methodol

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Engineer at Micron’s HBM New Product Validation team in Boise, ID you will be a senior technical guide responsible for validation strategy and readiness for future-generation High Bandwidth Memory (HBM) products. You will apply deep expertise in complex RAM and high-bandwidth memory architecture and building to establish architecture validation strategies. You will impact decisions that improve validation observability and debug efficiency . You will lead investigations of complex architecture, building , and silicon issues from pre-silicon simulation through post-silicon characterization. You will partner across Design Engineering, Design Validation, Product Engineering, Systems teams, and will develop and promote AI-enabled validation methodologies that improve efficiency, quality, and scalability. Responsibilities: Define architecture-aware validation strategies and coverage direction for future-generation HBM products. Drive validation readiness for next-generation products by preparing strategies, test environments, and execution plans before first silicon, reducing risk, accelerating issue resolution, and preventing late-stage surprises. Evaluate new DRAM/HBM architectural features and define validation requirements and testability needs before DBR. <span style="color:#

Experienced or Senior Digital Design Engineer Company: The Boeing Company Boeing Defense, Space & Security (BDS) seeks a Digital Design Engineer to join our team in Huntsville, AL and play a vital role in the Patriot Advanced Capability-3 (PAC-3) program, one of the world's most advanced air and missile defense systems. This is your opportunity to work in a dynamic environment where your skills will directly contribute to protecting critical assets and ensuring mission success. If you are passionate about defense technology and want to make a real impact, we want to hear from you! Position Responsibilities: Design high speed digital circuits and perform signal integrity analysis Focus on electronic systems and electrical design, simulation and verification/validation testing of high-speed printed circuit boards (PCB) throughout full product development cycle Providing design guidelines and support for system architecture design, board layout, product bring-up, debug, validation, and factory builds This position requires obtaining a U.S. Security Clearance for which the U.S. Government requires U.S. Citizenship. An interim U.S. secret clearance Pre Start and final U.S. secret clearance Post Start is required. Basic Qualifications (Required Skills/Experience): Bachelor of Science degree in Engineering (with a focus in Electrical, Mechanical or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent qualifications directly related to the work statement 3 or more years of related work experience Experience in digital circuit design Preferred Qualificatio

Staff -Power and Performance Validation Engineer About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to senior leadership within Architecture and Validation, the Power and Performance Validation Lead will drive validation strategy and execution for advanced AI compute silicon and systems. The role is responsible for leading power, thermal and performance validation activities across pre-silicon and post-silicon environments to ensure products meet efficiency, reliability and scalability expectations. This role requires strong technical expertise and collaboration across multiple engineering disciplines to deliver robust validation methodologies, scalable automation frameworks and actionable performance insights. The Team The Power and Performance Validation team sits within the Architecture and Validation organisation and is responsible for validating the performance, efficiency and thermal behaviour of Graphcore silicon and systems. The team supports the full product lifecycle, from early architectural modelling through to first silicon bring-up, characterization and production readiness. Engineers work closely with cross-functional teams globally to debu

We built Bubble with a clear mission: to empower everyone to create software. Our AI visual development platform lets anyone, from first-time entrepreneurs to enterprise teams, take an idea from prompt to fully-functional, scalable app across web, iOS, and Android. With over 6 million users in more than 100 countries, Bubble is breaking down the barriers to entrepreneurship and innovation worldwide. Our Product Bubble is the only fully visual AI app builder that lets you vibe code without the code to go beyond prototypes and launch real apps to real users. Chat with AI when you want speed, edit directly when you want control. Bubble's visual editor lets you fine-tune any detail, from the design to privacy rules and programming logic, so you're never stuck, even if AI hits its limits. Everything you need comes built in: a unified web and native mobile editor, enterprise-grade hosting, security, database management, and automatic scaling that grows with your business. You can build just about anything on Bubble, and our community is living proof. Mailead grew a $10K investment into a $2M valuation, and Faceless.video went from zero to $1M+ ARR in under a year. People aren't just launching products on Bubble, they're building real businesses. See how Bubble builders are shipping apps that change industries, solve problems, and shape the future here: Inspiring builders, breakthrough apps . Why Join Bubble Now? The rise of AI-generated software has validated everything Bubble has been building toward for over a decade. But pure AI-generated code is fragile, hard to debug, and rarely production-ready. Bubble bridges that gap, combining the speed of AI with a structured visual platform that produces stable, scalable, secure software. The people who join Bubble right now will help define what that means for millions of builders around the world. If you've ever wanted to work on something that genuinely changes who gets to build, this is your moment. About the Team: We’re ex