Cpu Pre Si Verification Engineer in Bengaluru

... Address: Plot No 5A/1 2 3 Khata No 21/1 Devasandra II Phase Induistrial Area Krishnarajapura Hobli Bangalore - 560048 Facility: CPU BANGALORE Experience: 1 - 2 years Source: Sodexo India | Job Code: IJP567297

... Address: Plot No 5A/1 2 3 Khata No 21/1 Devasandra II Phase Induistrial Area Krishnarajapura Hobli Bangalore - 560048 Facility: CPU BANGALORE Qualification: Graduate Experience: 6 - 10 years Source: Sodexo India | Job Code: IJP543474

REQUIRE KITCHEN HELPER Address: Plot No 5A/1 2 3 Khata No 21/1 Devasandra II Phase Induistrial Area Krishnarajapura Hobli Bangalore - 560048 Facility: CPU BANGALORE Experience: 1 - 2 years Source: Sodexo India | Job Code: IJP575244

REQUIRE KITCHEN HELPER Address: Plot No 5A/1 2 3 Khata No 21/1 Devasandra II Phase Induistrial Area Krishnarajapura Hobli Bangalore - 560048 Facility: CPU BANGALORE Experience: 1 - 2 years Source: Sodexo India | Job Code: IJP575245

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a highly skilled and motivated Senior Design Verification Engineer to join our team. In this role, you will be responsible for the end-to-end verification of our IOMMU (Input/Output Memory Management Unit) IP. You will play a critical role in ensuring the functional correctness and performance of the design, taking ownership of the verification process right from the initial specification understanding down to final coverage closure. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have hands-on experience in ASIC or SoC verification using SystemVerilog and UVM. You enjoy debugging complex design and verification issues and working closely with cross-functional teams. You’re comfortable building verification environments from scratch and driving coverage closure. You have familiarity with standard bus protocols and modern verification tools. What We Need Experience owning block or subsystem-level verification from test planning to sign-off. Strong understanding of constrained-random verification, coverage analysis, and regression debugging. Familiarity with proto

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a Senior Accounts Payable Analyst to drive accurate, efficient AP operations and solve complex finance challenges. You’ll own AP quality, reconciliations, payments, and month-end activities while partnering across Finance and Procurement. Help us build smarter, scalable AP processes through automation, ERP, and AI-enabled workflows. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are 4+ years of Accounts Payable experience, ideally in a shared services/GCC environment, with strong exposure to PO/non-PO invoices, vendor reconciliations, AP aging and payment support. B.Com/BBA/BBM Finance or equivalent; M.Com, MBA Finance, CA Inter or CMA Inter is a plus. Strong attention to detail, ownership, communication skills and a solid understanding of AP controls, GST/TDS, payment terms and audit requirements. What We Need Own day-to-day AP quality control, review invoices and coding, resolve complex exceptions, blocked invoices, PO mismatches and vendor account discrepancies. Support payment proposals, AP aging, vendor reconciliations and month-end close while maintaining strong maker-ch

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking an experienced and motivated System IP RTL Design Lead to drive the definition and implementation of complex datacenter class IP for our next-generation semiconductor products. The ideal candidate possesses a deep understanding of System IP and SoC architecture, IP integration challenges, and is adept at leading a design team to deliver high-quality, scalable IP solutions. This role requires strong hands-on technical leadership, excellent communication skills, and a proven track record in the successful delivery of silicon IP. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned IP / SoC design leader with 20+ yrs of strong expertise in complex SoC architectures, high-speed protocols, and large-scale IP integration. Skilled in RTL design and debug (Verilog/SystemVerilog) with hands-on experience using industry-standard tools for simulation, synthesis, lint, CDC, and power analysis on high-frequency designs. Experienced in driving microarchitecture decisions, authoring design specifications, and performing complex PPA trade-off optimizations. A proactive problem so

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a hands-on RTL Design Engineer to own the microarchitecture and RTL implementation of the Power Management Subsystem/Interrupt Controllers/AXI Interconnect/Cache Controller . You’ll collaborate with cross-functional teams—architecture, firmware, software, DV, and PD—to define, design, and optimize power management solutions for next-generation RISC-V/ARM-based SoCs. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels. During the interview process, you will beevaluated and offered a level that aligns with your experience, which may differ from the one in this posting. Who You Are 5–10 years of experience in ASIC/SOC/IP design, with hands-on experience in microarchitecture and RTL development Skilled in Verilog/SystemVerilog and comfortable working across design, debug, and analysis Design and develop microarchitectures for a set of highly configurable IPs Microarchitecture and RTL coding ensuring optimal performance, power, area Work with verification teams on assertions, test plans, debug, coverage, etc. Deep understanding of power management concepts—clocking, reset, DVFS, and low-power modes Familiar with RISC-V or ARM-based SoCs and standard bus protocols (AXI, AHB, APB, CHI) Awareness of functional safety (ISO 26262) practices in hardware design What We Need Abil

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is building the future of AI compute, and this role will build the talent pipeline that makes it possible. As an Early Talent Recruiter, you will own university and early-career recruiting for your site, shaping which schools we invest in, building relationships with students and faculty, and leading intern, co-op, and new-grad hiring from first outreach through accepted offer. You will not simply run an existing campus calendar. You will decide where to focus, raise the quality of the funnel, and build the recruiting motion that our growing hardware and software teams need. This role is hybrid, based out of Tokyo, Japan, Bangalore, India, or New Taipei City, Taiwan. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have owned a full campus recruiting cycle, including school selection, university partnerships, sourcing, screening, interview coordination, offer management, and closing. You use judgment and influence to partner with hiring managers, challenge assumptions when needed, and hold a clear hiring bar without relying on authority. You work from funnel data and can connect measures such as applications, conversions

For over 20 years, Smartsheet has empowered teams to manage work seamlessly and scale solutions smarter. Now, in our most ambitious chapter yet, we are uniting human teams with AI agents. By orchestrating the work agents do best, automating manual tasks and uncovering insights at scale, we create the space for people to focus on what truly matters: judgment, creativity, and big thinking. That is magic at work, and it’s what we show up for every day. Job Description/ Responsibilities: Designing, developing and maintaining stable and reliable AI/ML Ops platforms / pipelines Minimum experience of 4-6 Years required in AI ML Ops Model Deployment: Package and deploy AI/ML services to production, ensuring they are reproducible and interpretable CI/CD Pipeline Development: Design and implement automated CI/CD (Continuous Integration/Continuous Deployment) pipelines to accelerate model deployment using tools Infrastructure Management: Provision and optimize infrastructure for training and serving, utilizing Docker, Kubernetes, or serverless platforms Monitoring & Observability : Implement post-deployment monitoring for model performance, data drift, and latency using tools. Experience in Monte Carlo is preferable Automation: Automate retraining and data pipeline workflows to ensure models stay accurate over time. Manage the deployment of foundation models, fine-tuning workflows, and Retrieval-Augmented Generation (RAG) stacks (Vector DBs, Knowledge Graph. Experience with AWS Bedrock is preferable Resource Optimization: Manage GPU/CPU utilization to minimize cloud costs while maintaining low-latency inference for users Collaboration: Work closely with data scientists, data engineers, and software engineers to bridge the gap between model development and production. Version Control & Governance: Manage versioning for data, code, and models using tools like MLflow. Security & Compliance: Implementing data security measures, ensuring compliance with data governance

Linux Engineer A Career with point72’s Technology team As Point72 reimagines the future of investing, our Technology team is constantly evolving our firm’s IT infrastructure and engineering capabilities, positioning us at the forefront of a rapidly evolving technology landscape. We’re a team of experts who experiment and work to discover new ways to harness open-source solutions, modern cloud architectures, and sophisticated Artificial Intelligence (AI) solutions, while embracing enterprise agile methodologies. Our commitment to building and innovating in the AI space provides the framework intended to drive smarter decision making and enhance how we build and operate our platforms and applications. As a member of Point72’s Technology team, we encourage and support your professional development from day one—helping you advance your technical skills, contribute innovative ideas, and satisfy your own intellectual curiosity—all while delivering real business impact for our multi-billion-dollar global business. What you’ll do Support, maintain, and troubleshoot Linux systems in production and development environments Assist with system provisioning, configuration, and lifecycle management Monitor system performance, availability, and capacity; respond to incidents and outages Work closely with developers and quants to support research and trading workloads Automate operational tasks using scripting and configuration management tools Assist with patching, upgrades, and vulnerability remediation Maintain documentation and operational runbooks Participate in on-call rotation (as appropriate for level) What’s REQUIRED Bachelor’s degree in computer science, information technology, engineering, or a related field. 5+ years of professional experience administering Ubuntu Linux systems and ZFS Strong understanding of Linux fundamentals including processes, memory, CPU, filesystems, and networking as well as systemd, cron, logging, and package management (apt) Experie

Silicon Verification Engineer Multiple roles across different levels Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. The verification team sits within the Silicon design team and is responsible for ensuring that the RTL created by the logical design team and used by the physical design team matches the architecture specification for Graphcore silicon. The silicon verification engineer is responsible for verification activities within Graphcore, helping the team meet the company objectives for quality silicon delivery. Responsibilities Verification planning, specification and closure of functional coverage Providing feedback to architects Test generation and failure diagnosis/triage Contributing to shared verification infrastructure Ensuring good communication between sites Essential skills: • Verification experience in relevant industry • Proven leadership and planning skills • Highly motivated, a self starter, and a team player • Ability to work across teams and programming languages to find root causes of deep and complex issues • Experience of the verification process applied in CPU and/or ASIC environments • System Verilog, Python, C++, Linux Desirable skills: • UVM • SVA • Assembly languages • LLVM, GCC • DVCS e.g. Git • SGE or other DRMS • XML and XPath/XSLT • Web programming – HTML/DOM, Javascript, SQL Benefits: In addition to a competitive salary, Graphcore offers a competitive benefit

Silicon Verification Engineer Multiple roles across different levels Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. The verification team sits within the Silicon design team and is responsible for ensuring that the RTL created by the logical design team and used by the physical design team matches the architecture specification for Graphcore silicon. The silicon verification engineer is responsible for verification activities within Graphcore, helping the team meet the company objectives for quality silicon delivery. Responsibilities Verification planning, specification and closure of functional coverage Providing feedback to architects Test generation and failure diagnosis/triage Contributing to shared verification infrastructure Ensuring good communication between sites Essential skills: • Verification experience in relevant industry • Proven leadership and planning skills • Highly motivated, a self starter, and a team player • Ability to work across teams and programming languages to find root causes of deep and complex issues • Experience of the verification process applied in CPU and/or ASIC environments • System Verilog, Python, C++, Linux Desirable skills: • UVM • SVA • Assembly languages • LLVM, GCC • DVCS e.g. Git • SGE or other DRMS • XML and XPath/XSLT • Web programming – HTML/DOM, Javascript, SQL Benefits: In addition to a competitive salary, Graphcore offers a competitive benefit