About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to senior leadership within Architecture and Validation, the Debug Validation Lead will drive post-silicon debug and validation activities for next-generation AI compute silicon and systems. The role is responsible for leading teams focused on identifying, reproducing, analysing and resolving complex silicon, firmware and system-level issues during bring-up, characterization and product readiness. This position combines deep technical debugging expertise with strong cross-functional collaboration across multiple engineering disciplines. The role will work closely with architecture, RTL, firmware, software and systems teams to improve debug methodologies, accelerate issue resolution and strengthen validation coverage. The role will work closely with architecture, RTL, firmware, software, systems and platform teams to improve debug methodologies, accelerate issue resolution and strengthen validation coverage. The Team The Post-Silicon Debug and Validation team sits within the Architecture and Validation organisation and is responsible for bring-up, debug and validation of Graphcore silicon and systems. The
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About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software, and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers, and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to the Validation leadership team, the Principal Execution and Quality Validation Engineer will be responsible for driving validation execution, automation, product quality, and release readiness across Graphcore silicon and platform technologies. The role combines deep expertise in hardware validation, test automation, and quality engineering with a strong focus on execution excellence. Working closely with architecture, design, verification, firmware, software, systems engineering, and validation teams, the successful candidate will develop scalable validation methodologies, improve test coverage and execution efficiency, and ensure products meet the highest standards of functionality, reliability, and performance before customer deployment. As a recognized technical leader within the validation organisation, this role will influence validation strategies, automation roadmaps, and quality practices across multiple projects and engineering disciplines. The Team The Validation Execution and Quality team sits within the Validation organisation and is responsible for improving validation effectiveness, te
Staff -Power and Performance Validation Engineer About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to senior leadership within Architecture and Validation, the Power and Performance Validation Lead will drive validation strategy and execution for advanced AI compute silicon and systems. The role is responsible for leading power, thermal and performance validation activities across pre-silicon and post-silicon environments to ensure products meet efficiency, reliability and scalability expectations. This role requires strong technical expertise and collaboration across multiple engineering disciplines to deliver robust validation methodologies, scalable automation frameworks and actionable performance insights. The Team The Power and Performance Validation team sits within the Architecture and Validation organisation and is responsible for validating the performance, efficiency and thermal behaviour of Graphcore silicon and systems. The team supports the full product lifecycle, from early architectural modelling through to first silicon bring-up, characterization and production readiness. Engineers work closely with cross-functional teams globally to debu
About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to senior leadership within Architecture and Validation, the Debug Validation Engineer will drive post-silicon debug and validation activities for next-generation AI compute silicon and systems. The role is responsible for leading teams focused on identifying, reproducing, analysing and resolving complex silicon, firmware and system-level issues during bring-up, characterization and product readiness. This position combines deep technical debugging expertise with strong cross-functional collaboration across multiple engineering disciplines. The role will work closely with architecture, RTL, firmware, software and systems teams to improve debug methodologies, accelerate issue resolution and strengthen validation coverage. The role will work closely with architecture, RTL, firmware, software, systems and platform teams to improve debug methodologies, accelerate issue resolution and strengthen validation coverage. The Team The Post-Silicon Debug and Validation team sits within the Architecture and Validation organisation and is responsible for bring-up, debug and validation of Graphcore silicon and systems.
Senior -Power and Performance Validation Engineer About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to senior leadership within Architecture and Validation, the Power and Performance Validation Lead will drive validation strategy and execution for advanced AI compute silicon and systems. The role is responsible for leading power, thermal and performance validation activities across pre-silicon and post-silicon environments to ensure products meet efficiency, reliability and scalability expectations. This role requires strong technical expertise and collaboration across multiple engineering disciplines to deliver robust validation methodologies, scalable automation frameworks and actionable performance insights. The Team The Power and Performance Validation team sits within the Architecture and Validation organisation and is responsible for validating the performance, efficiency and thermal behaviour of Graphcore silicon and systems. The team supports the full product lifecycle, from early architectural modelling through to first silicon bring-up, characterization and production readiness. Engineers work closely with cross-functional teams globally to deb
About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software, and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers, and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to the Validation leadership team, the Senior Execution and Quality Validation Engineer will be responsible for executing validation plans, developing automation solutions, and improving product quality across Graphcore silicon and platform technologies. Working closely with architecture, design, verification, firmware, software, systems engineering, and validation teams, the successful candidate will contribute to scalable validation methodologies, improve test coverage and execution efficiency, and help ensure products meet high standards of functionality, reliability, and performance before customer deployment. The role requires strong technical skills, attention to detail, and a passion for improving validation quality through effective execution, automation, and continuous improvement. The Team The Validation Execution and Quality team sits within the Validation organisation and is responsible for improving validation effectiveness, test execution efficiency, product quality, and release readiness across Graphcore silicon and platform products. The team develops validation methodologies, automation
Job Title: Full Stack Software Development Engineer II (SDE II) Team: Product Engineering Location: Bangalore, India Employment Type: Full-time About the Role As a Full Stack SDE II in Sigmoid's Product Engineering team, you will take ownership of building scalable, reliable, and user-centric web applications. You will collaborate closely with product managers, designers, and system architects to drive features from design to deployment, ensuring robust frontend performance, clean backend services, and efficient database architectures. Key Responsibilities Full Stack Development Design and build responsive, high-performance web interfaces using React, TypeScript, Tailwind CSS, and Shadcn UI, backed by reliable API services using Node.js or Python (FastAPI). Database & API Design Model, query, and optimize relational data structures in PostgreSQL. Design, build, and maintain clean RESTful APIs and microservices. Code Quality & Best Practices Apply SOLID principles, basic design patterns, and clean code principles to write maintainable, scalable, and self-documenting code. Testing & Quality Assurance Implement comprehensive test suites using Jest, React Testing Library, or backend testing frameworks (e.g., PyTest) to maintain high code coverage and prevent regressions. Agile Execution Actively participate in Agile ceremonies (sprints, stand-ups, retrospectives, and planning) to deliver quality code incrementally. Collaboration & Mentorship Partner with cross-functional teams and mentor junior engineers through constructive code reviews and technical guidance. Requirements & Qualifications Technical Skills Frontend 3–5 years of hands-on experience with React, TypeScript, Tailwind CSS, and modern UI component libraries like Shadcn UI. State & Data Fetching Experience with modern client-side state management and data-fetching libraries (TanStack Query, Zustand, or Redux Toolkit). Backend Strong expertise in server-side development using Node.js or
Job Details: Job Description: We are looking for a PERC Runset Development Engineer to develop and Validate PERC (Programmable Electrical Rule Checker) rule decks. The role involves working closely with PDK Team and foundry to implement PERC and ensure design compliance. Key Responsibilities: • Rule Development: Develop, validate, and maintain complex PERC rule decks to identify electrical reliability violations (e.g., ESD paths, current density, voltage stress, and floating gates). • Multi-Tool Integration: Develop and optimize verification flows across multiple EDA environments, ensuring consistency in results between Calibre PERC( preferred), Cadence Pegasus, and Synopsys tools. • Cross-Functional Collaboration: Work closely with Device Physicists, Process Integration Engineers, and Analog Designers to translate reliability requirements into programmable rules. • Debug and Analysis: Provide expert-level support to design teams in debugging PERC violations, distinguishing between true reliability risks and tool-induced false positives. • Automation: Develop scripts (Python, SKILL, Tcl, or Perl) to automate the execution, reporting, and tracking of reliability checks across different design versions. • Documentation: Maintain detailed documentation of reliability check-sets and create guidelines for designers to implement correct-by-construction layouts. Qualifications: Required Skills: • Experience with PERC rule development (preferably using Calibre PERC). • Knowledge of ESD, latch-up and reliability verification. • Familiarity with SVRF, TVF, Python or Tcl scripting. • Strong debugging and problem-solving skills. • Knowledge of Linux and scripting (Python/Shell/Tcl) is desirable. • Experience with advanced technology nodes is an advantage. • Team player and be able to work with globa
Job Details: Job Description: In this role, you'll build software capabilities to automate the build, test, and deployment of Intel's Process Design Kit (PDK). A PDK is a collection of artifacts representing Intel's semiconductor process, used by product designers to model, implement, and verify Intel's mobile, desktop, and server products before manufacturing. You'll be a member of the Design Technology Platform organization, working closely with teams in the United States, Bangalore, and Penang to build world-class DevOps infrastructure that shapes the future of deploying PDKs to silicon product development teams at Intel. Qualifications: Bachelor's or Master's degree in Computer Science, Computer Engineering, or another closely related field. 7-12 years of experience with a Bachelor's degree or Master's degree in software development and engineering. Excellent Python programming skills. Expert-level knowledge of pytest concepts. Expert-level experience with GitHub-based Jenkins CI/CD deployment, enablement, and debugging. Proven knowledge of Agile software engineering practices, IT environments, and DevOps principles and processes. Excellent debugging and problem-solving skills. Excellent written and verbal communication skills; ability to present complex issues with clarity to drive decisions. Must have hands-on experience with AI tools and demonstrated experience building AI agents/tools. Exposure to VLSI PDK domain is preferred. Strong team player with proven ability to collaborate effectively across cross-functional and geographically distributed teams. Job Type: Experienced Hire Shift: Shift 1
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WORK PERMIT,S PASS, E PERMIT COMPANY DRIVER ( LIGHT ) INDIAN LICENCE HOLDER CAN APPLY - W.P BIKE RIDER FOR FOOD DELIVERY - W.P ADMIN CUM RECEPTIONIST - W.P & S PASS BOTH LABORATORY TECHNICIAN - S PASS ADMIN ASSISTANT - W.P SITE SUPERVISOR - S PASS OPERATIONS EXECUTIVE - S PASS LOGISTIC COORDINATOR - W.P F&B TEAM LEADER - S PASS CLERK - W.P PART TIME CASHIER - W.P ELECTRICAL ISTRUMENTATION ENGINEER - S PASS MECHANICAL SUPERVISOR - S PASS HR & ADMIN EXECUTIVE - S PASS DELIVER VEHICLE DRIVER - W.P HUMAN RESOURCE / ADMIN OFFICER - S PASS DATA ENTRY ASSISTANT - W.P BILLING & ADMIN ASSISTANT - W.P & S PASS BOTH ASSISTANT RESTAURANT MANAGER - E PERMIT ARCHITECTURAL SUPERVISOR - S PASS F&B WAITER (ROOM sERVICE) - W.P NIGHT SECURITY OFFICER - W.P HR &ACCOUNTS ADMIN EXECUTIVE - S PASS PAYROLL & HR SUPPORT EXECUTIVE - S PASS ELECTRICAL ENGINEER - W.P & S PASS BOTH FOOD & BEVERAGE (F&B) EXECUTIVE - S PASS PROJECT TEAM LEAD (JAVA) - E PERMIT IT PROJECT MANAGER (LAB AND IT ) - E PERMIT UI/UX DESIGNER - E PERMIT SOFTWARE DEVELOPMENT MANAGER - E PERMIT ALL S PASS AND E PASS OPENING AS PER COMPANY REQUIREMENT MINIMUM 2 YEARS EXP REQUIRED IT'S DIRECT SELECTION ONLY EXP CANDIDATE NEED NO INTERVIEW.
SITE SUPERVISOR - S PASS OPERATIONS EXECUTIVE - S PASS LOGISTIC COORDINATOR - W.P F&B TEAM LEADER - S PASS CLERK - W.P PART TIME CASHIER - W.P ELECTRICAL ISTRUMENTATION ENGINEER - S PASS MECHANICAL SUPERVISOR - S PASS HR & ADMIN EXECUTIVE - S PASS DELIVER VEHICLE DRIVER - W.P HUMAN RESOURCE / ADMIN OFFICER - S PASS DATA ENTRY ASSISTANT - W.P BILLING & ADMIN ASSISTANT - W.P & S PASS BOTH ASSISTANT RESTAURANT MANAGER - E PERMIT ARCHITECTURAL SUPERVISOR - S PASS F&B WAITER (ROOM sERVICE) - W.P NIGHT SECURITY OFFICER - W.P HR &ACCOUNTS ADMIN EXECUTIVE - S PASS PAYROLL & HR SUPPORT EXECUTIVE - S PASS ELECTRICAL ENGINEER - W.P & S PASS BOTH FOOD & BEVERAGE (F&B) EXECUTIVE - S PASS PROJECT TEAM LEAD (JAVA) - E PERMIT IT PROJECT MANAGER (LAB AND IT ) - E PERMIT UI/UX DESIGNER - E PERMIT SOFTWARE DEVELOPMENT MANAGER - E PERMIT ALL S PASS AND E PASS OPENING AS PER COMPANY REQUIREMENT MINIMUM 2 YEARS EXP REQUIRED IT'S DIRECT SELECTION ONLY EXP CANDIDATE NEED NO INTERVIEW. Contact :-SINGAPORE REQUIREMENT GET PERMIT IN 30 WORKING DAYS NO HIDDEN CHARGES NOT MORE COSTLY W.P (WORK PERMIT) COST - ( 1.7 LAKH WITH DOCUMENTS 35 THOUSAND REQUIRED ) S PASS COST - ( 2.5 LAKH WITH DOCUMENTS 40 THOUSAND REQUIRED ) E PERMIT COST - (3.2 LAKH WITH DOCUMENTS 50 THOUSAND REQUIRED ) IF ANY ONE INTERESTED THEN CONTACT ME AS SOON AS POSSIBLE.
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SAP Fiori developer Chennai, Tamil Nadu, India Full Time Direct Hire Job Summary: Responsibilities • Develop and maintain SAP FIORI applications. • Collaborate with business stakeholders to understand requirements and translate them into technical specifications. • Implement custom and standard SAP FIORI applications using SAP Web IDE. • Perform unit testing and troubleshoot issues in SAP FIORI applications. • Ensure seamless integration with existing SAP systems and modules. • Maintain documentation for development processes and user guides. • Stay updated with the latest SAP FIORI best practices and technologies. Qualifications • Bachelor or master degree in computer science, Information Technology, or related field. • 6 years of experience in SAP Frontend development (SAPUI5 / Fiori) • Experience in Fiori Design patterns, expertise in UI Theme designer • Expertise with annotations and SAP smart controls • Proficient in SAPUI5 and Fiori framework: Deep understanding of SAPUI5 controls, components, routing, and data binding mechanisms. • Front-end development skills: Expertise in HTML, CSS, JavaScript, and related web technologies. • OData knowledge: Ability to consume and create OData services for data integration with backend systems. • Experience in developing UI5 Freestyle apps. • SAP ABAP understanding: Basic understanding of ABAP programming for backend integration and customization. • Fiori Gateway services development skills • Experience with SAP BAS and SAP Web IDE • Experience in Fiori Launchpad configuration • Experience in Fiori Elements and CDS views • Must be good at JavaScript’s, JQUERY, XML, JSON and HTML5, Layout designing with CSS • Experience in SAP BTP Platforms tools SAP Build / SAP Build Process Automation / SAP workzone - Added Value • Experience in SAP BTP Frameworks CAP or RAP - Added Value • Experience in web service and REST API integration - Added Value • Ability to solve problems independently, showing perseverance and requiring minima
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