ASIC Design Engineer

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Design and CAD Enablement Own the development, deployment, and support of scalable CAD tools, automation frameworks, design flows, and methodologies for NAND, DRAM, HBM, SoC, mixed-signal, and other advanced semiconductor products. Develop, improve, and maintain infrastructure for circuit build capture, layout, simulation, characterization, implementation, physical verification, and signoff workflows. Create robust software and scripts using Python, Tcl, SKILL, Shell, Perl, C/C++, Java, Lisp, or related languages to automate engineering workflows, analytics, and quality checks. Evaluate and integrate advanced EDA technologies, AI-assisted engineering solutions, and emerging methodologies to improve productivity, scalability, and silicon quality. Validated ability to demonstrate AI‑assisted (vibe) coding techniques to improve efficiency or automate design and analysis methodologies Leverage AI tools to automate the tools and workflow Applying Artificial Intelligence in workflows to improve build efficiency undefined undefined Lead implementation and signoff activities across physical design, static timing analysis, and design for test for complex digital, memory, SoC, or mixed-signal products. Drive floor planning, power planning, placement, clock tree synthesis, routing, optimization, timing closure, and physical verification to meet power, performance, area, reliability, and sche

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. ***This position is located in our Tel -Aviv Office (ToHa Building, near HaShalom train station) *** Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron Technology seeks an RTL design engineer to develop digital blocks from specification through RTL implementation with strong emphasis on power-efficient, implementation-aware building. In this role, you will work hands-on with synthesis and timing/power analysis tools to develop power, performance, and area (PPA) trade-offs. You will collaborate with multi-functional teams to improve the quality of advanced flash memory products. Responsibilities Develop and implement RTL for digital and mixed-signal blocks using System Verilog. Perform front-end quality checks including lint, CDC/RDC, synthesis, UPF, and timing QoR. Design power- and area-efficient RTL with a focus on reducing switching activity, clock power, and leakage. Complete RTL- and gate-level power and timing evaluation to identify and resolve PPA bottlenecks. Collaborate with verification, synthesis, and physical design teams to achieve timing closure and design targets. Minimum Qualifications Bachelor’s degree wi

We are looking for a Sr. ASIC Design Engineer! NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have developed an outstanding team stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. What you'll be doing: You will document, implement, and deliver fully verified, high performance, area and power efficient RTL to achieve the design targets and specifications. Your responsibilities will include architecture and micro-architecture design, RTL design and synthesis, and logic and timing verification using pioneering CAD tools and semiconductor process technologies. In addition to the design role, you will participate in the verification of the design using sophisticated verification methodologies. You are expected to help define the verification scope and support the development of verification infrastructure. You will collaborate with several ASIC development teams and will need to communicate and coordinate with members of those teams, some of whom are in remote locations. What we need to see: A Bachelors or Masters Degree (or equivalent experience) 5+ years of relevant / meaningful work experience Proven hardware engineering background with a concentration in VLSI and Computer Architecture Expertise in Verilog, System Verilog or similar HDL. Proficient programming in Perl/Python

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Principal ASIC Design Engineer About the Role At Micron, we transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next era of AI, ML, and advanced computing. Micron’s Interface Pathfinding team drives performance-scaling innovation across circuits, signaling, packaging, and interconnects with a 3–5 year technology horizon. A core part of that work is silicon-based validation of novel PHY solutions, and we are growing the team to execute. As the Principal ASIC Design Engineer , you will be the primary digital contributor on a deliberately small, senior team — united around the goal of carrying high-speed interface technologies from architecture to tape-out. The team’s analog and chip-level architecture is anchored by a deeply experienced analog custom design engineer; your role is to be the authoritative digital voice — owning RTL design and micro-architecture of the digital blocks, defining timing constraints, supporting verification, and serving as the key interface between the digital design and the analog and layout specialists who will carry the implementation through to silicon. On a test ASIC of this scope, the front-end digital work is the critical path, with contractor and layout support engaged as bandwidth demands warrant. What You’ll Own Digital Block Architecture & RTL Design Own the micro-architecture and RTL implement

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a member of the ASIC Design team, you will work on design tasks for Micron's next generation of solid-state drive controllers. You will be involved in various phases of the ASIC design process, from concept to production silicon. This includes writing micro-architecture specifications, implementing RTL design, collaborating with the verification team to fully validate the design, delivering a gate netlist to the back-end implementation team to meet timing and physical constraints, and developing scripts to improve the design process. The ideal candidate is highly motivated, detail-oriented, and possesses excellent documentation and communication skills. Strong collaboration skills and a commitment to completing tasks with high quality are essential. This role additionally expects familiarity with AI assisted engineering tools to improve productivity, accelerate debugging, and enhance documentation quality, while ensuring responsible and secure usage. Responsibilities: Design, implement, and debug complex logic designs. Integrate your IP into larger and more complex IPs. Support front-end integration activities such as Lint, CDC, Synthesis, and ECO. Implement design automation using Python or other programming languages. Collaborate with SOC Design, SOC Design Verification, Emulation, STA, and Physical Design teams. Work closely with software and systems teams to ensure high-quality system integration.<

InnoPhase Inc., DBA GreenWave Radios™, is at the forefront of innovation in Open RAN digital radios. Our cutting-edge solutions, powered by the Hermes64 RF SoC, are designed to enhance network energy efficiency while dramatically reducing operational expenses, with purpose-built silicon that is the heart of ORAN-based active antenna arrays. Headquartered in San Diego, California, GreenWave Radios™ has established itself as a pioneer in delivering power-efficient digital-to-RF solutions. The company is supported by a talented team of over 100 engineers spread across four global R&D facilities. With an extensive portfolio of more than 120 global patents, GreenWave Radios™ continues to push the boundaries of radio technology and innovation. To learn more about GreenWave Radios™ and hear what our employees have to say, visit the GreenWave™ certification profile at GreatPlacetoWork.com or explore our Home - GreenWave Radios website. About the Role We’re looking for an experienced Principal Engineer/Manager to lead a small, high-impact team building next-generation cellular infrastructure radio Front Haul Gateway (FHGW) solutions in both FPGA and ASIC. You’ll own everything from architecture through production—defining features, authoring device specifications, and driving the design flow for high-performance programmable logic with embedded Linux-based wireless communications software. This is a senior technical leadership and management role with direct influence on our market-leading cellular infrastructure products, working hands-on alongside experts across design, verification, firmware, and system engineering. What You’ll Do Lead and mentor a small team of FPGA/ASIC design engineers, including resource planning, project scheduling, and technical mentoring/oversight Own solution architecture end-to-end—taking marketing requirements and translating to product specifications through production-quality programmable logic design, verification and ha