Design Engineer- (Standard and Custom Cell Characterization) -HBM

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In this position, you will be joining a brilliant team to collaborate with Micron’s various design and verification teams all over the world, support the efforts of design verification flow development, optimization, and implementation and work with cross-functional team to assure the best cost, quality, reliability, time-to-market, and customer satisfaction As Memory Design Group CAD Engineer at Micron Technology, Inc., you will be working in a collaborative, production support role evaluating, developing enhancing and debugging both in-house and commercial Electronic Design Automation (EDA) tools and flows for the physical layout and design of CMOS integrated circuits. You will work closely with the Design, Layout teams, supporting their use of electronic design automation tools and methodologies to increase design and layout productivity and work efficiency. Responsibilities : Develop tools, flows, and methodologies to increase the productivity and reliability of our Memory designs Integrate commercial EDA (Electronic Design Automation) tools into design flows Provide training, documentation, and support to end users on new tools and method. Work closely with design, layout, verification and process teams. Undertake independent research and development of ne

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Central Engineering at Micron Technology, Inc. is a dynamic and integral part of the company, focused on providing essential services and driving innovation across various technical domains. Established nearly five years ago, Central Engineering initially concentrated on creating economies of scale and enhancing efficiency for the Technology Products Group (TPG). Over the past three years, the team has evolved to deliver industry-first products, develop core design process automation, and produce powerful AI and Data Science tools. As a CAD in CE Memory CAD Engineer at Micron, we work in a fast-paced and collaborative environment. We provide production support role by evaluating, developing, enhancing and debugging both in-house and commercial EDA tools and flows for the design, physical layout, and verification of CMOS integrated circuits! The right person will have be developing and applying CAD software engineering methods, theories and research techniques in support of the organization's product development! Assignments include crafting and developing CAD software, assessing architecture and hardware limitations, and defining and implementing CAD software engineering applications. Responsibilities: Innovating to develop tools, flows, and methodologies to increase the design efficiency and quality of our memory designs on NAND/DRAM/HBM Providing training, documentation, and support to end-users o

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In this position, you will work and support the efforts of groups such as Design Engineering, Product Engineering, Process Integration, Probe, and Assembly to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer happiness. How To Qualify: B.S.EE degree with + 2 years of experience M.S.EE degree with 1+ years of experience. Coursework in CMOS Circuit Design and VLSI Coursework that included crafting the physical layout of circuits Knowledge and experience using Cadence Virtuoso Excellent problem-solving and analytical skills A self-motivated, hard-working team player who enjoys working with others. Good communication and documentation skills Drive innovation into the future Memory generation with a dynamic work environment. What Sets You Apart: Knowledge of layout synthesis and place and route techniques Experience with LVS and DRC tools such as Calibre Utilize AI-Enabled tools to assist in layout floor planning, place and route Standard cell construction and analog layout techniques Having an innovative approach that is open to improving upon any of our processes or products. As a world leader in the semiconductor industry, Micron is dedicated to your persona

We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Role Summary The Principal Architect, Solution Engineering and Automation will be responsible for the business solution designs that include working at the business unit level developing the most advanced end-to-end solution architecture for highly complex and significant initiatives in partnership with key business and IT stakeholders. In this high-impact role, you will build a technology incubation function, identifying, developing, and launching innovative solutions that address critical business challenges, improve patient outcomes, and drive significant value for CVS Health. You will be at the forefront of emerging technologies, working closely with business leaders, technology teams, and external partners to shape the future of pharmacy benefits. What you will do: Provide technology leadership, solution oversight, design reviews and guidance to ensure that the solution adheres to Solution Architecture Guiding Principles and standards while maximizing reuse of technology assets In depth experience in performing Buy vs Build analysis based on the qualitative and quantitative analysis across the available options to provide a final recommendation based on the rationale Actively lead and participate in the Architecture community to drive modernization opportunities for the advancement of PBM technology while keeping in mind the com

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an Physical Design Engineer to lead cross-functional efforts to solve complex physical design challenges and develop end-to-end RTL-to-GDS methodologies across advanced nodes, with a strong focus on PPA and runtime improvements. The engineer will architect, integrate, and deploy AI/ML-driven solutions into production physical design flows, creating custom CAD tools and partnering with internal teams and EDA vendors to drive next-generation, ML-enabled capabilities. This role is hybrid, based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are BS in Electrical or Computer Engineering (or equivalent experience) with 5+ years in Physical Design CAD methodology at advanced nodes. Proven track record improving PPA and/or runtime on high-performance, low-power taped-out designs. Hands-on with industry-standard EDA tools (e.g., Fusion Compiler) across synthesis, P&R, STA, signoff, and hierarchical flows. Strong Python/Tcl and data skills, with interest or experience in ML frameworks (PyTorch, TensorFlow), and the ability to drive complex projects independent

About the Team OpenAI's mission is to ensure that artificial general intelligence benefits all of humanity. The Consumer Devices team is building a new generation of AI-powered products that seamlessly integrate hardware and software to create intuitive, transformative experiences. We bring together experts across embedded systems, machine learning, hardware, design, and product engineering to develop products at the intersection of AI and consumer technology. About the Role OpenAI is seeking a System Performance Engineer to profile, benchmark, and optimize performance across our embedded hardware products. In this role, you will work across operating systems, applications, camera and vision, graphics, and platform teams to define product KPIs, build performance tooling, and drive optimizations from early lab characterization through product launch and real-world usage. You will help establish the performance standards that shape the user experience of our products, ensuring they remain responsive, efficient, and reliable throughout their lifecycle. This role requires deep expertise in embedded or high-performance systems, strong operating systems fundamentals, and hands-on experience debugging under tight latency, power, and memory constraints. This role is based in San Francisco, CA. We use a hybrid work model of four days per week in the office and one day working remotely. Relocation assistance is available for new hires. In this role, you will: Develop system performance benchmarks, methodologies, and policies to evaluate end-to-end product behavior. Profile and analyze performance across key product use cases and workloads using custom and industry-standard profiling tools. Partner closely with engineering teams to identify bottlenecks and drive performance optimizations across the software stack. Define high-level product KPIs and establish measurement frameworks to measure launch readiness and monitor performance throughout the product lifecycle. Measure, re