DRAM IP Development Layout (Internship)

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a DRAM Design Engineering Group at Micron Technology, Inc. you will be responsible for translating schematics into layout used for the creation of fabrication reticules. You will be required to meet all engineering and process related criteria needed for an assigned DRAM product. You will organize and prioritize logistics and resource allocations to meet scheduled deadlines, and proactively develop methodologies for issue resolution. In this role you will work with Design and other engineering groups to apply multiple layout techniques for the design and verification of digital and analog circuits. You will be expected to understand various circuit design protocols, different fab processes, mask generation techniques, and tapeout processes and procedures. Responsibilities: Responsible for Design and development of IP layouts used in DRAM chips. Perform layout verification like LVS/DRC/EM, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/breakthroughs in multiple project environment. Contribute to effective project-management. Plan and detail your layout, presenting material for global teams to review Optimally connect with engineering teams in India, Japan the US, and other global teams to ensure the success of the layout project. Minimum Qualifica

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 43 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. As a DRAM Design Engineering Group at Micron Technology, Inc. you will be responsible for translating schematics into layout used for the creation of fabrication reticules. You will be required to meet all engineering and process related criteria needed for an assigned Dram product. You will organize and prioritize logistics and resource allocations to meet scheduled deadlines, and proactively develop methodologies for issue resolution. In this role you will work with Design and other engineering groups to apply multiple layout techniques for the design and verification of digital and analog circuits. You will be expected to understand various circuit design protocols, different fab processes, mask generation techniques, and tapeout processes and procedures. Responsibilities: Responsible for Design and development of IP layouts used in DRAM chips. Perform layout verification like LVS/DRC/EM, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/breakthroughs in multiple project environment. G

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. SUMMARY: As a Design Engineer at Micron Technology, Inc., you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products. We are engaged in developing groundbreaking silicon-to-systems solutions – right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions. In this position, you will collaborate with Micron’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. Responsibilities: Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits. Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions. Overseeing and managing the layout process including floor-planning, placement, and routing. Performing verification processes with modeling and simulation using industry standard simulators. Contributing to cross group communication to work towards standardization and group success. Working with Marketing, Probe, Assembly, Test, Pro

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. SUMMARY: At Micron, we focus on developing groundbreaking silicon-to-systems solutions. We handle technology development, advanced memory builds, product development, system development, and validation to create world-class memory solutions. In this position, you will collaborate with Micron’s global design, layout, and verification teams to develop high-quality physical layouts for cutting-edge DRAM products. You will gain hands-on experience in semiconductor layout building, physical verification, and industry-standard Electronic Compose Automation (EDA) tools. RESPONSABILITIES: Design and Verify All Levels of Analog and Digital Layout Use computer aided design software (i.e. Cadence, Calibre, etc.) Work with Design Engineers to floor plan and design layout Understand and follow verification protocols Apply custom and/or automated layout techniques to design pitch, array, and peripheral layout for digital and analog circuits. Collaborate with build engineering to understand layout methodology. Possess basic understanding of circuit design and electronics. Minimum Qualifications: Student pursuing a bachelor's degree (last 2 semesters preferred) in Electrical Engineering, Electronics Engineering, Mechatronics, Robotics, Nanotechnology, Computer Engineering, or a related field. Completed coursework or academic projects related to microelectronics, semiconductor devices, VLSI, or integrated circuit design.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Lead Principal Engineer, Layout Design at Micron, you will be at the forefront of developing groundbreaking memory solutions! This role is an outstanding opportunity to lead the physical implementation of modern DRAM and mixed-signal circuits, turning schematics and specifications into flawless, manufacturable layouts. You will collaborate with a world-class team of Circuit Designers, Verification Engineers, CAD/Methodology experts, Process Integrators, Product Engineers, Test/Probe specialists, Assembly professionals, and Marketing strategists. Together, we will drive cost, quality, reliability, time-to-market, and customer happiness through outstanding layout and build. Key Responsibilities Lead the layout build and physical realization of new memory products. Interpret device and circuit specifications to implement custom layout solutions meeting PPA (power, performance, area) and reliability targets. Develop hierarchical layouts for analog, digital, and memory-array-related circuitry using industry-standard EDA tools. Build block and top-level floorplans optimizing placement, routing resources, signal integrity, power delivery, and manufacturability. Optimize layout for critical metrics such as die size/area efficiency, matching, coupling/noise, and timing. Produce layout collateral and documentation for cross-team integration. Physical Verification and Tapeout Signoff Run and debug physical verification flows and ensure closure using indust

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Summary: As a Design Verification Engineer Intern at Micron, you will collaborate with highly innovative design and verification teams to support the development of advanced DRAM and emerging memory technologies. This role offers hands-on exposure to high-density memory products, complex verification methodologies, automation tools, and industry-leading semiconductor design practices. You will work within a global engineering environment while learning from experienced engineers and contributing to world-class memory solutions. Responsibilities Support verification activities while developing an understanding of chip-level and block-level functionality for advanced memory products. Assist in developing and maintaining digital and analog verification environments for DRAM technologies. Create test patterns, execute regressions, and help improve functional coverage of memory features and architectures. Analyze verification failures, support debugging efforts, and collaborate with engineers to identify root causes. Participate in automation, scripting, AI-assisted engineering solutions, and verification flow improvements while collaborating with global teams. Minimum Qualifications Currently pursuing the final year of a Bachelor's degree or a Master's degree in Electronics Engineering, Electrical Engineering, or a related field, with enrollment in an accredited university program. Basic understanding of digital logic