ENGINEER, PEE PHOTO

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Location Singapore, Fab10 Department Fab10 High-Volume Manufacturing Photo Process and Equipment Engineering Project Title Automation of Non-Zero-Offset Control for High-Volume Manufacturing Photo Processes Project Description Non-Zero-Offset is a key photo-process control parameter used in overlay-performance management and yield protection. The current workflow includes data preparation, Non-Zero-Offset generation, engineering review, validation, and post-implementation monitoring. As the number of process vintages increases, a scalable analytical approach is needed to improve workflow consistency and efficiency. The intern will undertake a structured project to develop and evaluate an automated, data-driven Non-Zero-Offset framework using Python, statistical analysis, machine learning, and visualization. The project will provide practical exposure to photo-process engineering, inline metrology, data modeling, workflow automation, and AI-Enabled engineering analysis. Objective of the Project Develop an understanding of the end-to-end Non-Zero-Offset workflow, including wafer selection, inline recipe criteria, metrology requirements, generation logic, and validation.

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Fab Engineer at Micron Technology, Inc., you will be working with a team of other process and equipment engineers responsible for starting up, developing and optimizing processes to improve product quality and reliability, working on process yield improvement, cost reduction, productivity improvement and risk management as well as resolving manufacturing line problems. This position will identify, diagnose and resolve process related problems by applying failure analysis, FMEA, 8D or SPC methodology. Additional responsibilities include coordinating and carrying out process, equipment and material evaluation/optimization to implement changes at process step, leading and participating in yield improvement and cost reduction activities, handling new process baseline qualifications and managing, auditing and liaising with material suppliers to achieve quality, cost and risk management objectives. Responsibilities: Strategize and lead productivity, yield, quality, cost improvement engagement with global sites and network team via process optimization, new/FOAK chemistry & technology qualification, CIP development collaboration with suppliers. Collaborate with cross functional team for breakthrough in defects reduction and particle removal efficiency enhancemen

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities: ​ - To take on reliability accountability for Singapore Fab 10 with cross-functional projects and tasks which include but not limited to Understand semiconductor reliability failure mechanisms and physics Understand RG and FG process technology and risks on manufacturing quality Understand probe testing, device datasheet spec, and device characterization knowledge Accountable for Fab Reliability performance, define Wafer Level Reliability (WLR) sampling plan, Outgoing Quality and Reliability Monitoring (OQRM) matric, Fab process SWR study and conversion risk assessment Partner with Fab 10 PI/ PEE and Global TD, QE, Product, Test engineering team to meet intrinsic targets through process improvement Perform risk assessment on Class 1 and Class 2 process conversions and advise on data collection requirements and conversion roadmap Development of WLR capability as a proxy for equivalent package level reliability test Deep dive in Product Intrinsic Scorecards and Key Metric Understanding (Endurance, Retention, Program Disturb, X-temp, etc) Part of the Fab quality team contributing as SME in reliability fail modes and its associated detec

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities and Tasks Work with PEE, PIE and Planning team to enable short to mid-term capacity and cycle time planning for the area to meet Business Plan Identify area constraints, establish and implement best known method to resolve them Work with relevant cross functional teams in building the infrastructure and fan out to the shift team to run the area more effectively, i.e manufacturing system deployment, enhancement, and training Drive productivity and quality improvement projects, such as cycle time reduction, RPT improvement, operations simplification, man model optimization, etc Participate in resolving gaps in actual vs modeled performance Set up and maintain automated systems to disposition product Define and streamline business processes at Probe to improve coordination across multiple teams Improve robustness of Probe systems and operations Perform system setup to support new NAND devices at Probe All team members are required to complete their learning items within the stipulated time frame

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Location Singapore Department Process Equipment Engineering (PEE) Project Title AI-Enabled CMP Equipment Health & Breakage Risk Prediction Dashboard Project Description Chemical Mechanical Planarization (CMP) tool performance directly influences wafer quality, equipment reliability, and manufacturing efficiency. This project focuses on developing an AI-Enabled dashboard that integrates fab equipment and manufacturing data to identify early indicators of wafer breakage, equipment degradation, and yield excursions. The intern will work on data exploration, predictive analytics, and visualization techniques to develop an intelligent monitoring solution that enables proactive decision-making. Through this project, the intern will gain exposure to semiconductor manufacturing equipment, reliability engineering methodologies, Artificial Intelligence applications, and data-driven engineering practices within a high-volume manufacturing environment. Objective of the Project Develop an AI-Enabled equipment monitoring and risk prediction dashboard capable of identifying potential CMP tool-related wafer breakage and excursion risks before significant manufacturing impact occurs. Oppo

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Process Integration Module Engineer in the Central Process Integration department, you will be responsible for coordinating improvements in Yield, Quality, and Output for DRAM/NAND process and production line. Day-to-day responsibilities include but not limit to collaborating with network PI/YE/PQA/PEE teams to craft and analyze process experiments, to achieve best-in-class (BIC) yield and quality to establish documented best-known methods (BKMs) Responsibilities and Tasks Collaborate with multi-functional network teams from PIE, Process & Equipment Engineering, WLR, TD to improve product yields and reliability within your assigned process loop. May require travel to global Micron sites to foster collaboration and drive execution. Communicate module related issues to the Fab engineering and leadership teams. Design, execute, and analyze experiments to improve fab process, yield, and quality. Collect and interpret complex data to optimize Fab processes and increase yields. Engage and/or lead cross-area engineering teams to tackle process issues. Work closely with global partners to stay ahead of on module related topics and process alignment projects. Collaborate with oth