Hardware Systems Architect

About the Team Security is at the foundation of OpenAI’s mission to ensure that artificial general intelligence benefits all of humanity. The Security team protects OpenAI’s technology, people, and products. We are technical in what we build but are operational in how we do our work, and are committed to supporting all products and research at OpenAI. Our Security team tenets include: prioritizing for impact, enabling researchers, preparing for future transformative technologies, and engaging a robust security culture. About the Role Trusted Computing and Cryptography is a core security team at OpenAI focused on deploying high-performance cryptography at scale, secure key management, and trusted hardware enclaves—from boot measurements to GPU confidential computation. As a Hardware Platform Security Architect, you’ll own hardware platform security at OpenAI. In this role, you will: Co-Architect Secure Silicon: Collaborate with cross-functional silicon teams (Silicon Design, DV, FW) and silicon partners (silicon test facilities, foundries) to develop secure silicon that meets the end-to-end system requirements. Co-Architect Secure Hardware: Collaborate with hardware vendors and cross-functional teams (kernel, compiler, infra) to design secure hardware that meets performance and security needs. Co-Architect Secure Systems: Architect and deploy systems using TPM2, Secure Boot, Nitro Enclaves, Intel SGX, AMD-SEV, and other secure hardware technologies. Drive Innovation: Engage with internal and external partners to align hardware innovations with OpenAI’s trusted computing and cryptographic requirements. You might thrive in this role if you have: 10+ years of industry experience in hardware security or hardware–software co-design. Proven expertise in deploying secure hardware systems at scale and integrating secure hardware primitives. Strong coding skills in Rust and/or C/C++, with proficiency in Python. Proven ability to collaborate across teams, architect solutions,

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to the Quality leadership within Manufacturing Operations, the Senior Reliability Scientist is responsible for leading reliability activities across complex, high-performance systems. Working closely with established reliability experts and cross-functional teams, this role uses experimental data and advanced modelling to inform design decisions, validate product reliability and optimise serviceability strategies, including spares provisioning. The Team The Quality team within Manufacturing Operations is responsible for ensuring product robustness, reliability and lifecycle performance across Graphcore’s hardware portfolio. The team includes experienced reliability specialists and works closely with technology research, chip, board, system design, platform and operations teams to translate reliability insights into actionable improvements across the product lifecycle. Responsibilities and Duties: · Define and refine reliability requirements across silicon, board and system levels, working in partnership with research and design teams · Apply ad

About the Team OpenAI’s Hardware organization develops system and infrastructure solutions tailored to the demands of advanced AI workloads. We work across the full stack—from silicon to system integration—partnering closely with internal teams and external vendors to define and deliver next-generation AI infrastructure. Our team focuses on defining scalable, high-performance system architectures and reference designs that balance performance, cost, and operational efficiency across rapidly evolving technologies. About the Role We are seeking a 3P Architect to define and drive rack- and cluster-level reference designs in collaboration with external partners. This role is responsible for translating workload requirements and system-level goals into concrete architectures, aligning partners on critical design attributes, and ensuring vendor roadmaps meet our infrastructure needs. You will work closely with performance modeling and internal architecture teams to evaluate tradeoffs, while owning the end-to-end definition and execution of third-party system designs. This includes identifying gaps in current technologies, driving vendor development, and shaping future infrastructure capabilities. This role requires strong system intuition, cross-functional leadership, and the ability to operate effectively across internal teams and external ecosystems. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance. Key Responsibilities Define rack- and cluster-level reference architectures for AI infrastructure deployments. Translate workload requirements into clear system design specifications and partner deliverables. Collaborate with performance modeling teams to evaluate architectural tradeoffs and system behaviors. Align internal stakeholders and external partners on critical system attributes (performance, cost, power, reliability, scalability). Identify gaps in current technology offerings and dr

Block is one company built from many blocks, all united by the same purpose of economic empowerment. The blocks that form our foundational teams — People, Finance, Counsel, Hardware, Information Security, Platform Infrastructure Engineering, and more — provide support and guidance at the corporate level. They work across business groups and around the globe, spanning time zones and disciplines to develop inclusive People policies, forecast finances, give legal counsel, safeguard systems, nurture new initiatives, and more. Every challenge creates possibilities, and we need different perspectives to see them all. Bring yours to Block. The Role As a Legal Systems Architect, you will lead the design and evolution of the systems that power Legal, combining software engineering, system architecture, and legal domain expertise. This role is responsible for shaping how Legal leverages automation, data, and AI to operate more effectively at scale. You will work across a complex technology landscape — including ELM, eDiscovery, CLM, and AI platforms — to define and implement solutions that connect systems, improve workflows, and enable more intelligent ways of working. A core focus of this role is to design, build, and deploy AI-driven solutions, while also enabling all of the Legal to develop, adopt, and scale their own AI-powered workflows. This position requires a high degree of ownership, technical expertise, and adaptability. The ideal candidate must proactively identify strategic opportunities, and develop solutions that align immediate needs with the long-term architectural vision. You Will Define and evolve the architecture of legal systems, ensuring they are scalable, cohesive, and adaptable over time Identify and drive high-impact opportunities to improve legal workflows through automation, integration, and AI Apply a strategic and creative approach to solving complex legal and operational challenges Lead the design and implementation of solutions leveraging AI (Cla

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The DRAM Systems & Architecture Lab researches next-generation memory architectures that enable future AI, machine learning, and high-performance computing systems. The team explores innovative memory technologies, system architectures, and hardware-software co-design approaches to improve performance, scalability, and efficiency for emerging AI workloads. As a Research Intern in the DRAM Systems & Architecture Lab, you will conduct research focused on next-generation memory systems for AI accelerators. You will investigate tiered memory architectures, analyze AI workload behavior, develop experimental prototypes, and evaluate architectural innovations across hardware, software, and system-level environments. This role offers the opportunity to contribute to research that may influence future product roadmaps, publications, and advanced memory system designs. Responsibilities Research and evaluate tiered memory architectures designed to improve performance and scalability for AI inference and large language model workloads. Develop experimental methodologies, models, simulations, and prototypes to analyze memory system performance, data movement, and workload behavior. Investigate memory hierarchy optimizations, data placement strategies, cache management, and memory migration mechanisms across AI computing systems. Perform quantitative analysis using hardware platforms, simulation environments, and FPGA-based prototypes to evaluate architectural trade-offs. Document research finding

We are looking for a disciplined and dynamic, Lead System Engineer – compute blade and rack Validation to join our growing compute rack validation team. As a diligent leader in Systems Engineering, you will drive multiple aspects of validation throughout the life cycle of the program. In this high visibility position, you will be part of a leading team to innovate and improve system bring-up and enablement abilities, as well as silicon and system validation to deliver the highest quality, industry leading technologies to market. Your technical leadership skills, validation and debug expertise will be necessary towards product development, definition, root cause and resolution. Your agility and collaborative approach will be essential to work within System Validation & other engineering teams (System Architects, SoC and Rack FW etc). The technical leader will be driving keys areas of system validation including leading first silicon & system bring-up (nodes and rack level systems) - rack level systems and blades will be based of ARM server architecture. Candidate will be immersed in challenging system enablement work, system validation (end-to-end) methodology, tests development and execution as well as triage/debug of critical issues to meet critical program milestones at POR quality. The candidate will also be a key contributor to state-of-the-art HW and lab capabilities for Grapchore’s system engineering. The candidate should be able to work in a global environment while maintaining a synergetic culture. Primary Responsibilities: Lead the systemenablement (including first silicon and other FW components) to ensure system capabilities are brought up as per plan of record and system architecture spec. Drive organization wide methodology for Firmware integration and best known configuration (HW/FW/SW) usage model by leading the release of deployment ready solutions. Develop key methodologies, lab HW and system SW capabilit