Hardware Test Engineer

InnoPhase Inc., DBA GreenWave Radios™, is at the forefront of innovation in Open RAN digital radios. Our cutting-edge solutions, powered by the Hermes64 RF SoC, are designed to enhance network energy efficiency while dramatically reducing operational expenses, with purpose-built silicon that is the heart of ORAN-based active antenna arrays. Headquartered in San Diego, California, GreenWave Radios™ has established itself as a pioneer in delivering power-efficient digital-to-RF solutions. The company is supported by a talented team of over 100 engineers spread across four global R&D facilities. With an extensive portfolio of more than 120 global patents, GreenWave Radios™ continues to push the boundaries of radio technology and innovation. To learn more about GreenWave Radios™ and hear what our employees have to say, visit the GreenWave™ certification profile at GreatPlacetoWork.com or explore our Home - GreenWave Radios website. About the Role GreenWave Radios is seeking a highly technical Staff RF System Test Engineer to develop, automate, and execute system-level validation of next-generation RF SoC platforms from early silicon bring-up through production release. You will be a hands-on contributor responsible for uncovering complex RF performance issues, building scalable test infrastructure, and generating the data that drives critical design decisions. As a member of the Systems Engineering Group in San Jose, CA, this role sits at the intersection of RF hardware, embedded software, and test automation. You will work directly with designers and developers to characterize radio performance, debug challenging system behaviors, and create robust automated test solutions that ensure compliance with global wireless standards. The ideal candidate combines deep RF measurement expertise with strong software development skills and enjoys solving difficult technical problems through rigorous experimentation and data-driven analysis. What You'll Do Des

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary We are seeking a motivated engineer to join the DRAM Systems Engineering team, focusing on the development, evaluation, and optimization of next-generation memory systems for AI accelerators. This role emphasizes research and development across hardware architecture, operating systems, and performance analysis to support Agentic AI inference workloads. If you are ambitious and eager to make an impact in the exciting world of AI and memory systems, this is the perfect opportunity for you! Responsibilities Characterize AI inference workloads and examine memory behavior Build and evaluate tiered memory hierarchies for AI accelerators Study KV cache lifecycles, MoE models, and data placement strategies Compare and optimize explicit versus hardware-assisted data movement Develop, test, debug, and detail system-level and OS components Prototype and evaluate agentic AI systems by building agents and multi-agent workflows using modern frameworks and orchestration patterns (planning, tool use, memory, and context management). Apply these technologies both as workloads under study and as accelerators for internal engineering workflows <h2 style="color:!importan

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The DASG Architecture Lab and Customer Enablement Lab (CEL) teams provide the infrastructure, platforms, and technical expertise required to accelerate technology pathfinding, AI and system workload analysis, memory subsystem characterization, FPGA/LPDRAM prototyping, and customer enablement initiatives. These teams play a critical role in enabling architecture exploration, validation, and teamwork across engineering organizations and external partners. AI Efficiency and Usage is a must. AI proficiency or AI‑enabled ways of working where applicable. Agentic AI and Generative AI usage model is a must. Responsibilities Own the day-to-day bring-up, readiness, maintenance, and operational support of lab systems, racks, benches, test equipment, and reference platforms used by DASG Architecture Lab and Customer Enablement Lab teams. Deploy, configure, and maintain server, GPU, FPGA, client AI, mobile AI, analyzer, and environmental test equipment supporting workload characterization and technology pathfinding activities. Build and maintain stable, reproducible validation environments, including BIOS, BMC, firmware, operating systems, drivers, networking, remote access, and power and thermal configurations. Collaborate with architecture and validation teams to enable memory trace capture, workload analysis, DRAM replay, power and performance characterization, and data-driven engineering decisions. Develop and maintain operational processes for asset tracking, configuration management, equipme

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The DRAM Systems & Architecture Lab researches next-generation memory architectures that enable future AI, machine learning, and high-performance computing systems. The team explores innovative memory technologies, system architectures, and hardware-software co-design approaches to improve performance, scalability, and efficiency for emerging AI workloads. As a Research Intern in the DRAM Systems & Architecture Lab, you will conduct research focused on next-generation memory systems for AI accelerators. You will investigate tiered memory architectures, analyze AI workload behavior, develop experimental prototypes, and evaluate architectural innovations across hardware, software, and system-level environments. This role offers the opportunity to contribute to research that may influence future product roadmaps, publications, and advanced memory system designs. Responsibilities Research and evaluate tiered memory architectures designed to improve performance and scalability for AI inference and large language model workloads. Develop experimental methodologies, models, simulations, and prototypes to analyze memory system performance, data movement, and workload behavior. Investigate memory hierarchy optimizations, data placement strategies, cache management, and memory migration mechanisms across AI computing systems. Perform quantitative analysis using hardware platforms, simulation environments, and FPGA-based prototypes to evaluate architectural trade-offs. Document research finding

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Serve as the core technical individual contributor in design and validation of the on-chip controller and mixed signal circuitry in NAND Flash chips. Responsible for architecture development and product definition, system integration and full-chip and block-level validation planning and execution. Contribute to RTL design and implementation of the controller hardware, synthesis, APR and full timing closure as well as development of firmware code for NAND internal operations. Work closely with design teams both domestically and overseas on different projects. Employer will accept a Master’s degree in Electrical Engineering or related field. Position requires: 1. Verilog language; 2. Digital ASIC design methodology; 3. Mixed-mode design and validation; 4. Design or Verification CAD tools, including NCSim; 5. Design Compiler, Formality, or PrimeTime; 6. TCL, PERL, C, C&#43;&#43;, or Python; and 7. Non-volatile memory design (NAND). The US base salary range that Micron Technology, Inc. estimates it could pay for this full-time position is $173,607.10 - $ 246,000.00 . For additional pay & benefits information, please refer to the requisition at Micron.com/careers. As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide

About the Team DoorDash Labs is an independent team within DoorDash. We explore robotics and automation to transform last-mile logistics in the long term. If you have a passion for applying robotics solutions in a service used by millions of people, then we want to talk to you! About the Role As the Technician Lead, you will bridge the gap between high-level engineering goals and day-to-day shop floor execution. This is a "Player-Coach" role: you will spend 90-95% of your day as a hands-on contributor, executing high-level diagnostics and repairs alongside the team. You are responsible for ensuring the shift meets its daily output goals and uptime key results. While your primary focus is technical execution, you serve as the first point of escalation for the team and help ensure every technician is working efficiently and safely. You report to the Operations Manager, Service Operations, in our DoorDash Labs organization. This is an on-site role with expectations of 100% in-office work in the Bay Area, CA. This is across our locations in Fremont, San Jose, and Sunnyvale. You’re excited about this opportunity because you will… Lead the team to hit fleet uptime and repair goals while personally executing the most complex robotic diagnostics Perform advanced repairs, including component-level troubleshooting and fixes on intricate electrical systems, control units, and associated hardware, with minimal supervision Act as the process owner for the service center, creating and refining workflows that improve repair accuracy and shop efficiency Provide a high level of dependability and accuracy in all technical documentation and shift handovers, setting the "Gold Standard" for the technician team Lead medium-to-high complexity projects tied directly to fleet uptime and reliability key results from start to finish Serve as the primary DRI for troubleshooting systemic hardware issues and escalating critical bottlenecks to engineering Communicate clear success metrics for mai