Intern - DRAM Design Rules

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is a global leader in DRAM technology, driving innovation that enables the next generation of computing, artificial intelligence, and data-driven applications. The DRAM Technology Development organization focuses on advancing semiconductor manufacturing capabilities through collaborative research, process innovation, and technology scaling. Team members work across multiple engineering fields to develop breakthrough memory solutions that shape the future of the industry. As a Process Integration Engineer, you will contribute to the development of next-generation DRAM technologies by collaborating with process, materials, device, and design engineering teams. This role is responsible for coordinating module-related development activities, defining technical requirements, resolving complex integration challenges, and supporting the successful execution of technology development programs. The ideal candidate will possess strong semiconductor process integration knowledge and a passion for advancing future memory architectures within a fast-paced R&D environment. Responsibilities Define technology landmarks, design rules, structural and electrical specifications, and integration requirements for next-generation DRAM products. Collaborate with multi-functional teams including simulation, process development, process architecture, circuit design, and quality engineering to achieve technical objectives and project timelines. Lead module-related integration activities, identify techni

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is a global leader in DRAM innovation, developing memory technologies that enable the next generation of computing, artificial intelligence, and data-driven applications. Within the Technology Development organization, the Process Integration team drives the development of future DRAM architectures by coordinating device, materials, and process innovations across multiple engineering fields. Team members work in a highly collaborative R&D environment to solve complex technical challenges and accelerate technology scaling. As a Process Integration Engineer Intern, you will contribute to the development of next-generation DRAM memory technologies through multi-functional collaboration involving process integration, device engineering, materials development, and process architecture. This role requires strong technical expertise, analytical problem-solving skills, and the ability to coordinate activities across multiple engineering organizations to achieve technology achievements and product objectives. Responsibilities Define technology achievements, design rules, structural requirements, and electrical specifications for next-generation DRAM technologies while supporting achievement of program targets and timelines. Collaborate with process development, simulation, process architecture, circuit design, and quality teams to ensure alignment with product and technology requirements. Develop and maintain documentation related to process integration plans, technical risks, issue resolution,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Intern Product Yield Enhancement (PYE) Engineer at Micron Technology Inc., you will assist in taking next generation DRAM devices from design to mass production! PYE Engineers are crucial partners between Research and Development, Manufacturing, Product Engineering and Global Quality teams. Our goal is to offer hands-on and substantial engineering projects that allow interns to gain valuable experience with memory systems and the product life cycle while adding impact to Micron’s business. Our intern programs help prepare engineers for future roles and offer an extraordinary experience that supplements your academic experience! The PYE Engineering role is critical to Micron as it serves the company's charter to be the most cost-effective producer of DRAM memory while delivering the quality and reliability that customers expect from the Micron brand. This position is for a 3-month internship. Responsibilities: Your job duties will include detailed DRAM electrical and physical failure analysis. Identify defects introduced by the semiconductor fabrication process. You will data mine using statistical analysis, AI assisted engineering tools, and automation workflows. Find the root cause of failure mechanisms, communicating results with Management, Product, Process and Test Engineering teams. Complete 3-month internship. Minimum Qualifications: Must be pursuing a minimum of a bachelor’s degree in Electrical Engineering, Computer Engineering,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As part of Micron's DRAM Verification organization, you will work within a highly innovative engineering team responsible for verifying advanced memory products that power next-generation computing systems. The team develops and validates sophisticated DRAM technologies that require complex functionality verification, ultra-high-speed operation, advanced low-power capabilities, and power management features. As a DRAM Verification Engineering Intern, you will collaborate with global design and verification teams to ensure the quality and functionality of future DRAM products. You will gain hands-on experience using industry-standard verification tools, simulation environments, debugging methodologies, and advanced verification techniques while contributing to real product development efforts. This role also provides opportunities to employ Artificial Intelligence and AI Assisted tools to improve verification efficiency, analysis, and workflow automation. Responsibilities Perform verification activities including datasheet analysis, verification planning, simulation execution, coverage analysis, debugging, and results review. Support modeling and simulation efforts using industry-standard verification and circuit simulation tools. Collaborate with global design, verification, and multi-functional engineering teams to drive standardization, improve design quality, and support successful product development. Contribute to innovation in future memory technologies by applying adva

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, the DRAM Design organization develops industry-leading memory solutions that span technology development, advanced circuit design, product engineering, system validation, and manufacturing enablement. Teams collaborate globally to deliver innovative memory products that meet demanding requirements for performance, quality, reliability, and time-to-market. As an Intern DRAM Design Engineer, you will contribute to the design, analysis, verification, and optimization of digital, analog, and mixed-signal circuits used in next-generation memory products. You will work closely with design, verification, product engineering, test, process integration, assembly, and marketing teams to support new product development and manufacturability initiatives. This role also provides opportunities to apply Artificial Intelligence and AI Assisted methodologies to improve design workflows, automation, and design quality. Responsibilities Play a key role in the development of new memory products through circuit build, layout, optimization, and validation of Memory, Logic, and Analog circuits. Support physical design activities including parasitic modeling, floor-planning, placement, routing, reticle experiments, tape-out revisions, and design verification using industry-standard simulation tools. Collaborate with global design, verification, product engineering, test, process integration, assembly, and marketing teams to improve manufacturability, quality, and product performance. Proactiv

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Design Technology Co-Optimization (DTCO) team works at the intersection of process technology, standard cell architecture, and design implementation to optimize power, performance, and area (PPA) for advanced memory products. The team collaborates closely with standard cell library, RTL, and physical design engineers to evaluate design tradeoffs and develop methodologies that improve silicon outcomes. As a DTCO Intern, you will gain hands-on experience assessing and optimizing PPA at the standard cell and logic block level. You will use industry-standard place-and-route tools and AI-enabled automation techniques to implement, benchmark, and optimize logic blocks while developing practical skills in physical design, timing closure, and design analysis. Responsibilities Implement standard cell logic blocks using industry-standard physical design tools, including floorplanning, placement, clock tree synthesis (CTS), routing, and optimization activities focused on PPA assessment. Analyze and benchmark power, performance, and area across standard cell libraries and logic block configurations, identifying opportunities for improvement. Perform static timing analysis (STA), investigate setup and hold timing violations, and support timing closure activities. Execute physical verification checks, including DRC, LVS, and IR-drop analysis, and assist with resolving design issues. Leverage Generative AI, AI Assistants, and Agentic AI solutions to automate data collection, reporting, comparison, and w