Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is looking for a hands-on Manufacturing Engineer to own the manufacturing interface between package design, semiconductor assembly, package test, board assembly, and final product integration. This role is focused on making advanced packages manufacturable and transferable from design engineering into qualified OSAT processes and downstream board/system assembly. You will work closely with Packaging Engineering, Silicon Manufacturing and Test, Quality, Supply Chain, PCB/board design, and external partners such as substrate suppliers, OSATs, test houses, and contract manufacturers. The ideal candidate understands how package decisions—such as package size, substrate construction, bump and ball design, warpage, underfill, materials, and assembly location—affect package yield, package test, PCB footprint and stencil design, SMT assembly, and final product readiness. This role is remote based out of Taiwan but requires close engagement with regional OSATs, foundry/test partners, contract manufacturers, and Tenstorrent engineering teams across multiple time zones. Regular on-site presence at partner factories is expected during qualification, commissioning, build, and ramp activities. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and of
Packaging Engineer- Bump Interconnect
Salary not disclosed
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Role overview
Job description
We’re seeking an experienced engineer to lead bump interconnect development for advanced semiconductor devices (2.5D/3D/chiplet/fan-out). This role spans ubump and C4 bump metallurgy, RDL design and plating, chip-side and interposer capture pad design rules, OSAT engagement, reliability, failure analysis, and cross-functional support through package and system productization. Core Responsibilities Own end-to-end bump interconnect development for both ubump (micro-bump) and C4 processes, including bump formation, and reflow for use with mass reflow, TCB, and LAB chip attach for high-performance semiconductor packages. Define and own bump metallurgy stacks for ubump (e.g., Cu pillar/SnAg) and C4 (e.g., SAC alloys) interconnects, including UBM selection and pad finish specifications for both chip-side and interposer capture pads. Develop and own design rules for bump interconnects inc
…What they are looking for
Skills & requirements
Qualification
Support reliability qualification including thermal cycling, drop, mechanical shock, and power cycling
Department · Advanced Packaging
Hiring company
Volantis Semiconductor, Inc.
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