PHY/SERDES Lead

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Title: Technical Leadership Plrogram - Member Of Technical Staff – HBM Verification Location: Hyderabad, India Experience : 12+ years in Design Verification (experience with Pre-Silicon Verification OR DDR/GDDR/LPDDRmemory/SerDes PHY IP Verification is preferred) Role Description Join the Micron HBM team where you will drive verification architecture for next-generation HBM, ensuring robust methodologies and sign-off strategies. This role is perfect for a hands-on silicon verification expert who is passionate about developing best-in-class verification methodologies, testbench design, AI enabled verification and developing novel solutions to improve quality and efficiency of verification workflows. Key Responsibilities Define and drive verification architecture and methodology for next generation HBM designs. Develop verification plans, coverage strategies, and sign-off criteria. Architect and implement UVM-based testbenches and reusable verification components. Apply Formal Verification techniques for critical Collaborate strictly with build teams to ensure verification completeness and quality. Mentor and guide verification engineers on guidelines and advanced methodologies. Evaluate and integrate AMS Co-Simulation techniques for mixed-signal IP verification. Work closely with EDA vendors to adopt the l

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Title: Principal Engineer – HBM Verification Location: Hyderabad, India Experience : 12+ years in Design Verification (experience with Pre-Silicon Verification OR DDR/GDDR/LPDDRmemory/SerDes PHY IP Verification is preferred) Role Description Join the Micron HBM team where you will drive verification architecture for next-generation HBM, ensuring robust methodologies and sign-off strategies. This role is perfect for a hands-on silicon verification expert who is passionate about developing best-in-class verification methodologies, testbench design, AI enabled verification and developing novel solutions to improve quality and efficiency of verification workflows. Key Responsibilities Define and drive verification architecture and methodology for next generation HBM designs. Develop verification plans, coverage strategies, and sign-off criteria. Architect and implement UVM-based testbenches and reusable verification components. Apply Formal Verification techniques for critical Collaborate strictly with build teams to ensure verification completeness and quality. Mentor a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Title: Principal Engineer – HBM Verification Location: Hyderabad, India Experience : 12+ years in Design Verification (experience with Pre-Silicon Verification OR DDR/GDDR/LPDDRmemory/SerDes PHY IP Verification is preferred) Role Description Join the Micron HBM team where you will drive verification architecture for next-generation HBM, ensuring robust methodologies and sign-off strategies. This role is perfect for a hands-on silicon verification expert who is passionate about developing best-in-class verification methodologies, testbench design, AI enabled verification and developing novel solutions to improve quality and efficiency of verification workflows. Key Responsibilities Define and drive verification architecture and methodology for next generation HBM designs. Develop verification plans, coverage strategies, and sign-off criteria. Architect and implement UVM-based testbenches and reusable verification components. Apply Formal Verification techniques for critical Collaborate strictly with build teams to ensure verification completeness and quality. Mentor a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Be part of a highly skilled and challenging high-speed PHY design team working on advanced technology nodes (12nm and below). Own analog sub-blocks within the PHY and drive specification, design, simulation, reliability, and mixed-mode verification. Leverage AI-enabled tools to improve productivity and decision-making. Drive layout implementation through mask designers while ensuring compliance with process rules and DFM requirements. Participate in design reviews with internal teams and customers, explaining design choices and robustness. Collaborate with cross-functional teams across multiple global locations. Create IP EDA views including Behavioral models, Verilog-A, timing views, and abstracts. Participate in silicon bring-up, characterization, and correlation of silicon results with models and simulations. Mentor and guide junior engineers. Competitive compensation and equal opportunity workplace. Required Skills Strong analog/mixed-signal CMOS circuit design experience in deep sub-micron technologies (2nm to 28nm). Experience in High-Speed Memory Interfaces (DDR3/4/5, LPDDR5/6, GDDR5/6/7) or SerDes Interfaces (PCIe, MIPI, HDMI, USB, SATA, etc.). Full ownership experience of at least one critical PHY sub-block such as: PLL DLL CDR High-speed Receiver with Equalization Transmitter Front-End High-Speed Data Path </ul

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Post-Silicon Yield & RMA Leadership Lead end-to-end investigation of silicon yield loss, field returns, customer escalations, and reliability failures. Drive root-cause analysis for complex silicon issues spanning process, design, test, package, and system interactions. Develop hypothesis-driven debug strategies and coordinate multi-functional execution. Own resolution of critical yield and quality issues through containment, corrective actions, and prevention plans. Device Technology & Process Interaction Analysis Analyze device-level failure mechanisms and process sensitivities impacting ASIC functionality and yield. Evaluate design-process interactions affecting analog, mixed-signal, memory, high-speed I/O, and PCIe PHY performance. Partner with foundry teams to understand process variations, excursions, reliability risks, and technology limitations. Translate silicon learning into actionable design and process improvements. Advanced ASIC Design Interaction & Silicon Debug Lead root-cause investigations involving design-process interactions affecting SRAM, PCIe PHY, ONFI interfaces, SerDes, analog/mixed-signal circuits, and high-speed digital subsystems. Analyze silicon failures across transistor, circuit, block, die, package, and system levels. Drive post-silicon debug activities involving design teams, DFT, product engineering, quality,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description The HBM Architecture team develops advanced datapath solutions that enable industry‑leading bandwidth, power efficiency, reliability, and scalability for Micron’s next‑generation High Bandwidth Memory (HBM) products. The team collaborates closely across design, PHY, ECC, verification, layout, and system groups to drive innovative logic‑die and core‑die architectures from concept through production. We are seeking a highly motivated HBM Datapath Architect to architect, design, and optimize high‑speed data paths for next‑generation High Bandwidth Memory (HBM) products! This role focuses on logic‑die and core‑die datapath circuitry, enabling industry‑leading bandwidth, power efficiency, reliability, and scalability across JEDEC and custom HBM solutions. The ideal candidate will work closely with design, PHY, ECC, verification, layout, and system teams to deliver robust datapath designs from concept through silicon bring‑up and production. Responsibilities will include, but are not limited to: Architect and design HBM read and write datapath across core and logic die, including alignment, buffering, timing, and control logic Develop high‑speed, low‑latency datapath circuits supporting multi‑channel HBM architectures and wide internal buses Optimize datapath designs for bandwidth, power, area, and timing closure at advanced technology nodes