Job Details: Job Description: The Role and Impact As a Sr Deep Learning Hardware Verification Engineer, you will play a pivotal role in shaping the future of AI hardware by validating and optimizing next-generation NPU silicon solutions. In this role you will join the NPU Hardware Pre-Silicon Validation team working closely with design engineers, model engineers and AI architects to validate components of the next generation NPU IP portfolio, your contributions will directly shape Intel's advancements in AI technologies. Your responsibilities will include: • Functional Verification of complex digital design block(s) on the latest generations of Intel's NPU AI accelerators. • Architect, development and implementation of verification environments from initial planning through the validation lifecycle to review and signoff. • Development of test plans and test cases. • Implementation of random test generators, high level transactional models, bus functional models (BFMs), functional/formal constraints, checkers and scoreboards, coverpoints/covergroups and SVA properties. • Implementation of software based testcases for functional and performance based testing of the NPU AI accelerators. • Collaborate with cross-functional teams to analyses and address next-generation AI requirements, influencing the AI product roadmap. Leixlip is the primary location for this position, however, we offer some flexibility to support your work/life balance arrangements. Business group The Artificial Intelligence and Deep Learning team drives innovation in AI hardware development, aligning with Intel's mission to deliver world-class solutions in the AI domain. With a focus on building state-of-the-art hardware that supports cutting-edge AI models, the team collaborates across Intel to en
Role overview
Job description
Job Details:
Job Description:
The Role and Impact
You will be part of a highly skilled, agile design/verification team developing cutting-edge hardware for the NIC, IPU and AI domains.
As an IP Design Verification Engineer, you will play a crucial role in ensuring the functionality and reliability of complex designs. You will develop verification plans, create test benches, and build environments to thoroughly validate meaningful parts of the chip — complex IPs and subsystems.
Your work will directly contribute to identifying and resolving bugs in the pre-silicon environment using simulation and/or Formal Property Verification techniques, ensuring robust designs that meet high-performance standards.
We are intentional, fast adopters of AI as a working tool. We bring modern AI assistants and automation into every part of the verification flow — planning, stimulus and checker development, coverage analysis, debug and more.
Business group
You will be joining Intel's Central Engineering Group (CEG), a global organization responsible for designing and verifying industry-leading IPs and architectures that power Intel's NIC, IPU and ASIC products. The group produces innovative technologies and solutions for hyperscalers, cloud providers, networking, AI and other specialized workloads.
As part of this dynamic team, you will contribute to Intel's commitment to advancing silicon and system innovation.
Key Responsibilities
- Develop and execute IP verification plans, ensuring thorough coverage of microarchitecture specifications.
- Design and implement test benches and verification environments to validate functionality and reliability.
- Utilize AI and simulation models to analyze power, timing, and uncover bugs.
- Debug, identify root causes, and implement corrective measures for failing tests in the pre-silicon environment.
- Collaborate closely with architects, designers, DFT, and emulation/bring-up teams to ensure correctness from block to system level.
- Maintain and improve existing functional verification methodologies and infrastructure.
- Document test plans, participate in technical reviews, and drive verification improvements.
Qualifications:
Minimum Qualifications
- Bachelor's degree in electrical engineering, Computer Engineering, Computer Science, or related fields.
- 5+ years of experience in functional design verification of ASIC, SOC or FPGA designs with expertise in System Verilog, OVM/UVM, and debugging tools.
- Proficiency in creating IP test environments and/or using formal verification methods
- Strong knowledge of digital design fundamentals and microarchitecture principles.
Preferred Qualifications
- Master's or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field with relevant experience in design verification.
- Experience with formal property verification, System Verilog Assertions, code and functional coverage implementation and analysis
- Experience collaborating across teams to drive architectural improvements.
- Use of AI tools would be an advantage. At a minimum, require someone that is passionate about performing Pre-Silicon DV harnessing the power of AI.
- Experience with switching/routing and communications protocols such as Ethernet, and Cryptographic Protocols such IPSec, DTLS and MACSec.
- Experience with AMBA protocols such as APB and AXI.
- Experience with languages such as SystemC, Python, Perl, Shell scripting and how AI can be used to integrate these in verification flows.
We invite you to bring your expertise and enthusiasm to a team where your contributions will drive technological progress and create opportunities for impactful learning and growth.
Job Type:
Experienced HireShift:
Shift 1 (Ireland)Primary Location:
Ireland, LeixlipAdditional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of Trust
N/A
EU Salary
We offer a total compensation package that ranks among the best in the industry.
Annual Salary Range for this job which could be performed in Ireland is: €53,200.00 - €98,800.00 The compensation range displayed in this posting reflects the minimum and maximum target compensation for this position. Within this range, individual pay is determined by job related skills, experience, and relevant education, training. As part of our total compensation approach, the final offer may include additional pay components and benefits. Your recruiting team will share the confirmed base salary along with any applicable total compensation elements upon employment offer delivery.Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
What they are looking for
Skills & requirements
Qualification
Bachelor's degree in electrical engineering , Computer Engineering, Computer Science, or related fields; 5+ years of experience in functional design verification of ASIC, SOC or FPGA designs with expertise in System Verilog, OVM/UVM, and debugging tools
Hiring company
Intel
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