Signal and Power Integrity Engineer

We are seeking a highly skilled and visionary Staff Signal and Power Integrity (SI/PI) Engineer to join our advanced hardware engineering team. In this role, you will be the definitive technical expert responsible for ensuring the signal quality, timing, and power delivery robustness of our most complex, next-generation robotaxi electronic systems. As a technical pillar within the organization, you will define overarching SI/PI architectures, establish company-wide simulation methodologies, guide electrical design and layout teams, and own the end-to-end sign-off for cutting-edge high-speed interfaces. In This Role, You Will Lead the SI/PI architecture and define constraints for next-generation, high-complexity, high-density printed circuit boards (PCBs) and overall system design. Collaborate at an architectural level with hardware design, silicon vendors, PCB layout, and mechanical engineering teams to define layer stack-ups, routing strategies, component placement, and power delivery architectures. Analyze, optimize, and sign off on advanced high-speed serial links (PCIe, Ethernet, MIPI, GMSL) and memory interfaces (LPDDR). Provide expert-level design guidance and validation for automotive-specific communication and audio protocols (A2B). Architect and conduct comprehensive Power Delivery Network (PDN) analysis, including DC IR drop, AC impedance modeling, and transient response analysis to ensure stable power delivery across complex multi-board systems. Drive the development of advanced SI/PI routing rules, simulation methodologies, automation scripts, and sign-off processes for the hardware engineering department. Tackle the most complex, unprecedented signal and power integrity challenges, performing hands-on root-cause analysis, lab measurements, and correlating simulation models with real-world testing. Act as a technical mentor and subject matter expert, elevating the SI/PI capabiliti

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for signal integrity (SI) system design engineers who have a deep expertise in the SI area, and hold strong system level design knowledge This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Lead system signal integrity (SI) design for AI supercomputer product in the data center application. Collaborate with chip, package, boards, rack and system engineers, design partners to drive system SI design and develop innovative interconnect and high-speed technologies Identify and evaluate new technologies and methodologies to improve signal and power integrity in product design, and contribute to the development of new products and technology by providing expertise in signal integrity Perform simulation and modeling to identify and troubleshoot signal integrity issues Lead system interconnect design, bring up and qualification As the scope of the role and team grows, understand and influence roadmaps for hardware partners for our datacenter networks, racks, and buildings. You might thrive in this role if you: Have at least 10 years of industry experience, including experience design hardware system and SerDes testing for data center applications Have a strong bias toward action, and won’t take no for an answer. Have experience and good knowledge of system design experience in the SI areas, from chip, SerDes, board, rack level Have ex

About the job Shape the power-delivery architecture behind Graphcore’s high-performance AI compute systems, from voltage regulation through package, PCB and silicon. As Staff Power Integrity Engineer, you will provide technical leadership on Graphcore’s most complex power-delivery challenges. Your analysis and judgement will directly influence architecture and product decisions. You will define modelling strategies, optimise decoupling and analyse PDN impedance, voltage droop, transient response and regulator interactions. You will turn complex results into clear engineering decisions, requirements and sign-off approaches. You will lead significant PI issues through resolution and create alignment across silicon, package, board, power, systems and validation teams. You will also develop reusable methods and mentor engineers, raising power-integrity capability across Graphcore. The team and culture The Signal and Power Integrity team sits at the centre of Graphcore’s hardware development. We work across disciplines to understand electrical behaviour and guide consequential architecture decisions. You will own complex PI problems and drive them through to resolution. Decisions are grounded in modelling, first-principles reasoning, hardware evidence and clear assessment of uncertainty. You will challenge assumptions, communicate risk clearly and help teams make pragmatic trade-offs. Technical influence matters more than reporting lines. What we’re looking for Deep practical expertise in power integrity and complex power-delivery network design. Strong understanding of PDN impedance, transient behaviour, voltage droop, resonance, stability and decoupling across high-current digital systems. Ability to reason across silicon, package, PCB, voltage regulation and system boundaries. Strong capability in electromagnetic modelling, circuit simulation, model extraction and selecting appropriate abstraction methods. Engineering judgement to assess model validity, uncertainty an

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Within the larger SI R&D group, as a Principal Signal Integrity Engineer at Micron, you will be responsible for: Leading the development and analysis of high speed (HS or similar expertise) memory interfaces and power distribution networks (PDN) . Applying AI/ML and data-driven techniques to accelerate Signal Integrity / Power Integrity analysis, build optimization , and engineering decision-making. Applying automation, scripting, and AI-assisted engineering workflows to improve simulation efficiency and coverage. Representing the Signal Integrity R&D team in technical cross-functional collaborative groups , integrating with package build, silicon develop, system invent, product engineering, and marketing departments to ensure overall product performance. Driving and developing SI/PI aspects of future standards (including but not limited to JEDEC, ONFI, and IBIS) through system and product electrical capability exploration. Supporting external customers as needed. Formulating techniques and protocols for SI/PI analysis. Supporting and driving path-finding activities for IO and channel innovation to enable the next generation of memory technologies at higher speeds and densities. Minimum Qualifications PhD or MSEE, or equivalent experience, with at least 5 years of industry experience. Deep experience in Signal and Power Integrity, particularly in areas affecting I/O circui

About the job Design the high-speed signal paths that let advanced AI compute systems perform at datacentre scale. As a Signal Integrity Engineer, you will shape the electrical performance of Graphcore hardware platforms. Your work will help 112Gbps and 224Gbps SERDES, DDR and processor interfaces operate within demanding system budgets. You will develop, extract and simulate PCB structures across production systems and test boards. You will define launches, via structures, transmission lines, stack-ups and low-loss materials for future designs. This role spans simulation, lab validation and practical design influence. You will work from concept through prototype bring-up, debug, validation and support for manufacture. The team and culture You will join the Hardware Engineering team, working closely with PCB, package substrate, system architecture and supplier teams. Work moves through simulation, design review, lab evidence and practical trade-offs. You will be expected to own signal integrity decisions across complex board and package interfaces. The team values careful analysis, pace and clear communication when problems need action. Decisions are made close to the engineering detail. You will challenge designs, guide constraints and help teams reach the best performance possible. What we’re looking for · Strong experience in high-speed digital circuit development, with deep signal and power integrity knowledge · Experience with high-frequency SERDES design and validation, including tens of GHz operation · Expertise using tools such as ANSYS SIWave, HFSS, Mentor HyperLynx or similar · Ability to design BGA and connector launches, via structures and transmission lines for GHz signals · Hands-on lab experience using VNAs, high-speed oscilloscopes and signal generators · Rigorous approach to design, debug and validation, with strong ownership and communication skills While we have outlined a set of requirements, we value transferable skills and diverse experiences.

About the job Design the high-speed signal paths that let advanced AI compute systems perform at datacentre scale. As a Signal Integrity Engineer, you will shape the electrical performance of Graphcore hardware platforms. Your work will help 112Gbps and 224Gbps SERDES, DDR and processor interfaces operate within demanding system budgets. You will develop, extract and simulate PCB structures across production systems and test boards. You will define launches, via structures, transmission lines, stack-ups and low-loss materials for future designs. This role spans simulation, lab validation and practical design influence. You will work from concept through prototype bring-up, debug, validation and support for manufacture. The team and culture You will join the Hardware Engineering team, working closely with PCB, package substrate, system architecture and supplier teams. Work moves through simulation, design review, lab evidence and practical trade-offs. You will be expected to own signal integrity decisions across complex board and package interfaces. The team values careful analysis, pace and clear communication when problems need action. Decisions are made close to the engineering detail. You will challenge designs, guide constraints and help teams reach the best performance possible. What we’re looking for · Strong experience in high-speed digital circuit development, with deep signal and power integrity knowledge · Experience with high-frequency SERDES design and validation, including tens of GHz operation · Expertise using tools such as ANSYS SIWave, HFSS, Mentor HyperLynx or similar · Ability to design BGA and connector launches, via structures and transmission lines for GHz signals · Hands-on lab experience using VNAs, high-speed oscilloscopes and signal generators · Rigorous approach to design, debug and validation, with strong ownership and communication skills While we have outlined a set of requirements, we value transferable skills and diverse experiences.