Sr. Logic Design Engineer

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Design Verification Engineer to lead pre-silicon verification of the Beowulf SoC, with focus on the Compute Subsystem (CSS), DDR memory subsystem, and Fabric NoC. This role will drive coverage, coherency, memory traffic, connectivity, error handling, and bring-up features critical to silicon success. This role is hybrid, based out of Boston, MA; Toronto, ON; or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Deeply curious about SoC architecture, compute systems, DDR behavior, and Fabric NoC/interconnect verification. Expert in UVM, SystemVerilog, coverage-driven verification, assertions, and subsystem-level debug. Experienced in verifying compute subsystems, DDR controllers and PHY-facing logic, NoC/interconnect protocols, coherency, ordering, and data movement. Comfortable with reset, power management, error handling, performance, and high-concurrency system scenarios. Proactive, detail-oriented, and effective in cross-functional technical discussions. Familiar with Python, C/C++, Tcl, CocoTB, or similar verification automation tools. What We Need Develop and own scalable verification environmen

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team to define and implement RTL for high-performance CPUs. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in CPU microarchitecture with expertise in Rename, Scheduler, ROB, Load Store, Branch Prediction, Cache or Datapath. Skilled in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation, synthesis, and power analysis. Proficient in debugging RTL/logic across multiple design hierarchies and pre/post-silicon environments. Background in microarchitecture definition, design specification, and performance-driven trade-off analysis. What We Need Own RTL design and microarchitecture development for a portion of a CPU block of a high-performance RISC-V CPU. Collaborate closely with DV, PD, and performance engineers to meet functional, timing, and power goals. Use innovative techniques to optimize power, performance, and

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team to drive infrastructure for performance analysis, correlation and verification. You’ll work on a CPU based on RISC-V ISA, collaborating with core architects and RTL teams to deliver a highly efficient and performant design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Strong problem solver who can identify complex issues, develop practical solutions, and drive them through implementation. Enjoy building tools and improving the infrastructure, workflows, and methodologies that make CPU development more efficient. Skilled in C++ and Python, with experience using industry-standard compilation, simulation, and emulation tools. Experience with verification infrastructure and methodologies along with knowledge of high-performance CPU architecture and microarchitecture. Proficient in debugging RTL and logic across multiple design hierarchies and pre-silicon environments. What We Need Join a team driving improvements in CPU microarchitecture, verifying performance, and correlating results between RTL and the performance mode

Topgolf is looking for a Senior Unity Developer to join our Games team and help lead the next generation of interactive experiences played by millions of Guests across our venues. This role sits at the intersection of game development, real-world sports, connected venues, and large-scale entertainment technology. You will lead the design and architecture of Unity-based games and experiences that run in Topgolf bays, using ball-tracking data, venue systems, real-time scoring, and engaging game mechanics to create fun, social, competitive gameplay. You will lead a small group of engineer’s day to day, partner closely with game designers, artists, UX/UI designers, QA, product owners, and platform engineers, and act as the primary technical voice for the Games team, from roadmap through national rollout. Responsibilities Architect, develop, and optimize Unity games and interactive experiences for Topgolf venues, making key technical decisions for the systems you own. Design gameplay systems, UI, animation, scoring, camera behavior, effects, and game-state logic that other engineers can build on. Lead integration of Unity games with internal Topgolf services, APIs, tracking systems, configuration tools, and venue hardware. Partner with designers and product owners to translate ambiguous game concepts into playable prototypes and production-ready experiences, shaping technical feasibility early. Collaborate with artists and technical artists on asset pipelines, shaders, VFX, animations, and performance-conscious visuals, and set technical standards for quality. Drive down defect rates by improving testability, diagnosing hard-to-reproduce issues, and coaching others on debugging complex venue and platform issues. Write clean, maintainable, well-structured C# code and set the bar in code reviews. Own and improve build, deployment, and development workflows across the Games tea

The team + the role Pendo's Data & GTM Intelligence org exists to make the revenue organization faster, smarter, and more effective. We sit at the intersection of data, AI, and GTM execution. We hold ourselves accountable to whether the teams we support are getting measurable, lasting value from our work. This role owns the operational foundation for Pendo's Marketing organization: process design, planning cycles, and strategic partnership with Marketing leadership. You stay close to the business - deeply embedded in the Marketing org, with a point of view on where process, data, or AI could unlock better outcomes. You also serve as the Marketing pod lead, the coordination point for Applied AI, Business Systems, and Data work that touches your function. You operate with significant autonomy. You identify what is broken, design the solution, and bring stakeholders along. The best person for this role has strong customer engineering domain knowledge, sharp analytical instincts, and genuine enthusiasm for rebuilding operations around AI. What this looks like day-to-day Own core Marketing operational work: campaign operations governance, pipeline modeling, and process architecture. Own the MOps process layer: lead processing logic, lead source and source detail hierarchy, audience and nurture processors, demand processing workflows, and campaign naming and governance standards. Design and improve the full campaign-to-pipeline workflow, from lead creation and routing through SLA governance and MQL processing. Partner with Analytics to translate data into clear, actionable recommendations for Marketing leadership. Stay deeply embedded in the Marketing org. Decompose how work actually gets done: map the full activity chain behind a campaign, a content workflow, and identify where process gaps, not tool gaps, are costing pipeline. Define what good looks like for data quality and lead flow, surface issues, and work with Business Systems to fix them upst

About Paytm Paytm is a pioneer of digital payments in India, serving over 450 million consumers and 45 million merchants across payments, financial services, and commerce. Over the years, Paytm has built deep in-house capabilities across technology, data, and operations to operate at scale with high reliability. About the role We're looking for product managers who think deeply about consumers and move fast. You'll own a meaningful area of product used by a large and diverse set of Indian consumers, making decisions that show up in people's hands within weeks. This is a role for builders who treat ambiguity as opportunity. What you'll do You'll own the strategy and execution for your product area end to end — from identifying the right problem to shipping and iterating. You'll spend real time understanding users (not just reading research decks), translate insight into crisp product bets, and partner closely with design, engineering, and business to ship. You'll be measured on outcomes, not output, and you'll be expected to drive your area with minimal hand-holding. What we're looking for ● 3–8 years of experience, ideally in entrepreneurship, building consumer products or top-tier consulting. ● Strong consumer intuition — you have opinions about why products work, and you can defend them with both logic and evidence. ● High agency. You define the problem, find the path, and get it done without waiting for permission. ● Sharp analytical and structured thinking, balanced with a bias for action. ● Comfort operating in a fast-paced, high-ownership environment where speed and judgment both matter. Why this matters You’ll be at the cutting edge of tech and finance. You'll build for one of the largest and most diverse consumer bases in the world, ship at scale and at pace. The problems are hard, the impact is immediate, and the autonomy is real. Why join us? ● A collaborative output driven program that brings cohesiveness across