Analytics Lead Jobs

BD Head (Roads) is responsible for leading the company's business development strategy in the RMRW business by identifying growth opportunities, evaluating project feasibility, and driving both organic and inorganic expansion. The BD Head will oversee high-level financial analysis, bid management, and strategic stakeholder engagement to secure new business opportunities while also providing strategic recommendations to the executive team. Source: Adani Group | Job ID: 58719

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team to define and implement RTL for high-performance CPUs. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in CPU microarchitecture with expertise in Rename, Scheduler, ROB, Load Store, Branch Prediction, Cache or Datapath. Skilled in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation, synthesis, and power analysis. Proficient in debugging RTL/logic across multiple design hierarchies and pre/post-silicon environments. Background in microarchitecture definition, design specification, and performance-driven trade-off analysis. What We Need Own RTL design and microarchitecture development for a portion of a CPU block of a high-performance RISC-V CPU. Collaborate closely with DV, PD, and performance engineers to meet functional, timing, and power goals. Use innovative techniques to optimize power, performance, and

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking a Senior Cost Accounting Manager to join our world-class accounting team. You will play a critical role in owning manufacturing cost accounting — including inventory, fixed assets, and COGS — building out standard cost processes, and partnering cross-functionally with Supply Chain, Sales, and R&D to drive accurate, scalable financial reporting as we grow toward IPO readiness. This role is hybrid, based out of Austin, TX; Santa Clara, CA; or Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Accounting or Finance degree; CPA strongly preferred. 8+ years in manufacturing or hardware cost accounting. Deep U.S. GAAP knowledge for inventory, fixed assets, and COGS. Expert with standard costing, variance analysis, and cost roll-ups. Comfortable turning Supply Chain, Sales, and R&D activity into accurate results. What We Need Own inventory, fixed asset, and COGS accounting under U.S. GAAP. Build and scale the cost accounting function for IPO readiness. Maintain and improve standard costs, updates, and cost roll-ups. Analyze manufacturing variances and partner with Operations on actions. Lead COGS and mar

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Join Tenstorrent as a Staff Reliability Engineer and help define the reliability strategy behind the next generation of AI computing systems. In this highly visible technical leadership role, you'll drive reliability from architecture through production, partnering across hardware, software, and manufacturing teams to build high-performance AI platforms that set the standard for uptime, durability, and quality. If you're passionate about solving complex engineering challenges and influencing products at scale, you'll have the opportunity to shape technology powering the future of AI. This role is hybrid, based out of Toronto, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You've spent 8+ years in reliability engineering, ideally in high-performance computing, AI hardware, or data center systems. You're comfortable with the statistical side of the job, HALT, HASS, ALT, MTBF, Weibull analysis, and FMEA are all familiar territory. You can work through a technical problem in a thermal lab and then explain the risks and trade-offs clearly to leadership. You're good at bringing people together, mechanical, electrical, thermal, softw

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Join Tenstorrent and help bring next-generation AI accelerator technology from silicon bring-up to production. You’ll work at the forefront of hardware innovation, diagnosing complex issues across chips, systems, firmware, and software while collaborating with some of the brightest engineers in the industry. This role offers the opportunity to solve challenging technical problems, build impactful debug solutions, and directly influence the reliability and performance of cutting-edge AI compute platforms. This role is hybrid, based out of Toronto, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on hardware debug engineer who thrives on solving complex, cross-functional problems at the intersection of silicon, firmware, and software. A curious and analytical problem solver who enjoys digging into failures, identifying root causes, and driving issues from initial discovery through resolution. An engineer with strong post-silicon validation and bring-up experience who is comfortable working in the lab and getting deep into system-level behavior. Someone who enjoys building tools, improving debug methodologies, and creating

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking a GCC Compiler Engineer to design, develop, and optimize compilers for next-generation RISC-V and AI compute architectures. You will work across hardware and software teams to improve performance, programmability, and integration of our custom toolchains into real applications. This role is fully hands-on and central to how developers interact with Tenstorrent hardware across both traditional compute and advanced machine learning workloads. This role is Hybrid, based out of Santa Clara, CA, Austin, TX, or Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced compiler engineer with deep knowledge of GCC and LLVM internals, comfortable optimizing for custom hardware targets. Strong C/C++ developer with a solid grasp of algorithms, data structures, and performance analysis. Collaborative and analytical, able to work across hardware and software domains to deliver efficient, high-performance toolchains. Passionate about enabling breakthrough compute architectures through compiler innovation and software-hardware co-design. What We Need Design, develop, and optimize GCC and/or LLVM compilers for Tenstorrent’s cust

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a hands-on RTL Design Engineer to own the microarchitecture and RTL implementation of the Power Management Subsystem/Interrupt Controllers/AXI Interconnect/Cache Controller . You’ll collaborate with cross-functional teams—architecture, firmware, software, DV, and PD—to define, design, and optimize power management solutions for next-generation RISC-V/ARM-based SoCs. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels. During the interview process, you will beevaluated and offered a level that aligns with your experience, which may differ from the one in this posting. Who You Are 5–10 years of experience in ASIC/SOC/IP design, with hands-on experience in microarchitecture and RTL development Skilled in Verilog/SystemVerilog and comfortable working across design, debug, and analysis Design and develop microarchitectures for a set of highly configurable IPs Microarchitecture and RTL coding ensuring optimal performance, power, area Work with verification teams on assertions, test plans, debug, coverage, etc. Deep understanding of power management concepts—clocking, reset, DVFS, and low-power modes Familiar with RISC-V or ARM-based SoCs and standard bus protocols (AXI, AHB, APB, CHI) Awareness of functional safety (ISO 26262) practices in hardware design What We Need Abil

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is building next-generation CPU and AI silicon. You’ll work at the forefront of hardware innovation, diagnosing complex issues across chips, systems, firmware, and software while collaborating with some of the brightest engineers in the industry. This role offers the opportunity to solve challenging technical problems, build impactful debug solutions, and directly influence the reliability and performance of cutting-edge AI compute platforms. This role is hybrid, based out of Toronto, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in hardware debug and post-silicon bring-up for CPU, SoC, or ASIC systems. Strong understanding of processor architecture and microarchitecture (RISC-V, x86, or ARM) with familiarity in debug and trace methodologies (e.g., iJTAG). Hands-on engineer who excels at diagnosing complex hardware, firmware, and software issues through root-cause analysis. Comfortable working in the lab with a passion for building debug tools, automation, and scalable methodologies. Collaborative team player with experience partnering across ASIC, firmware, software, and validation teams. What We Need

NVIDIA is seeking a creative and analytical Capacity Planner to join our Operations team and drive the scaling of our Boards & Systems manufacturing across all business units. In this cross-functional role, you will lead the weekly planning cycle, collaborate with Operations, Manufacturing, Supply Chain, Engineering, Finance, and Business Units, and leverage advanced analytical models to resolve capacity constraints, rationalize capital investments, and drive execution strategies for senior management. What You'll Be Doing Run the weekly capacity planning cycle for Boards & Systems, including forecast ingestion, supply planning alignment, Contract Manufacturer (CM) and testing reviews, and preparation of planning outputs. Consolidate and validate core planning inputs (18-month forecasts, NPI consumption, SKU mappings, CM commits, yield data) across enterprise applications like Anaplan. Analyze required versus available capacity, identify bottlenecks, and perform scenario analysis using data models to drive risk mitigation strategies. Lead capital investment, decisions based on capacity requirements, rationalize forecast changes, and optimize volume loading across CMs to meet target supply and revenue goals. Coordinate workflows across Supply Planning, Business Units, Contract Manufacturers, Production Planning, Purchasing, Manufacturing/Test Engineering, Finance, and NPI in a multi-program platform environment. Partner with IT teams to integrate planning models with enterprise systems, establishing standardized workflows, data pipelines, and toolsets. Present clear, data-driven execution plans, operational risk insights, and mitigation strategies to senior management. Align with cross-regional teams (US, Israel, APAC) to maintain seamless operational execution and standardized planning frameworks. What We Need to See 5+ years

A World-Changing Company Palantir builds the world’s leading software for data-driven decisions and operations. By bringing the right data to the people who need it, our platforms empower our partners to develop lifesaving drugs, forecast supply chain disruptions, locate missing children, and more. What We're About At its core, this role is about uncovering dots and—without knowing the shape they form—figuring out how to connect them. Our customers come to us with a hunch that the only way to protect their troops, manufacture high-quality products, structure effective healthcare policies, or deliver aid to refugees safely is to make better use of their data. Deployment Strategists are responsible for turning that hunch into reality. If you believe in the transformational power of data and technology and in your own ability to bring that power to bear against complex problems, we want to meet you. What We Do As a Deployment Strategist, you'll work as part of a driven and creative team of Engineers, Product Designers, and other Deployment Strategists to deploy software against the most challenging problems our world faces. Your mission is to synthesize disconnected streams of thought into a cohesive understanding of what the most important problem is, what the data means, what the product needs, what users are motivated by, and where the impact could be. Deployment Strategists are do-ers who immerse themselves in our customers' most intricate workflows, partner with customer teams and explore the data, and dive into the product landscape to enable us to scale. A select number of Deployments Strategists may also be deployed to Palantir internal teams and problems. In this role, the problems you'll tackle will require a curious and analytical mindset, a sharp intuition for product, and a strong degree of user empathy to ultimately empower our customers to make better decisions. No two days are the same, but as a Deployment Strategist you can expect to:

Abbott is a global healthcare leader that helps people live more fully at all stages of life. Our portfolio of life-changing technologies spans the spectrum of healthcare, with leading businesses and products in diagnostics, medical devices, nutritionals and branded generic medicines. Our 122,000 colleagues serve people in more than 160 countries. JOB DESCRIPTION: Job Description Position Overview The Clinical Laboratory Scientist I performs laboratory analysis on clinical specimens using established laboratory procedures within the assigned department/laboratory. The Clinical Laboratory Scientist I duties will include, but are not limited to, processing of specimens, performance of moderate and highly complex analytical testing, establishing, performing, and documenting quality assurance, quality control, equipment maintenance, and accurately documenting all work performed under the direction of the Laboratory Medical Director. As a Clinical Laboratory Scientist I, you will recognize and resolve problems using good laboratory practices. Shift: Sat - Mon, 6p - 630a Essential Duties (include but are not limited): Perform moderate and highly complex laboratory tests, procedures, and analyses according to the laboratory’s standard operating procedures. Perform, review, and document laboratory quality control procedures. Operate, maintain, and troubleshoot laboratory equipment. Prepare reagents required for laboratory testing. Identify and troubleshoot basic problems that adversely affect test performance and/or laboratory operations. Achieve and maintain competency on laboratory tasks. Assist with mentoring new laboratory personnel on current and new procedures, as needed. </

NVIDIA is leading the way in groundbreaking developments in Artificial Intelligence, High Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables amazing creativity and discovery, and powers what were once science fiction inventions from artificial intelligence to autonomous cars. We are looking for a motivated Deep Learning engineer to bring advanced communication technologies into AI stacks, including PyTorch, TRT-LLM, vLLM, SGLang, JAX, etc. You will be working with the team that created communication libraries like NCCL, NVSHMEM & technology like GPUDirect -- for scaling Deep Learning and HPC applications. Your customers will have diverse multi-GPU demands, ranging from training on scales up to 100K GPUs to inference down at microsecond latency. Communication performance between the GPUs has a direct impact on AI applications. Your work in AI toolkits will make all of those easier for the community. This is an outstanding opportunity for someone with an AI background to advance the state of the art in this space. Are you ready to contribute to the development of innovative technologies and help realize NVIDIA's vision? What you will be doing: Integrate new communication libraries features in AI frameworks: from PoC to performance analysis to production Perform deep analysis of AI workloads and frameworks to identify multi-GPU communication requirements and opportunities. Collaborate hands-on with teams working on the latest AI models. Improve AI compilers to hide communications or perform automatic fusion. Conduct in-depth AI workload performance characterization on multi-GPU clusters. Design fault-tolerant and elastic solutions for large-scale or dynamic AI workloads. Author

NVIDIA is leading the way in groundbreaking developments in Artificial Intelligence, High Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables amazing creativity and discovery, and powers what were once science fiction inventions from artificial intelligence to autonomous cars. We are the GPU Communications Libraries and Networking team at NVIDIA. We deliver libraries like NCCL, NVSHMEM, UCX for Deep Learning and HPC. We are looking for a motivated Performance engineer to influence the roadmap of our communication libraries. The DL and HPC applications of today have a huge compute demand and run on scales which go up to tens of thousands of GPUs. The GPUs are connected with high-speed interconnects (eg. NVLink, PCIe) within a node and with high-speed networking (eg. Infiniband, Ethernet) across the nodes. Communication performance between the GPUs has a direct impact on the end-to-end application performance; and the stakes are even higher at huge scales! This is an outstanding opportunity for someone with HPC and performance background to advance the state of the art in this space. Are you ready for to contribute to the development of innovative technologies and help realize NVIDIA's vision? What you will be doing: Conduct in-depth performance characterization and analysis on large multi-GPU and multi-node clusters. Study the interaction of our libraries with all HW (GPU, CPU, Networking) and SW components in the stack Evaluate proof-of-concepts, conduct trade-off analysis when multiple solutions are available Triage and root-cause performance issues reported by our customers Collect a lot of performance data; build tools and infrastructure to visualize and analyze the information <li

ABOUT US Transforming Lives Through Learning, Anywhere. At Skillumni, we believe education has the power to transform lives. Our platform delivers expert-led courses, interactive learning experiences, and flexible access to high-quality education, empowering learners to acquire in-demand skills, advance their careers, and achieve their professional goals from anywhere. Job Title: Business Development Associate Job Overview We are seeking a dynamic and results-oriented Business Development Associate to drive revenue growth, expand strategic partnerships, and strengthen our market presence. In this role, you will be responsible for developing and executing growth strategies, building strong relationships with key stakeholders, and identifying new business opportunities. If you are a proactive professional with a passion for business development and the EdTech industry, we encourage you to apply. Roles & Responsibilities Develop Growth Strategies Plan and execute strategic initiatives to drive business expansion, revenue growth, and market presence. Lead Generation & Sales Identify prospective clients, generate qualified leads, and convert opportunities into successful business outcomes. Market Research & Analysis Conduct market research and analyze industry trends, competitor activities, and customer needs to support business strategy. Marketing & Brand Development Collaborate with the marketing team to strengthen brand visibility and enhance customer engagement. Performance Tracking & Optimization Monitor key performance metrics and continuously optimize strategies to improve business outcomes. Proposal & Negotiation Prepare customized client proposals, negotiate business agreements, and ensure efficient lead management with minimal turnaround time (TAT).

BD Head (Roads) is responsible for leading the company's business development strategy in the RMRW business by identifying growth opportunities, evaluating project feasibility, and driving both organic and inorganic expansion. The BD Head will oversee high-level financial analysis, bid management, and strategic stakeholder engagement to secure new business opportunities while also providing strategic recommendations to the executive team. Source: Adani Group | Job ID: 47402