Area Business Manager Jobs

Amplitude is the leading AI analytics platform, helping over 4,700 customers—including Atlassian, Burger King, NBCUniversal, and Square—build better products and digital experiences. With powerful AI Agents embedded across our platform, teams can analyze, test, and optimize user experiences faster than ever. Ranked #1 across multiple categories in G2’s Winter 2026 Report, Amplitude is the best-in-class solution for product, data, and marketing teams. Learn more at amplitude.com . As an organization, we deliver for our customers by living our values. We operate from a place of humility, take ownership of problems and successes, approach challenges with a growth mindset, and put our customers at the center of everything we do. Amplitude’s Commitment to Diversity Equity & Inclusion (DEI): Amplitude believes that diversity enables the creation of better products, improves the ability to solve complex problems, and drives more powerful solutions. We strive to create an environment of inclusion—one focused on psychological safety, empathy, and human connection—that will allow employees of all backgrounds to thrive. Software Engineer II, Growth at Amplitude (View all jobs) San Francisco Bay Area About The Role & Team The Growth organization is focused on helping users realize long-term value from Amplitude. The team plays a critical role in that journey by driving expansion within existing accounts. Many of our customers start with just a few users — often in product or data teams. Our job is to unlock value for everyone else. We build features that help new users set up, get activated, leverage AI for frictionless insights, highlight relevant parts of the product they might otherwise miss, and expand usage across teams and departments. This is especially impactful in large, complex organizations, where getting from the first few users to broad adoption is a multiplier for retention and revenue. We work across Amplitude’s core product suite and integrations,

Zscaler (NASDAQ: ZS) accelerates digital transformation so customers can be more agile, efficient, resilient, and secure. The Zscaler Zero Trust Exchange™️ platform protects thousands of customers from cyberattacks and data loss by securely connecting users, devices, and applications in any location. Distributed across 160+ public exchanges globally and thousands of private exchanges at the edge, the SASE-based Zero Trust Exchange is the world’s largest in-line cloud security platform. We believe the future of work is Human + AI and are building an AI-native enterprise where human potential is amplified by machine intelligence to solve the world’s hardest security challenges. Driven by deep customer obsession, we are committed to the mission, outcome, and to each other. We bring these commitments to life through three core behaviors: ownership and collaboration, trust through outcomes and impact, and a challenge culture with ongoing feedback. Ready to make an impact at the company pioneering security transformation in the AI era? Join us at Zscaler. About the Role We are looking for an Account Executive to join our Sales and Go-to-Market team. This role is based in the greater Dallas, TX area, reporting to the Regional Director. You will be part of a global group of professionals passionate about delighting our customers, nurturing trusted partnerships, and sharing expertise to drive a secure, cloud-enabled digital future. By demonstrating the power and agility of cloud transformation, you will help cement our position as the world leader in cloud security. What you’ll do (Role Expectations) Build relationships with important internal and customer stakeholders, including c-suite decision-makers Create a long-term account strategy aligned with customer goals Collaborate with internal teams to meet customer needs and contribute to comprehensive account planning Act as a trusted advisor by understanding client businesses and aligning technical solutions with their stra

Zscaler (NASDAQ: ZS) accelerates digital transformation so customers can be more agile, efficient, resilient, and secure. The Zscaler Zero Trust Exchange™️ platform protects thousands of customers from cyberattacks and data loss by securely connecting users, devices, and applications in any location. Distributed across 160+ public exchanges globally and thousands of private exchanges at the edge, the SASE-based Zero Trust Exchange is the world’s largest in-line cloud security platform. We believe the future of work is Human + AI and are building an AI-native enterprise where human potential is amplified by machine intelligence to solve the world’s hardest security challenges. Driven by deep customer obsession, we are committed to the mission, outcome, and to each other. We bring these commitments to life through three core behaviors: ownership and collaboration, trust through outcomes and impact, and a challenge culture with ongoing feedback. Ready to make an impact at the company pioneering security transformation in the AI era? Join us at Zscaler. About the Role We are looking for an Account Executive to join our Sales and Go-to-Market team. This role is based in the greater Southern CA area, reporting to the Regional Director. You will be part of a global group of professionals passionate about delighting our customers, nurturing trusted partnerships, and sharing expertise to drive a secure, cloud-enabled digital future. By demonstrating the power and agility of cloud transformation, you will help cement our position as the world leader in cloud security. What you’ll do (Role Expectations) Build relationships with important internal and customer stakeholders, including c-suite decision-makers Create a long-term account strategy aligned with customer goals Collaborate with internal teams to meet customer needs and contribute to comprehensive account planning Act as a trusted advisor by understanding client businesses and aligning technical solutions with th

Zscaler (NASDAQ: ZS) accelerates digital transformation so customers can be more agile, efficient, resilient, and secure. The Zscaler Zero Trust Exchange™️ platform protects thousands of customers from cyberattacks and data loss by securely connecting users, devices, and applications in any location. Distributed across 160+ public exchanges globally and thousands of private exchanges at the edge, the SASE-based Zero Trust Exchange is the world’s largest in-line cloud security platform. We believe the future of work is Human + AI and are building an AI-native enterprise where human potential is amplified by machine intelligence to solve the world’s hardest security challenges. Driven by deep customer obsession, we are committed to the mission, outcome, and to each other. We bring these commitments to life through three core behaviors: ownership and collaboration, trust through outcomes and impact, and a challenge culture with ongoing feedback. Ready to make an impact at the company pioneering security transformation in the AI era? Join us at Zscaler. About the Role We are looking for a Majors Account Executive to join our Sales and Go-to-Market team. This role is based in the greater Chicago area, reporting to the Regional Director. You will be part of a global group of professionals passionate about delighting our customers, nurturing trusted partnerships, and sharing expertise to drive a secure, cloud-enabled digital future. By demonstrating the power and agility of cloud transformation, you will help cement our position as the world leader in cloud security. What you’ll do (Role Expectations) Build relationships with important internal and customer stakeholders, including c-suite decision-makers. Create a long-term account strategy aligned with customer goals. Collaborate with internal teams to meet customer needs and contribute to comprehensive account planning. Act as a trusted advisor by understanding client businesses and aligning technical solutions wi

AI only answers correctly when it can trust the data underneath it. This role owns two connected parts of how Sigma shows up in that world: where Sigma's experience lives outside its own product (MCP, a CLI, the Claude and ChatGPT marketplaces, integrations like Slack, Teams, and Glean), and the semantic layer that makes every one of those surfaces trustworthy. The first mandate is Sigma's AI ecosystem: defining Sigma's approach to MCP, giving external agents structured, governed access to Sigma's data model; owning the CLI, giving developers a fast way to work with Sigma outside the UI; and building Sigma's presence in the Claude and ChatGPT marketplaces, plus integrations for Slack, Teams, Glean, and similar surfaces, so people can reach Sigma's data wherever they already work. This is some of the most visible, fastest-growing surface area in the product. The second mandate is the semantic layer underneath it all. Every agent, chat answer, and integration is only as reliable as the data model behind it — get a metric definition wrong here, and every surface built on top inherits the mistake. This includes setting the roadmap for how semantic views connect across data platforms and how the model evolves as new AI capabilities emerge. What you'll do Define Sigma's approach to MCP, giving external agents and tools structured, governed access to Sigma's data model. Own the CLI roadmap, giving developers a fast, scriptable way to work with Sigma outside the UI. Build Sigma's presence in the Claude and ChatGPT marketplaces, along with integrations for Slack, Teams, Glean, and similar surfaces, so people can reach Sigma's data wherever they're already working. Set the roadmap for Sigma's data modeling strategy, including how semantic views connect across data platforms and how the semantic layer evolves as new AI capabilities emerge. Partner with engineering and design to ship integration and semantic modeling capabilities that hold up at enterprise scale.

Real people. Real service. At SupplyHouse.com , we value every individual team member and cultivate a community where people come first. Led by our core values of G enerosity, R espect, I nnovation, T eamwork, and GRIT, we’re dedicated to maintaining a supportive work environment that celebrates diversity and empowers everyone to reach their full potential. As an industry-leading e-commerce company specializing in HVAC, plumbing, heating, and electrical supplies since 2004, we strive to foster growth while providing the best possible experience for our customers. We are opening a new fulfillment center in Atlanta, GA and are looking for an Assistant General Manager to join our growing Fulfillment Center network! This individual will report to our General Manager and will be responsible for managing, coordinating, and leading all Inbound and Outbound operations while helping to establish and scale our new fulfillment center. Working closely with the General Manager, this individual will drive day-to-day performance by ensuring customer orders are processed accurately, efficiently, and on time, with a strong focus on safety, quality, productivity, employee engagement, and continuous improvement. As part of the leadership team for our brand-new fulfillment center, this individual will play an integral role in developing the team, implementing processes, preparing the site for launch, and creating a strong foundation for long-term success. If you are passionate about leading people, energized by the opportunity to build something from the ground up, and committed to operational excellence, we’d love to hear from you! Job Type: Full-Time, Exempt Location: Atlanta, GA - McDonough/Locust Grove area Schedule: This role helps oversee our new Atlanta, GA fulfillment center. While this position generally follows a schedule, operational demands during peak and seasonal periods may require leaders to work additional hours beyond their regular schedule. Leaders are expected

Role Overview Scale’s EMEA GTM team is scaling rapidly across complex, high-stakes government markets. Our commercial motion spans country leads, account executives, strategists, solutions engineering, engagement management, partnerships, delivery, finance, legal, and product - all operating in fast-moving, region-specific environments. We are hiring a Sales Enablement Lead to build the enablement engine for EMEA GTM. This role will report to the Head of Commercial Strategy and Operations and will be responsible for ensuring every seller, strategist, and field partner has the knowledge, materials, onboarding, operating rhythms, and deal support needed to execute with speed and quality. This is a hands-on builder role. You will create the infrastructure that helps the team ramp faster, sell more consistently, reuse what works, and translate a complex AI product and public-sector GTM motion into practical field execution. What You’ll Do Build and own EMEA GTM onboarding Design and run a structured onboarding programme for new EMEA GTM hires across sales, strategy, solutions, and adjacent commercial roles. Create role-specific ramp plans, learning paths, certification moments, manager check-ins, and practical field exercises. Partner with Commercial Operations, People, Recruiting, and GTM and EPD leadership to ensure new hires understand Scale’s products, market context, customers, sales process, operating model, and expectations. Own the EMEA GTM knowledge base Build and maintain a centralised source of truth for EMEA GTM materials, including pitch decks, account planning templates, customer FAQs, qualification guides, use-case libraries, demos, proposal examples, talk tracks, win/loss learnings, and market-specific collateral. Keep materials current, easy to find, and clearly organised by market, role, product area, customer segment, and sales stage. Partner with central Sales Enablement, Product Marketing, Solutions Engineering, Legal, Finance, Delivery, and Pr

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking talented Physical Design Engineers to implement high-performance blocks for our industry-leading CPU and AI/ML architectures. You'll own the complete implementation flow from synthesis to tapeout, working alongside world-class engineers to push the boundaries of performance, power, and area. If you're passionate about crafting silicon that powers the future of AI computing and thrive on solving complex design challenges, we want you on our team. This role is hybrid , based out of Austin, TX, Santa Clara, CA or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on engineer with deep expertise in SOC/ASIC physical design and a track record of successful tapeouts. Passionate about optimizing PPA through innovative implementation techniques and close RTL collaboration. Strong problem solver who excels at debugging complex issues across design hierarchies. Collaborative team player who thrives in fast-paced, technically challenging environments. What We Need BS/MS/PhD in EE/ECE/CE/CS with proven experience in synthesis, PnR, and timing closure on taped-out designs. Expertise with industry-

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team and lead the front-end RTL physical implementation team. Drive CAD flows on multiple process technologies while working closely with core micro-architects to refine CPU core configurations and optimizing PPA. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, RTL and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An expert in physical design practices used to optimize PPA Experienced in high-performance physical design. Proficient in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation and power analysis. Skilled in synthesis, place and route tools including flows and physical design methodology. Background in CPU micro-architecture. What We Need Own front‑end physical implementation and PPA definition for a high‑performance RISC‑V CPU and CPU subsystem Work closely with microarchitects and RTL designers to “make the IP better” by optimizing frequency, power, and area

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Staff Digital Design Engineer to help define, build, and optimize high-performance IP and SoC architectures for next-gen AI and compute workloads. This role is ideal for engineers who thrive at the intersection of microarchitecture, RTL implementation, and performance-aware design. This role is hybrid, based out of Toronto, Ottawa, Boston, or Austin. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A digital design expert with a deep understanding of computer architecture and IP microarchitecture. Skilled in RTL development (Verilog/VHDL) and familiar with full ASIC flows. Comfortable optimizing for power, performance, and area (PPA) under aggressive design goals. A naturally collaborative and technical engineer — you thrive in spec definition, peer reviews, and team-wide planning. What We Need Architecture and RTL implementation of Tenstorrent’s custom IP blocks and SoC components. Performance-aware design decisions for compute, interconnect, or memory-heavy blocks. Occasional contributions to validation using emulation, FPGA prototyping, or UVM flows. Strong synthesis and timing closure awareness to support backend

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking talented Physical Design Engineers to implement high-performance partitions for an industry-leading AI SOC. You'll own the complete implementation flow from synthesis to tapeout, working alongside world-class engineers to push the boundaries of performance, power, and area. If you're passionate about crafting silicon that powers the future of AI computing and thrive on solving complex design challenges, we want you on our team. This role is hybrid, based out of Austin,TX or Santa Clara, CA or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are Experienced with synthesis and place-and-route flows, especially using Synopsys Design Compiler / Fusion Compiler and IC Compiler II. Comfortable in a small, cross-functional physical design team, owning a block or subsystem and partnering on tapeout milestones with clear communication and accountability. Ideally bring extra depth in areas such as UPF/multi-voltage power domains, SoC interface IP integration (e.g. I3C, UART), signoff breadth (DRC/LVS, EM/IR, LEC/Formality), multi-clock/CDC-aware implementation, PLL/DLL integration, and DFT-aware physical implementati

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a talented Physical Design Engineer to implement high-performance blocks for our industry-leading CPU and AI/ML architectures. You'll own the complete implementation flow from synthesis to tapeout, working alongside world-class engineers to push the boundaries of performance, power, and area. If you're passionate about crafting silicon that powers the future of AI computing and thrive on solving complex design challenges, we want you on our team. This role is hybrid, based out of Austin, TX or Santa Clara, CA or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on engineer with deep expertise in SOC/ASIC physical design and a track record of successful tapeouts. Passionate about optimizing PPA through innovative implementation techniques and close RTL collaboration. Strong problem solver who excels at debugging complex issues across design hierarchies. Collaborative team player who thrives in fast-paced, technically challenging environments. What We Need BS/MS/PhD in EE/ECE/CE/CS with proven experience in synthesis, PnR, and timing closure on taped-out designs. Expertise with industry-stan

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a hands-on RTL Design Engineer to own the microarchitecture and RTL implementation of the Power Management Subsystem/Interrupt Controllers/AXI Interconnect/Cache Controller . You’ll collaborate with cross-functional teams—architecture, firmware, software, DV, and PD—to define, design, and optimize power management solutions for next-generation RISC-V/ARM-based SoCs. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels. During the interview process, you will beevaluated and offered a level that aligns with your experience, which may differ from the one in this posting. Who You Are 5–10 years of experience in ASIC/SOC/IP design, with hands-on experience in microarchitecture and RTL development Skilled in Verilog/SystemVerilog and comfortable working across design, debug, and analysis Design and develop microarchitectures for a set of highly configurable IPs Microarchitecture and RTL coding ensuring optimal performance, power, area Work with verification teams on assertions, test plans, debug, coverage, etc. Deep understanding of power management concepts—clocking, reset, DVFS, and low-power modes Familiar with RISC-V or ARM-based SoCs and standard bus protocols (AXI, AHB, APB, CHI) Awareness of functional safety (ISO 26262) practices in hardware design What We Need Abil

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an exceptional Senior-level Physical Design Engineer to drive top-level implementation of our complex AI and CPU System-on-Chip designs. You'll orchestrate cross-disciplinary collaboration, implementing sophisticated floorplans, power grids, and clock networks while ensuring design closure at the chip level. If you excel at managing the complexity of full-chip physical design and want to deliver next-generation AI hardware, we need your expertise. This role is hybrid , based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned physical design engineer who thrives on complex, full-chip implementation challenges. Expert at collaborating across disciplines, working effectively with architecture, RTL, and packaging teams. Passionate about optimizing chip-level implementations for power, performance, and area. Detail-oriented professional who drives design closure while maintaining quality and meeting aggressive schedules. What We Need 8+ years of top-level SOC physical design experience on complex, multi-million gate designs. Deep expertise in hierarchic

About the Team The Storage organization builds and operates the online stateful systems and abstractions that DoorDash Engineering depends on: reliable, efficient, secure, and easy to use. Within Storage, the Distributed Caching team owns every caching offering at DoorDash end to end, including ElastiCache (Redis/Valkey), Boulder (our KVRocks-based key-value store for high-QPS feature serving), Entity Cache (read Bill Shen’s engineering blog post, “ High-Performance Proxy Cache for DoorDash Services ”), and the Distributed Lock Service, plus the smart clients (asgard-redis, valkey-go) that sit in front of them. These systems back critical product surfaces across DoorDash, Wolt, and Deliveroo: the team runs roughly 400 ElastiCache clusters serving hundreds of millions of GET requests per second in aggregate, and Boulder, our offline-to-online feature store, serves billions of feature lookups per second at peak. About the Role The team owns provisioning of clusters and the smart clients that sit in front of them, baking in sensible defaults so that other engineering teams get a turnkey caching solution instead of having to run their own. You'll help drive Boulder's evolution to scale further, improve cost efficiency, enhance performance, and support real-time updates; re-platform the Distributed Lock Service onto a strongly consistent backend; and build the self-serve tooling and recommendation engine that let customers describe a workload (QPS, TTL, payload size, latency profile) and get the right backend without talking to a human. You'll go deep on cache invalidation, replication, sharding, compaction, and failover, while shipping the guardrails, automation, and observability that keep this scale operable by a small team. You must be located in San Francisco, Seattle, or the New York Metro Area for this hybrid position. You will report to the Engineering Manager on the Distributed Caching team within the Storage organization. You’re excited about this opportunity b