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Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking talented Physical Design Engineers to implement high-performance blocks for our industry-leading CPU and AI/ML architectures. You'll own the complete implementation flow from synthesis to tapeout, working alongside world-class engineers to push the boundaries of performance, power, and area. If you're passionate about crafting silicon that powers the future of AI computing and thrive on solving complex design challenges, we want you on our team. This role is hybrid , based out of Austin, TX, Santa Clara, CA or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on engineer with deep expertise in SOC/ASIC physical design and a track record of successful tapeouts. Passionate about optimizing PPA through innovative implementation techniques and close RTL collaboration. Strong problem solver who excels at debugging complex issues across design hierarchies. Collaborative team player who thrives in fast-paced, technically challenging environments. What We Need BS/MS/PhD in EE/ECE/CE/CS with proven experience in synthesis, PnR, and timing closure on taped-out designs. Expertise with industry-

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team and lead the front-end RTL physical implementation team. Drive CAD flows on multiple process technologies while working closely with core micro-architects to refine CPU core configurations and optimizing PPA. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, RTL and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An expert in physical design practices used to optimize PPA Experienced in high-performance physical design. Proficient in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation and power analysis. Skilled in synthesis, place and route tools including flows and physical design methodology. Background in CPU micro-architecture. What We Need Own front‑end physical implementation and PPA definition for a high‑performance RISC‑V CPU and CPU subsystem Work closely with microarchitects and RTL designers to “make the IP better” by optimizing frequency, power, and area

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Staff Digital Design Engineer to help define, build, and optimize high-performance IP and SoC architectures for next-gen AI and compute workloads. This role is ideal for engineers who thrive at the intersection of microarchitecture, RTL implementation, and performance-aware design. This role is hybrid, based out of Toronto, Ottawa, Boston, or Austin. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A digital design expert with a deep understanding of computer architecture and IP microarchitecture. Skilled in RTL development (Verilog/VHDL) and familiar with full ASIC flows. Comfortable optimizing for power, performance, and area (PPA) under aggressive design goals. A naturally collaborative and technical engineer — you thrive in spec definition, peer reviews, and team-wide planning. What We Need Architecture and RTL implementation of Tenstorrent’s custom IP blocks and SoC components. Performance-aware design decisions for compute, interconnect, or memory-heavy blocks. Occasional contributions to validation using emulation, FPGA prototyping, or UVM flows. Strong synthesis and timing closure awareness to support backend

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking talented Physical Design Engineers to implement high-performance partitions for an industry-leading AI SOC. You'll own the complete implementation flow from synthesis to tapeout, working alongside world-class engineers to push the boundaries of performance, power, and area. If you're passionate about crafting silicon that powers the future of AI computing and thrive on solving complex design challenges, we want you on our team. This role is hybrid, based out of Austin,TX or Santa Clara, CA or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are Experienced with synthesis and place-and-route flows, especially using Synopsys Design Compiler / Fusion Compiler and IC Compiler II. Comfortable in a small, cross-functional physical design team, owning a block or subsystem and partnering on tapeout milestones with clear communication and accountability. Ideally bring extra depth in areas such as UPF/multi-voltage power domains, SoC interface IP integration (e.g. I3C, UART), signoff breadth (DRC/LVS, EM/IR, LEC/Formality), multi-clock/CDC-aware implementation, PLL/DLL integration, and DFT-aware physical implementati

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a talented Physical Design Engineer to implement high-performance blocks for our industry-leading CPU and AI/ML architectures. You'll own the complete implementation flow from synthesis to tapeout, working alongside world-class engineers to push the boundaries of performance, power, and area. If you're passionate about crafting silicon that powers the future of AI computing and thrive on solving complex design challenges, we want you on our team. This role is hybrid, based out of Austin, TX or Santa Clara, CA or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on engineer with deep expertise in SOC/ASIC physical design and a track record of successful tapeouts. Passionate about optimizing PPA through innovative implementation techniques and close RTL collaboration. Strong problem solver who excels at debugging complex issues across design hierarchies. Collaborative team player who thrives in fast-paced, technically challenging environments. What We Need BS/MS/PhD in EE/ECE/CE/CS with proven experience in synthesis, PnR, and timing closure on taped-out designs. Expertise with industry-stan

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a hands-on RTL Design Engineer to own the microarchitecture and RTL implementation of the Power Management Subsystem/Interrupt Controllers/AXI Interconnect/Cache Controller . You’ll collaborate with cross-functional teams—architecture, firmware, software, DV, and PD—to define, design, and optimize power management solutions for next-generation RISC-V/ARM-based SoCs. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels. During the interview process, you will beevaluated and offered a level that aligns with your experience, which may differ from the one in this posting. Who You Are 5–10 years of experience in ASIC/SOC/IP design, with hands-on experience in microarchitecture and RTL development Skilled in Verilog/SystemVerilog and comfortable working across design, debug, and analysis Design and develop microarchitectures for a set of highly configurable IPs Microarchitecture and RTL coding ensuring optimal performance, power, area Work with verification teams on assertions, test plans, debug, coverage, etc. Deep understanding of power management concepts—clocking, reset, DVFS, and low-power modes Familiar with RISC-V or ARM-based SoCs and standard bus protocols (AXI, AHB, APB, CHI) Awareness of functional safety (ISO 26262) practices in hardware design What We Need Abil

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an exceptional Senior-level Physical Design Engineer to drive top-level implementation of our complex AI and CPU System-on-Chip designs. You'll orchestrate cross-disciplinary collaboration, implementing sophisticated floorplans, power grids, and clock networks while ensuring design closure at the chip level. If you excel at managing the complexity of full-chip physical design and want to deliver next-generation AI hardware, we need your expertise. This role is hybrid , based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned physical design engineer who thrives on complex, full-chip implementation challenges. Expert at collaborating across disciplines, working effectively with architecture, RTL, and packaging teams. Passionate about optimizing chip-level implementations for power, performance, and area. Detail-oriented professional who drives design closure while maintaining quality and meeting aggressive schedules. What We Need 8+ years of top-level SOC physical design experience on complex, multi-million gate designs. Deep expertise in hierarchic

OUR MISSION At Redwood, we empower our customers with lights-out automation for their mission-critical business processes. At Redwood, we empower our customers with lights-out automation for their mission-critical business processes. ABOUT US Redwood Software is the leader in full stack automation fabric solutions for mission-critical business processes. Redwood Software is the leading orchestration platform for the autonomous enterprise, driving business transformation at the lowest total cost of ownership. Redwood empowers organizations to intelligently automate and orchestrate mission-critical business and IT processes across complex ERP, hybrid cloud, data and emerging agentic AI systems. Through its SaaS-first automation fabric—with AI embedded across the automation lifecycle—Redwood accelerates the path to autonomous operations. Backed by 30 years of experience and trusted by more than 50% of the Fortune 50, Redwood helps organizations unlock human potential to focus on innovation, growth and what’s next. CORE VALUES One Team. One Redwood Make Your Own Weather Obsess over Customer Success Work the Problem Be Curious Own the Outcome Respect Each Other YOUR IMPACT We are hiring a high-impact Technical Program Manager (TPM) to own end-to-end delivery health within a product area. This is a senior role embedded within a core product engineering group. You will partner with the Engineering Directors as your peer enabling engineering leaders to focus on technical quality while the TPM will own planning, governance, and stakeholder visibility and be the critical link ensuring our roadmap commitments translate into high-quality, enterprise-ready releases. You will operate at the intersection of Product, Engineering, Platform, Support, and Go-To-Market teams, and be directly accountable for delivery predictability, release readiness, dependency management, and executive visibility. This role demands a combination of strategic systems thinking

About Clutch: We’re on a mission to reinvent the way people buy, sell, and own cars. Are you game? Clutch is Canada’s largest online used car retailer, delivering a seamless, hassle-free car-buying experience to drivers everywhere. Customers can browse hundreds of cars from the comfort of their home, get the right one delivered to their door, and enjoy peace of mind with our 10-Day Money-Back Guarantee… and that’s just the beginning. Named five years in a row to the Globe & Mail’s list of the Top Growing Companies in Canada and also awarded spots on Deloitte’s Technology Fast 50™ and Fast 500™ lists, we’re looking to add curious, hard-working, and driven individuals to our growing team. Headquartered in Toronto, Clutch was founded in 2017 and currently services Ontario, New Brunswick, Nova Scotia, British Columbia, Prince Edward Island and is now launching in Alberta. Clutch is backed by a number of world-class investors, including D1 Capital, Canaan, Real Ventures, BrandProject, and Upper90. To learn more, visit clutch.ca . About the role: We’re on a mission to build a world-class team that drives innovation, growth and excellence. As we scale rapidly, we’re looking for a Retail Vehicle Advisor (Field Specialist) to be the face of Clutch at our new Calgary location. As a member of our Calgary launch team, you’ll have the opportunity to help build a new market from the ground up, shape how we operate and grow alongside the business. Since our entire car-selling process is online, you’ll often be the first Clutch employee our customers meet when they sell their vehicle. You’ll have the freedom to go above and beyond to make sure every customer has a great, unique experience in this dynamic customer service and transportation role. What you’ll do: Delivering a uniquely special experience to each and every one of our customers. Work between our retail location and off-site appointments, meeting customers throughout the Calgary area to inspect and pick u

About the Team DoorDash’s GenAI Platform team sits within Machine Learning Platform and builds the shared infrastructure that helps DoorDash, Wolt, and Deliveroo teams safely bring GenAI-powered products, agents, automation, and personalization to production. Our mission is to increase the velocity of business impact from GenAI. A central pillar of that work is our evaluation platform — the unified evals backbone that lets teams measure, trace, and trust the quality of LLM and agent systems across the company, powering trace/score ingestion, LLM-as-judge workflows, agent simulations, and LLM observability for the tens of millions of daily requests flowing through our LLM Gateway. We also own core platform surfaces including the Agent Gateway, open-weights model serving and batch inference, guardrails, and cost attribution. About the Role You will join a small, high-leverage team building production infrastructure for Generative AI at DoorDash, with a primary focus on our evals and LLM observability platform: the systems that let teams evaluate, trace, and continuously improve the quality of LLM and agent products. You’ll work across evaluation frameworks and SDKs, OpenTelemetry-based trace/score ingestion, LLM-as-judge and offline/online eval pipelines, agent simulations, data pipelines, backend services, and observability. This role is ideal for an engineer who enjoys building reliable measurement and quality primitives in a fast-moving technical area where product needs, model capabilities, vendor ecosystems, and evaluation methodologies are evolving quickly. You’re excited about this opportunity because you will… Build the infrastructure that helps DoorDash teams move GenAI ideas from prototype to production, increasing the velocity of business impact from AI across the company. Work on our unified evals platform — evaluation SDKs, OpenTelemetry trace/score ingestion, LLM-as-judge, offline and online eval pipelines, and agent simulations — alongside the LLM Gatew

About the Team The Storage organization builds and operates the online stateful systems and abstractions that DoorDash Engineering depends on: reliable, efficient, secure, and easy to use. Within Storage, the Distributed Caching team owns every caching offering at DoorDash end to end, including ElastiCache (Redis/Valkey), Boulder (our KVRocks-based key-value store for high-QPS feature serving), Entity Cache (read Bill Shen’s engineering blog post, “ High-Performance Proxy Cache for DoorDash Services ”), and the Distributed Lock Service, plus the smart clients (asgard-redis, valkey-go) that sit in front of them. These systems back critical product surfaces across DoorDash, Wolt, and Deliveroo: the team runs roughly 400 ElastiCache clusters serving hundreds of millions of GET requests per second in aggregate, and Boulder, our offline-to-online feature store, serves billions of feature lookups per second at peak. About the Role The team owns provisioning of clusters and the smart clients that sit in front of them, baking in sensible defaults so that other engineering teams get a turnkey caching solution instead of having to run their own. You'll help drive Boulder's evolution to scale further, improve cost efficiency, enhance performance, and support real-time updates; re-platform the Distributed Lock Service onto a strongly consistent backend; and build the self-serve tooling and recommendation engine that let customers describe a workload (QPS, TTL, payload size, latency profile) and get the right backend without talking to a human. You'll go deep on cache invalidation, replication, sharding, compaction, and failover, while shipping the guardrails, automation, and observability that keep this scale operable by a small team. You must be located in San Francisco, Seattle, or the New York Metro Area for this hybrid position. You will report to the Engineering Manager on the Distributed Caching team within the Storage organization. You’re excited about this opportunity b

About the Team DoorDash’s GenAI Platform team sits within Machine Learning Platform and builds the shared infrastructure that helps DoorDash, Wolt, and Deliveroo teams safely bring GenAI-powered products, agents, automation, and personalization to production. Our mission is to increase the velocity of business impact from GenAI. A central pillar of that work is running frontier open-weight LLMs and VLMs (such as GLM, Qwen, Kimi, and DeepSeek) ourselves — real-time GPU serving, high-throughput batch inference, and fine-tuning on autoscaling GPUs — delivering large cost and latency wins (for example, a billion embeddings produced roughly 20× cheaper and visual models served roughly 72% cheaper). We also own core platform surfaces including the LLM Gateway, Agent Gateway, evals infrastructure, guardrails, and cost attribution. About the Role You will join a small, high-leverage team building production infrastructure for Generative AI at DoorDash, leading the design and architecture of our open-weights model platform spanning inference and fine-tuning: real-time GPU serving, high-throughput batch inference, and model fine-tuning. You’ll set technical direction across model serving and inference engines, fine-tuning and training pipelines, GPU autoscaling and utilization, batch pipelines, backend services, and observability, and mentor engineers as you go. This role is ideal for a senior engineer who enjoys owning ambiguous, high-impact systems and pushing the cost/performance frontier of GPU inference and fine-tuning in a fast-moving technical area where product needs, model capabilities, vendor ecosystems, and cost/performance tradeoffs are evolving quickly. You’re excited about this opportunity because you will… Lead the design of infrastructure that helps DoorDash teams move GenAI ideas from prototype to production, increasing the velocity of business impact from AI across the company. Own and evolve our open-weights serving stack — real-time GPU endpoints, high-thr

About the Team The Storage teams build and operate online stateful systems and abstractions that are reliable, efficient, secure and easy to use for DoorDash Engineering. The teams are responsible for understanding Product Engineering’s evolving needs and developing platform and infrastructure capabilities to serve them. The team currently supports CockroachDB, Cassandra, Kafka and Redis as well as data abstraction services to reduce the complexity of interacting with storage systems for Product Engineers. About the Role The Storage team is building and operating a high-performance, scalable, and reliable data abstraction layer that optimizes both efficiency and reliability. Our goal is to create a platform that manages itself and fades into the background—empowering engineers to focus on delivering product experiences our customers love. This role is available across two teams within Storage, each solving unique and high-impact challenges: One team is building the orchestration layer for DoorDash’s storage platform—unifying lifecycle management, operations, and self-serve APIs for databases and streaming systems, turning complex, stateful infrastructure into reliable, developer-friendly services used across the company. One team builds and operates the distributed data platform powering DoorDash's largest stateful workloads -- including Cassandra, which backs critical product surfaces across DoorDash, Wolt, and Roo. You'll design high-throughput data abstractions, smart clients, and platform services that make distributed data reliable and easy to work with at multi-petabyte, multi-million-QPS scale, with opportunities to go deep on distributed systems internals and contribute to the open-source Cassandra ecosystem. If you're passionate about distributed systems, developer experience, and building foundational infrastructure at scale, we'd love to hear from you. You must be located in San Francisco, Sunnyvale, Seattle, or the New York Metro Area for this hybrid pos

About the Team The Analytics team is looking for Data Scientists to guide measurement, strategy, and tactical decision-making using Advanced Analytics approaches, as we expand our platform across the globe. Data Scientists at DoorDash work to uncover insights and turn them into actionable recommendations, helping drive decisions for the entire organisation. Analytics is very integral to all operational areas at DoorDash. About the Role Data Science at DoorDash involves diving deeper into our data to solve crucial business problems, ideate & run experiments to solve for insights gleaned from this deep dive and work with a cross-functional team to drive real-world operational change. This is a rare operational and actionable data-driven experience. We solve many exciting challenges from all three sides of our marketplace including customer acquisition, balancing supply and demand, fraud and support, marketing, marketplace efficiency, and more. If you enjoy finding patterns amidst chaos, are excited to build a market from 0 to 1, and have experience using analytics to affect revenue, growth, operations or beyond, we're looking for someone like you! You're excited about this opportunity because you will… As a senior Individual Contributor, mentor and influence junior Data Scientists in investigating complex issues and uncovering key drivers of our business Influence the Product and Operations roadmap by making actionable recommendations based on data Interface frequently with senior leadership to showcase your team’s work and tackle complex business problems Drive measurement strategy for the area under scope, defining success metrics and implementing best practices around experiment design and statistical analysis Develop a strategic learning roadmap based on data observations, strategic questions, and hypotheses We're excited about you because you have… A degree in Math, Physics, Statistics, Economics, Computer Science, or a similar domain 8+ years of experi

About the Team As DoorDash continues to expand rapidly, our Core Consumer team plays a pivotal role in shaping the consumer experience through enhancing personalization, search relevance, merchandising strategy, app quality, and the overall ordering experience. Our mission is to implement scalable data solutions and provide insights that directly influence our strategic product direction. We are looking for an Analytics Senior Manager to lead our Discovery team. About the Role As a Senior Manager of Data Science/Analytics, you’ll be leading a team of data scientists who are working on improving the consumer experience. You will develop strategic insights and work closely with the product, engineering, strategy and operations teams to actively build and measure the impact of new features. You will oversee our metrics and analytics strategy to inform strategic product direction, offer technical leadership and build processes to support velocity, and partner with data and product engineers to build robust data foundations. You're excited about this opportunity because you will… Lead and develop a team of Data Scientists in investigating complex issues and uncovering key drivers of our business, along with your own contributions as an Individual Contributor Influence the Product and Operations roadmap by making actionable recommendations based on data Interface frequently with senior leadership to showcase your team’s work and tackle complex business problems Drive measurement strategy for the area under scope, defining success metrics and implementing best practices around experiment design and statistical analysis Develop a strategic learning roadmap based on data observations, strategic questions, and hypotheses We're excited about you because you have… A degree in Math, Physics, Statistics, Economics, Computer Science, or a similar domain Experience managing a team of data scientists, and a track record of delivering impactful analyses 8+ years of experience i