Firmware Engineer Jobs

SonicWall is a cybersecurity forerunner with more than 30 years of expertise and is recognized as a leading partner-first company, ensuring our partners and their customers are never alone in the fight against cybercrime. With the ability to build, scale and manage security across the cloud, hybrid and traditional environments in real-time, SonicWall provides relentless security against the most evasive cyberattacks across endless exposure points for increasingly remote, mobile and cloud-enabled users. With its own threat research center, SonicWall can quickly and economically provide purpose-built security solutions to enable any organization—enterprise, government agencies and SMBs—around the world. For more information, visit www.sonicwall.com or follow us on Twitter , LinkedIn , Facebook and Instagram . Role Overview We are seeking a highly skilled and visionary Senior Principal Engineer to lead the architecture, design, and development of our next-generation Enterprise Wireless Access Point (AP) solutions. In this role, you will define the software architecture for state-of-the-art Wi-Fi 6, 6E, and Wi-Fi 7 access points. You will bridge the gap between low-level silicon firmware and high-level cloud management platforms, ensuring our APs deliver enterprise-grade performance, seamless roaming, high security, and cloud-driven scalability. If you have deep expertise in embedded Linux, 802.11 protocols, and cloud-managed networking, we want you on our team. Key Responsibilities Technical Leadership & Architecture End-to-End Architecture: Own the software architecture, design, and delivery of advanced Wi-Fi features from silicon SDK integration up to cloud-managed provisioning systems. Enterprise Wi-Fi Evolution: Design and develop advanced features utilizing Wi-Fi 6, Wi-Fi 6E, and Wi-Fi 7 standards to deliver enterprise-grade performance. Advanced Wireless Feature Design: Architect and implem

SonicWall is a cybersecurity forerunner with more than 30 years of expertise and is recognized as a leading partner-first company, ensuring our partners and their customers are never alone in the fight against cybercrime. With the ability to build, scale and manage security across the cloud, hybrid and traditional environments in real-time, SonicWall provides relentless security against the most evasive cyberattacks across endless exposure points for increasingly remote, mobile and cloud-enabled users. With its own threat research center, SonicWall can quickly and economically provide purpose-built security solutions to enable any organization—enterprise, government agencies and SMBs—around the world. For more information, visit www.sonicwall.com or follow us on Twitter , LinkedIn , Facebook and Instagram . About the Role SonicWall is seeking a Senior Software Engineer with deep IPv6 expertise to lead the design, implementation, and hardening of IPv6 capabilities across the Sonicwall firewall firmware stack. As a Principal Engineer, you will be the technical authority for IPv6 feature parity, protocol correctness, and interoperability across SonicWall Next-Generation Firewall (NGFW) platforms. This role is ideal for engineers with hands-on experience delivering IPv6 in high-performance router, switch, or carrier-grade networking products who are looking to apply that expertise in the embedded network security domain. Responsibilities Lead IPv6 Architecture & Feature Delivery — Own end-to-end design and implementation of IPv6 features across the Sonicwall frewall networking stack, including IPv6 routing, interface addressing, DHCPv6, NDP, MLDv2, and IPv6 Policy-Based Routing (PBR). Drive IPv6 Feature Parity — Identify and close gaps between IPv4 and IPv6 feature sets across subsystems — including VPN Tunnel Interfaces, IPsec/IKEv2, SSL-VPN, Syslog, SNMP, and NAT64 — ensuring consistent dual-stack and

SonicWall is a cybersecurity forerunner with more than 30 years of expertise and is recognized as a leading partner-first company, ensuring our partners and their customers are never alone in the fight against cybercrime. With the ability to build, scale and manage security across the cloud, hybrid and traditional environments in real-time, SonicWall provides relentless security against the most evasive cyberattacks across endless exposure points for increasingly remote, mobile and cloud-enabled users. With its own threat research center, SonicWall can quickly and economically provide purpose-built security solutions to enable any organization—enterprise, government agencies and SMBs—around the world. For more information, visit www.sonicwall.com or follow us on Twitter , LinkedIn , Facebook and Instagram . About the Role SonicWall is hiring a Senior Software Engineer to develop and maintain the Content Filtering Service client embedded in SonicOS — the firmware running on SonicWall firewall appliances worldwide. This module intercepts live traffic, queries the CFS rating servers in real time, and enforces URL-based content filtering policies at the packet level. This is security-critical code: a policy bug is a traffic bypass on a deployed security appliance. The codebase is in C with a split Control Plane / Data Plane architecture, multi-blade cache synchronization, and multiple firmware version upgrade paths. Responsibilities Maintain, harden, and extend the CFS client module across both the control plane and data plane. Own the binary UDP protocol implementation between the firewall and the CFS rating servers, ensuring correctness and compatibility across protocol versions. Develop and maintain complete IPv4 and IPv6 support across all code paths. Own the firmware upgrade and migration paths, ensuring they are atomic, failure-safe, and correctly handle all supported version transitions. Improve reliabilit

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Senior Emulation Engineer Location: India - Remote Job Description: At EnCharge AI, we are building the next generation of AI compute silicon — purpose-built for high-performance, low-power, and scalable AI inference. As an Emulation Engineer, you will play a critical role in validating complex AI accelerator architectures on emulation platforms before tape-out. This position is ideal for someone passionate about bridging the gap between hardware and software in fast-paced, deep tech environments. Responsibilities: • Set up and maintain Siemens Veloce emulation and prototyping platforms • Adapt SoC designs for Emulation and Prototyping • Develop and debug emulation testbenches and system-level environments • Support pre-silicon validation, power/performance analysis, and early software bring-up. Participate in silicon bring-up and validation. • Collaborate with design and verification teams to isolate design issues and accelerate debug. • Optimize performance of the emulation workloads and reduce turnaround time. • Work with firmware/software teams to enable use of emulators for OS and driver testing. Required Background: • BS/MS/Ph.D. in EE, CS, or related field with 7+ years of SoC design experience. • Experience with emulation platforms (Veloce, Palladium, or ZeBu) and FPGA-based prototyping systems (proFPGA, HAPS, or Protium) • Experience with emula

About the Team The Consumer Devices team at OpenAI builds end-to-end hardware and software systems that bring AI into the physical world. We work at the intersection of custom silicon, embedded systems, operating systems, and cloud services to deliver reliable, production-ready devices at scale. About the role We are looking for an Operating Systems Engineer to build and harden the OS foundations for OpenAI products. We are especially interested in experienced, passionate, and innovative operating systems developers who thrive on building foundational platform software and solving hard problems in security, privacy, performance, power, and reliability. You will work across the OS kernel, core OS services, security and privacy primitives, performance and power, and the frameworks that connect applications and UI to the system. This role emphasizes deep debugging and systems ownership from development through production. You will collaborate closely with embedded, firmware, hardware, application, and product engineering teams. Experience with hardware bring-up is a plus, but not required. What you will do Work on end-to-end OS capabilities spanning the OS kernel, userspace services, application frameworks, UI toolkits, and application-facing APIs. Develop, integrate, and maintain OS components, both kernel-bound and in userspace, including scheduling, memory management, filesystems, drivers, IPC/RPC mechanisms, and security-relevant subsystems. Build and maintain core OS services and daemons (init, service management, device discovery, networking primitives, time, logging, update hooks, crash handling, and so on). Design and implement security and privacy mechanisms: Secure boot and measured boot integration points (where applicable). Mandatory access control and sandboxing. Secrets management, secure storage, key handling, and least-privilege service design. Privacy-preserving telemetry, data minimization, and user-consent oriented system behaviors. Establish a perfo

NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 25 years. Today, we are tapping into the unlimited potential of AI to define the next era of computing. As an NVIDIAN, you will address challenges spanning architecture, silicon, firmware, software, and production — and excellent judgment matters as much as technical depth! We are the Silicon Power Team within the Silicon Co-Design Group. We architect and deliver groundbreaking solutions for productizing NVIDIA's chips across consumer, professional, server, embedded, mobile, and automotive markets. Silicon characterization, correlation to arch and design expectations, product spec finalization, and productization techniques and infrastructure are our day-to-day work — always on the bleeding edge of the industry. Small decisions here have outsized impact on performance, efficiency, reliability, bring-up speed, and ultimately what the product delivers in the field. We are hiring a Senior Silicon Power Engineer to own power-feature productization on a flagship silicon program. This is not a coordination role, and it is not a compliance role — it is the seat where power features either work at scale or become the reason a program slips. The two highest-leverage problems in this seat: Close the hardest multi-functional power failures before they gate a program. Take ambiguous, cross-boundary issues across architecture, firmware, validation, and platform to root-cause closure — with productized fixes and reusable methodology the next program can inherit. Build AI-enabled characterization as a real capability, not a demo. Every bring-up generates terabytes of characterization, shmoo, and telemetry data. Deploy AI workflows for data analysis, metric extraction, trend detection, and cross-bring-up correlation — with the guardrails and validation discipline to make them trustworthy enough to gate production decisions! <

We're looking for a Principal Engineer to join our CSP Engagements team as the technical focal point for end-to-end performance, working directly with engineering teams of key CSP/hyperscale customers to ensure they achieve various performance targets on NVIDIA platforms. In this role, you will augment NVIDIA's performance and benchmark teams with a dedicated CSP-facing focus. You will drive work streams with CSP engineering teams to build shared understanding of platform performance characteristics, gather and incorporate their workload-specific feedback into NVIDIA's optimization priorities, and validate that performance targets are met in customer-representative configurations. Your cross-CSP visibility enables you to identify patterns and drive systemic improvements in documentation, configuration guidance, and tooling. What you'll be doing: Drive performance characterization work streams with engineering teams of key CSP/hyperscale customers — ensuring they understand platform performance expectations, profiling methodology, and tuning options for their specific workloads Gather and synthesize CSP performance feedback — identify gaps between expected and actual throughput, and champion optimization priorities back into NVIDIA's CUDA, NCCL, driver, and firmware teams Ensure key open-source performance and stress tools (e.g., STREAM, GPU Burn, GPU BLAST) are updated and validated for the latest NVIDIA rack-scale systems, GPU architectures, and CPU platforms — so customers and internal teams have reliable baseline measurements from day one Work closely with CSPs to ensure their own performance and validation tooling reflects the latest GPU capabilities, memory hierarchy changes, and platform-specific tuning parameters Conduct cross-CSP performance comparison and pattern analysis — identify configuration, software, or workload differences that explai

NVIDIA is seeking a System Test Engineer to join our Test Solutions Group, where you will develop and deploy manufacturing test solutions for next-generation datacenter systems. You will combine hardware and software expertise to expand test coverage, automate diagnostics, and solve complex production challenges at scale. NVIDIA has been reinventing computing for more than two decades. From pioneering the GPU and transforming computer graphics and gaming to powering the AI revolution, we continue to tackle problems that matter. Join a team dedicated to amplifying human creativity and intelligence. What you’ll be doing Define, develop, and implement manufacturing test solutions for datacenter system products. Investigate and introduce new test technologies and methodologies to improve quality, coverage, throughput, and production efficiency. Develop test strategies for new product features, including test identification, specification, fixture and equipment design, diagnostic software development, and qualification. Provide Design-for-Test (DFT) feedback early in the product design cycle. Debug complex hardware, firmware, and software issues throughout prototype and production build phases. Build and improve automated diagnostic-generation and validation infrastructure. Collaborate across engineering, operations, and manufacturing teams to deliver robust, scalable test solutions. Coordinate technical work across team members and drive execution on shared deliverables. What we need to see Bachelor’s degree in Electrical Engineering or equivalent practical experience. 3&#43; years of post-silicon validation experience with board-level or system-level products. Experience developing or supporting platform-level manufacturing test programs. </l

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role You will work on the systems software strategy and execution that brings new AI silicon from first power-on to a fully integrated system running production-representative models at expected functionality and performance. You will define how software exercises and validates compute, memory, interconnect, and I/O subsystems, then build the diagnostics, automation, and observability needed to find issues quickly. This role sits at the center of silicon, firmware, platform, systems, and workload teams. You will turn hardware specifications and performance targets into an end-to-end bringup plan, drive cross-functional debug, and establish the stress and regression infrastructure that makes each new platform reliable across operating environments. In this role, you will: Contribute to the end-to-end software bringup and validation strategy for new silicon and first-party systems. Define software-driven test coverage across compute, memory, interconnect, I/O, and their system-level interactions. Build diagnostics, test automation, telemetry, and regression infrastructure that accelerate first-silicon learning and issue isolation. Lead bringup from initial silicon arrival through board and system integration, docking, runtime enablement, and model execution. Design stress tests that characterize reliability, performance, and stability across workloads and operating conditions. Translate architecture specifications and performance models into measurable acceptance crit

Job Details: Job Description: Shape the Future of Confidential Computing! Join Intel's elite engineering team to validate TDX (Trusted Domain Extensions) - a breakthrough technology redefining security and virtualization. Work on one of the industry's most complex and impactful products, where functional validation meets deep technical innovation. Why You'll Love This Role: High Impact: Ensure the reliability of TDX, a cornerstone of Intel's confidential compute. Deep Technical Challenge: Validate across the stack-firmware, OS, drivers, middleware, SDKs, and apps. Code-Driven: Build frameworks, automation, and reference implementations. Innovation at Scale: Operate at the intersection of security, virtualization, and cloud. Career Growth: Collaborate with world-class engineers on advanced architectures. Qualifications: Minimum Qualifications: Education BSc or MSc in Computer Science, Computer Engineering, or Electrical Engineering. Experience 5-7 years in software/hardware validation or verification. 5-7 years coding in higher-level languages: C or C&#43;&#43;. Skills Proficient in English. Excellent communication and teamwork skills. Strong analytical and problem-solving abilities. Preferred Qualifications: Operating Systems and Virtualization Pre/Post-Silicon validation Specman experience What we offer: At Intel, employees share in successes, enjoy comprehensive rewards and are inspired by an innovative & inclusive workplace. What can you expect when there is a match between us? <li

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. NVIDIA has a rapidly expanding ecosystem of data center platform & node designs. From single node HGX/DGX systems all the way up to large multi-node NVLink domain rack architectures. These designs have become core to NVIDIA's rapidly growing enterprise and cloud provider businesses. Each bringing together the full power of NVIDIA GPUs, NVIDIA NVLink, NVIDIA InfiniBand networking, NVIDIA Grace CPUs, and a fully optimized NVIDIA AI and HPC software stack. We’re searching for a highly motivated, technical leader to design, drive, and operationalize rack-scale factory and deployment flows for next-generation data center products. The ideal candidate will combine deep systems expertise, decisive technical leadership, and a passion for building reliable, debuggable, and scalable manufacturing and deployment solutions. What you’ll be doing: Lead and drive rack-scale/L11 flows for factory and initial data center deployment. Design and implement end-to-end factory workflows, including firmware flashing sequences, security provisioning, and deployment of software mitigations. Collaborate with data center architects, ODMs, and OEMs to define factory and data center requirements that ensure efficient and reliable production ramp. Champion reliability, debuggability an

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. At NVIDIA, as a Principal Rack Scale Systems Infrastructure Engineer, you will build and guide the development of software systems. These systems support our upcoming rack-scale infrastructure products and services. This exceptional role sits where software meets hardware. You will work on control planes, state machines, orchestration systems, firmware, OS lifecycle, and networking fabrics. Your task is to compose infrastructure-as-a-service control plane software that converts complex rack-scale hardware into dependable, manageable, and programmable infrastructure for NVIDIA, partners, and leading cloud and enterprise clients globally. What You Will Be Doing: Define the complete software architecture for rack-scale infrastructure products and services, covering control plane services, infrastructure management, firmware, operating systems, kernel drivers, networking fabrics, accelerator software, and user-mode manageability software. Use Kubernetes and cloud-native primitives as an infrastructure fabric when appropriate. This includes controllers, operators, reconciliation loops, and open source components. These components can operate safely at rack and fleet scale. Build open source infrastructure software that can b

The Site Reliability Engineering team designs and builds the global infrastructure on which we deploy our services, focusing on the above mentioned flagship MongoDB Atlas platform. As our customers grow and globalize, our services must satisfy demands for low-latency requests around the globe, and comply with various data sovereignty requirements. The SRE Team’s mission is to build this increasingly complex infrastructure, while continually lowering the operational burden associated with it, and increasing our internal visibility into the health of the system. We are strong believers in infrastructure-as-code and self-healing systems. The SRE Team is fully integrated with all the other engineering teams, and the teams work closely together with a soft and traversable boundary between their areas of responsibility. We are looking to speak to candidates who are based in New York City for our hybrid working model. Responsibilities Design and build the infrastructure for a global cloud service that comprises hundreds of thousands of MongoDB clusters, processes a billion metrics per day, and replicates tens of billions of database writes to our backup service Design, implement, and troubleshoot the automation and monitoring of services that seamlessly spans the globe - including several cloud providers Become an expert in infrastructure performance, helping us optimize from the application level all the way through the firmware Build for resilience. Our goal is that nobody’s pager goes off, ever. Are we there yet? No. Are we really close? Very. While we work on that - participate in a weekly on-call rotation Improve our infrastructure capabilities, optimizing for cost, simplicity, and maintainability Requirements 3+ years of experience running a mission critical service at scale in a Linux environment Firm grasp of at least one modern programming language, beyond basic scripting Familiarity with web and network protocols and standards (HTTP, TLS, DNS, etc) Bachelor’s deg

ABOUT PELOTON At Peloton, We empower people to live fit, strong, long, and happy lives. We use technology and world-class instruction to connect the world through fitness, empowering people to be the best version of themselves anywhere, anytime. We're a team of talented and passionate individuals who are committed to innovation and creating exceptional user experiences. We are seeking a highly motivated and skilled Senior Electrical Engineer to join our Hardware Engineering team and contribute to the next generation of connected fitness products. YOUR DAILY IMPACT AT PELOTON Design and develop electrical systems and circuits for new and existing Peloton products, including consumer electronics, motor controls, power supplies, and sensor integration Conduct rigorous testing and validation of electrical designs to ensure they meet performance, reliability, and safety standards (e.g., UL, CE, FCC). This involves debugging hardware, analyzing test data, and implementing design changes as needed Work closely with cross-functional teams, including mechanical engineering, firmware, software, and industrial design, to integrate electrical systems seamlessly into the final product Collaborate with our manufacturing partners to ensure designs are manufacturable, and provide support during production ramp-up Stay current with emerging technologies and industry trends to drive innovation and continuous improvement in our products YOU BRING TO PELOTON A Bachelor's degree in Electrical Engineering or a related field. A Master's degree is a plus 5+ years of experience in electrical engineering, with a strong background in power systems, power supplies, and consumer electronics development Deep understanding of power systems, AC and DC motors, and line-connected appliance designs Strong experience in both internal and joint development work, working with overseas JDM and CM partners Understanding of regulatory requirements, including design for UL and CE safety and EMC requirements

About Stripe Stripe is a financial infrastructure platform for businesses. Millions of companies—from the world’s largest enterprises to the most ambitious startups—use Stripe to accept payments, grow their revenue, and accelerate new business opportunities. Our mission is to increase the GDP of the internet, and we have a staggering amount of work ahead. That means you have an unprecedented opportunity to put the global economy within everyone’s reach while doing the most important work of your career. About the team Stripe Terminal helps Stripe users extend their online presence into the physical world. The Terminal team’s mission is to make it as easy for businesses to accept in-person payments as the Stripe API has done for online payments. With Terminal, businesses can unlock in-person payments use cases that are right for their business model—whether it’s creating a flagship retail experience, extending their website to a pop-up store, or enabling a mobile point-of-sale at their next event. What we are looking for: As an Android BSP Engineer, you will be responsible for the kernel and driver level system development, which includes building, troubleshooting, and writing automated tests for the Android system on our embedded payments platforms. This team works closely with partner teams throughout the hardware and software product lifecycle, from hardware manufacturing to Android app teams. We also work with external vendors on part selection and initial hardware bring-up. What you’ll do: Bring up new devices and lead debugging and performance tuning exercises that span multiple hardware/firmware/software teams. Design, implement, and maintain drivers and Android services that operate efficiently in a constrained environment and meet the reliability and security requirements of the industry. Own the definition of one or more work streams focused on hardware bring-up, peripheral drivers and communication, and power and performance management and opti