Firmware Engineer Jobs

Graphcore Senior Principal AI SoC Validation (Bring-up lead) Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. We are developing the next generation of AI compute, a large-scale system-on-chip (SoC) designed to power future high-performance AI systems. As the SoC Validation Lead, you will be responsible for enabling pre-production software to run reliably on new silicon quickly and efficiently, before showing that the silicon meets the highest standards of quality, reliability and functionality, ready for production deployment. You will lead a team delivering post-silicon validation across the full AI SoC, working across silicon, firmware, and platform levels. The role requires a deep technical understanding, strong hands-on debug experience, and the ability to collaborate effectively with hardware, software, and systems engineering teams. Key responsibilities Define and lead post-silicon validation strategy Develop and refine the overall post-silicon validation approach for our AI SoCs, ensuring reliable and timely delivery of validated silicon, architectural correctness, feature robustness, and at-scale system reliability. Drive cross-domain debug and issue resolution Lead investigation and resolution of complex issues spanning silicon, firmware, operating systems, and platform interactions. Ensure that fixes are effective and sustainable. Promote collaboration and shared understanding Work closely with

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. About the Role At Everpure , we are helping customers better manage and utilize their global data in the AI era, as we evolve from traditional storage to intelligent data management and Enterprise Data Cloud capabilities. We are looking for a Technical Sourcer to help identify, engage, and attract top engineering talent across a range of technical domains. In this role, you will partner closely with recruiters and hiring managers to build strong talent pipelines and drive hiring outcomes for critical technical positions that support Everpure’s product and engineering growth. The ideal candidate is passionate about talent mapping, market research, candidate engagement, and building relationships with highly sought-after technical talent. You bring strong market insight, thoughtful outreach, and a proactive approach to finding and engaging the right talent before the market does. You are energized by the opportunity to help Everpure compete for exceptional talent in highly competitive technical markets. What You'll Do Develop and execute sourcing strategies to identify high-quality candidates for technical roles across software engineering, infrastructure, systems, AI/ML, firmware, hardware, and related domains. Build and maintain strong talent pipelines for current and future hiring needs, with a focus on quality, relevance, and speed. Conduct market mapping and competitive intelligence research to identify target companies

Solution Architect Program Manager Description - Job Summary The Solution Architect Program Manager is responsible for driving advanced technology solutions from early concept through architecture definition, proof of concept, productization planning, system integration, validation, and launch readiness. This role combines deep technical capability with disciplined program execution to ensure that innovative concepts are translated into clear scope, committed deliverables, product milestones, and launch timelines. This position requires strong solution architecture judgment, structured planning, and cross-functional leadership across engineering, product, hardware, firmware, software, validation, security, operations, and external partners. The role owns the bridge between concept feasibility and production execution by defining requirements, aligning stakeholders, managing schedules, resolving technical dependencies, tracking risks, and maintaining readiness documentation required to deliver solutions on product milestones and market launch commitments. Responsibilities Drive end-to-end solution programs from concept exploration, business and technical feasibility, architecture definition, POC execution, productization planning, system integration, validation, and launch readiness. Translate ambiguous innovation concepts into clear solution scope, use cases, requirements, architecture assumptions, success criteria, milestones, resource needs, and execution plans. Own integrated schedules that align engineering deliverables with product development checkpoints, POR decisions, validation gates, manufacturing readiness, and launch timeline commitments. Partner closely with product management, system architecture, hardware, firmware, software, security, validation, operations, and external suppliers to manage dependenci

About Graphcore Graphcore is a global leader in artificial intelligence computing systems. We design advanced semiconductors and data center hardware that provide the specialized processing power needed to advance AI while improving the efficiency required for broad adoption. As part of SoftBank Group, Graphcore belongs to a family of companies developing transformative technologies. Our AI Engineering Campus in Austin plays an important role in building the hardware platforms that support the next generation of AI systems. The Opportunity As a Systems Engineering Intern, you will contribute to projects that combine hardware, firmware, and software engineering for advanced AI compute platforms. You will work with experienced engineers on subsystem design, laboratory testing, system validation, automation, and performance analysis. The internship provides hands-on experience with modern hardware development and system-level engineering. You will own clearly defined technical tasks with guidance from the team and document your methods, results, and conclusions. What You Will Do Support the design and testing of CPU and high-speed input and output subsystems for advanced compute platforms. Run laboratory tests and measurements to help evaluate performance, power, signal behavior, and reliability. Contribute to system-level validation by creating scripts and tools that streamline testing, data collection, and analysis. Explore emerging input and output technologies, including PCIe 6.0 and 800G Ethernet, and learn how they support advanced computing workloads. Assist with investigations into platform power, cooling, and energy efficiency, including liquid-cooling systems for high-performance processors. Use power meters, oscilloscopes, logic analyzers, or comparable lab equipment under appropriate supervision. Analyze test results, identify unexpected behavior, and work with engineers to reproduce and investigate issues. Collaborate across hardware, firmware, software, m

We are looking for a disciplined and dynamic, Lead System Engineer – compute blade and rack Validation to join our growing compute rack validation team. As a diligent leader in Systems Engineering, you will drive multiple aspects of validation throughout the life cycle of the program. In this high visibility position, you will be part of a leading team to innovate and improve system bring-up and enablement abilities, as well as silicon and system validation to deliver the highest quality, industry leading technologies to market. Your technical leadership skills, validation and debug expertise will be necessary towards product development, definition, root cause and resolution. Your agility and collaborative approach will be essential to work within System Validation & other engineering teams (System Architects, SoC and Rack FW etc). The technical leader will be driving keys areas of system validation including leading first silicon & system bring-up (nodes and rack level systems) - rack level systems and blades will be based of ARM server architecture. Candidate will be immersed in challenging system enablement work, system validation (end-to-end) methodology, tests development and execution as well as triage/debug of critical issues to meet critical program milestones at POR quality. The candidate will also be a key contributor to state-of-the-art HW and lab capabilities for Grapchore’s system engineering. The candidate should be able to work in a global environment while maintaining a synergetic culture. Primary Responsibilities: Lead the systemenablement (including first silicon and other FW components) to ensure system capabilities are brought up as per plan of record and system architecture spec. Drive organization wide methodology for Firmware integration and best known configuration (HW/FW/SW) usage model by leading the release of deployment ready solutions. Develop key methodologies, lab HW and system SW capabilit

NVIDIA is seeking a Senior Technical Program Manager to join the CSP Engagements team, focused on deep technical engagement with hyperscale cloud service providers for NVIDIA’s next‑generation datacenter systems such as Vera Rubin NVL72. This role is intended for experienced systems and embedded software leaders—including software engineering managers, technical leads, or senior architects—who have led datacenter server and platform software programs and can operate as a trusted technical partner to hyperscale CSP engineering teams. As a member of the CSP Engagements team, you will act as the primary technical engagement leader between NVIDIA’s system software organizations and CSP platform, system software, and AI teams, ensuring alignment, readiness, and successful large‑scale deployment of NVIDIA‑based datacenter solutions. What you will be doing: Lead deep technical engagements with hyperscale CSPs as the primary NVIDIA point of contact for system software, firmware, and platform readiness for NVIDIA datacenter products. Partner directly with CSP system software, firmware, and infrastructure engineering leaders to align on software architecture, bring‑up plans, deployment readiness, and production requirements for NVIDIA‑based server and rack‑scale platforms. Represent CSP technical priorities internally, advocating for customer requirements and tradeoffs across NVIDIA’s system software, firmware, hardware, silicon, and product teams are aligned to customer needs, timelines, and constraints. Own the end‑to‑end CSP engagement lifecycle, from early technical alignment and pre‑production readiness through large‑scale deployment, escalation management, and sustained production support. Drive bi‑directional technical communication: translating CSP system‑level requirements into actionable focus areas for NVIDIA engineering teams, while clearly communicating N

About the Team OpenAI Consumer Devices is building the next generation of products that bring powerful AI into people’s everyday lives. Guided by OpenAI’s mission to ensure AGI benefits all of humanity, our team combines world-class researchers, engineers, designers, and operators who care deeply about creating useful, intuitive, and responsible technology. You’ll have the opportunity to work alongside exceptional people on ambitious, zero-to-one challenges at the intersection of hardware, software, and AI. This is a chance to help define an entirely new category of products—and shape how people experience AI in the future. The Operating Systems team is critical in this mission, turning sophisticated hardware and AI capabilities into a reliable, trusted platform. Security is central to that work: we define trust boundaries, integrate hardware-backed protections, isolate sensitive context, and establish the guardrails that let AI applications and agents act safely, privately, and under user control. About the Role We’re looking for a Software Security Architect to define the security architecture for OpenAI’s next-generation operating system. You’ll work alongside hardware security architects and partner with operating system, silicon, firmware, privacy, and product teams to protect users, their devices, and their data. This is a senior, hands-on role for someone who can connect operating system internals, hardware-backed security, and real-world product constraints. Your work will shape the platform’s trust model, protect sensitive information, and set the technical foundations for AI that is safe, private, and under user control. In this role, you will: Define the operating system’s security architecture, trust boundaries, privilege model, and protections for sensitive user data. Partner with hardware security architects to integrate roots of trust, secure elements, trusted execution environments, and processor security capabilities into the operating system. Desig

Who We Are Nuro is a self-driving technology company on a mission to make autonomy accessible to all. Founded in 2016, Nuro is building the world’s most scalable driver, combining cutting-edge AI with automotive-grade hardware. Nuro licenses its core technology, the Nuro Driver™, to support a wide range of applications, from robotaxis and commercial fleets to personally owned vehicles. With technology proven over years of self-driving deployments, Nuro gives the automakers and mobility platforms a clear path to AVs at commercial scale, empowering a safer, richer, and more connected future. About the Role Nuro is a technology company at the intersection of AI, robotics, and logistics. The Fleet Technician is a specialized technical role responsible for the diagnostic health, software integration, and hardware integrity of Nuro’s autonomous vehicle fleet. This position requires a hybrid mastery of Linux-based systems, hardware-software abstraction layers, and electromechanical engineering to ensure peak operational performance. About the Work Systems Diagnosis & Analysis: Independently analyze and root-cause complex failures involving the interaction between autonomous software stacks and vehicle hardware. Tooling & Automation Development: Design, develop, and implement hardware and software scripts (Python/Bash) to automate fleet health monitoring and optimize vehicle uptime. Deployment & Validation: Execute and validate critical software retrofits, firmware updates, and hardware modifications, ensuring high-fidelity integration with ADAS systems. Process Engineering: Author and standardize Technical Standard Operating Procedures (SOPs) and documentation for cross-functional use by engineering and operations teams. Technical Program Management: Lead specialized fleet-related workstreams, serving as the technical Subject Matter Expert (SME) when collaborating with Software and Hardware Engineering departments. Incident Management: Lead technical resp

NVIDIA's accelerated computing platforms move data at speeds that push the limits of what silicon and physics allow. Whether a high-speed interface trains reliably, maintains accurate margins, and survives every platform topology it will ever see is a question we answer ourselves. This role does that work. The Silicon Co-Design Group leads the boundary between what was designed and what was built. When a GPU, CPU, or SoC ships with interfaces that work at scale, this team is the reason. Most engineers debug within a layer. You will own the full stack. When an interface fails to train, the link margin is unexpectedly tight, or a customer reports a critical silicon issue, you trace the problem through protocol behavior, signal integrity, firmware, platform topology, and silicon marginalities. You then confirm that the fix works. Your methodology shapes how NVIDIA validates high-speed interfaces across generations. Your decisions affect yield, production ramp, and field quality. This is not a coordination role. The engineers who do it well hold protocol depth and system breadth simultaneously, never lose the thread across hardware, firmware, and software, and have the judgment to know when to go deeper and when to act. They are rare. Should that describe you, read on. What you'll be doing: Own post-silicon bring-up, characterization, validation, and debug of PCIe, NVLink, C2C, and other HSIO interfaces across NVIDIA GPUs, CPUs, and SoCs from first power-on through production readiness. Close the hardest failures. Drive root cause across protocol behavior, signal integrity, firmware and driver interactions, platform topology, and silicon marginalities and own every fix through to confirmation. Define validation strategy. Set test coverage, debug priorities, margining methodology, and stress criteria f

About the Role As the Fleet Coordinator, you will be the single source of truth for the fleet: tracking what configuration each aircraft is flying and where it is, with no aircraft cleared to fly outside its approved configuration.You'll oversee all aircraft configuration that supports engineering and Part 135 operations, while keeping aircraft audit-ready. You will play a key role in supporting safe, compliant, and reliable operations by dispatching aircraft, tracking configuration and compliance records, and acting as the connective tissue between engineering, operations, maintenance control, and the FAA. You're excited about this opportunity because... Fleet Configuration & Testing: Maintain and verify compliance across the Part 107 test and Part 135 Commercial aircraft inventory: registration, airworthiness status, maintenance logs, and battery/component life-cycling." Maintain accurate software, hardware, and firmware configuration records for every aircraft, including designated testing candidates, so results are always traceable to a known config. Track aircraft location across the fleet ensuring one hundred percent accountability. Initiate and track parts requests tied to configuration changes, testing, and scheduled maintenance. Operations & Compliance: Maintain OpSpecs and the general maintenance manual, ensuring maintenance procedures and standards align with Part 135 requirements. Maintain the maintenance, training, and flight-log records the FAA expects an air carrier to produce on demand. Act as point of contact during FAA audits, representing the accuracy of aircraft configuration records and documentation against the maintenance program's compliance requirements. Fleet Dispatch & Availability: Decide which aircraft flies which mission (dispatch-style), verifying maintenance status before an aircraft is released. Track each aircraft's real-time location and availability, including movements between bases, hangars, and maintenance fac

Graphcore Director-Post Silicon Validation (Functional) Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Austin, Texas which will play a central role in Graphcore's work building the future of AI computing. We are developing the next generation of AI compute, a large-scale system-on-chip (SoC) designed to power future high-performance AI systems. Job Summary We have an exciting opportunity to be part of a collaborative, cross-functional development team validating cutting-edge, high-performance AI chips and platforms. You will play a key role in supporting new product introductions and validation. You will lead a team delivering post-silicon validation across the full AI SoC, working across silicon, firmware, and platform levels. The role requires a deep technical understanding, strong hands-on debug experience, and the ability to collaborate effectively with hardware, software, and systems engineering teams. Working within the Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to provide technical guidance to other engineering team members. In this role, you can leverage our experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes. Th

About Graphcore Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are looking for a Principal Architect to define and drive the architectural vision of the software stack for the Graphcore ML accelerator. In this role, you will shape the architecture of our software ecosystem and maintain a deep understanding of the product’s hardware and software components, their interfaces, and how they interact. You are an excellent communicator, and you proactively convey the software architecture. You bring a pragmatic, trade-off-aware approach to decision-making, fully recognising the impact of architectural choices on product direction and engineering outcomes. The Team The software architecture team is responsible for defining, maintaining and communicating the overarching architecture of our software stack, from firmware to ML frameworks. The team works within the wider software organisation, partnering closely with engineering teams who deliver against this architectural vision. Responsibilities and Duties Define & document the software architecture of the software stack. Work across different software

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about driving innovation for next-generation memory solutions powering AI/ML and high-performance computing systems. As a Director of HBM RTL Design and Integration, you will lead a team responsible for the design, integration, and delivery of next-generation HBM SoC logic die, with a strong focus on RTL development and IP integration. You will drive technical strategy and execution across multiple product generations, working closely with architecture, verification, physical design, firmware, and product engineering teams. Key Responsibilities Lead SoC RTL design and integration for HBM logic die, including subsystem partitioning, IP integration, and SoC-level design convergence. Drive translation of architectural and micro-architectural specifications into robust, high-quality RTL implementations across multiple teams. Oversee SoC integration aspects, including clocking, reset, power intent, configuration infrastructure, and system-level design correctness. Establish design methodologies and best practices to improve quality, reuse, and development efficiency across HBM programs. Partner with SoC Architecture, Verification, Physical Design, Firmware, and System teams to ensure successful end-to-end product execution. Work closely with Product Engineering, Test, Probe, Process Integration, Assembly, and Manufacturing to ensure robust, manufacturable HBM

About Team Our Robotics team is focused on unlocking general-purpose robotics and advancing toward AGI-level intelligence in dynamic, real-world environments. Working across the full model and systems stack, we integrate cutting-edge hardware and software to explore a broad range of robotic form factors. We strive to seamlessly blend high-level AI capabilities with the physical constraints of real-world systems to improve people’s lives. About the Role We are looking for a Technical Program Manager to own actuator development and integration from system goals through production readiness. The actuator program spans mechanical, electrical, firmware, harnessing, controls, test, reliability, manufacturing, and supply chain, and needs a TPM who can turn cross-functional decisions into clear scope, executable milestones, and timely decisions. In this role, you will help the team converge on the right technical plan, surface risks early, and deliver reliable actuator systems on schedule. This role is based in San Francisco, CA and requires in-person presence 4 days a week. In this role you will: Drive actuator programs end-to-end, aligning scope, milestones, interfaces, dependencies, and exit criteria across engineering teams. Drive scope lock and technical convergence for sprints, MVPs, and stretch goals while connecting component decisions to system performance. Coordinate actuator development across motors, gears, sensing, electronics, and firmware, and align the electrical and mechanical interfaces that connect actuators to the broader robot. Lead validation planning from early prototypes through engineering validation, reliability testing, and production readiness. Drive tradeoff decisions across cost, quality, performance, schedule, and lead time by collaborating cross-functionally and quantifying impact to meet program deliverables. Establish effective mechanisms for technical reviews, change control, design releases, decision tracking, and manufacturing readiness.

ABOUT THE ROLE Peloton Product Line Architects (PLA’s) drive the innovation and optimization of a hardware product (such as the Peloton Bike, Tread, or Row) as well as the development of future Peloton products. This role is within the Hardware Team and reports to the Director of Product Line Architecture. The PLA has several key responsibilities, the first of which is the acting lead technical role during a new product initiative (NPI). Secondly, the PLA regularly collaborates with Product Management, translating the voice of the customer into the technical requirements that are then used by the design, testing and manufacturing teams to produce our world class products. Along with the Engineering Program Manager (EPM), the PLA leads and influences, without direct supervisory authority, the technical teams that develop the product concepts and execute the designs. Key to this role is continuous cross-functional interaction with internal and external team members - including but not limited to: Product Management, Program Management, Industrial Design, Mechanical and Electrical Engineering, Firmware, Quality, Manufacturing, Supply Chain, as well as members of leadership. As one of the core product team members, your extensive experience will enable you to provide technical leadership and mentorship to others, giving guidance in making key strategic decisions for product direction and category trade-offs. Your diplomacy in maintaining alignment within the groups provides the positive, forward driven approach needed for the teams to succeed. YOUR DAILY IMPACT AT PELOTON Develop program direction for a Peloton HW product initiative in alignment with the Product Manager and executive teams Monitor and adjust program strategies with cross functional leadership to best suit the current and future needs of the business Promote and provide a means for healthy collaboration between cross functional teams as well as with contract and joint development