Hands On Java Developer Jobs

Pontera is a fintech company on a mission to help people retire better. Our software platform enables retirement savers to get the help they need managing their 401(k) and other retirement plan accounts as part of a personalized strategy by their trusted financial advisor. Pontera is used by financial advisors across the nation– from SMB to Fortune 500 RIA firms, independent broker-dealers, plan custodians, and plan advisors. Backed by leading venture capital firms including ICONIQ Growth and Lightspeed Venture Partners, Pontera is built by talented individuals who share a dedication to helping people retire with greater security. Our team is fast-growing and driven to become one of the largest fintech companies in the world. Our culture is built on a people-first principle: in a complex and numbers-driven industry, we never lose sight of the people we serve and work alongside. That’s where you come in. DESCRIPTION We're looking for a Senior Billing Operations Specialist to partner closely with Finance, Customer Experience, BI and Product to give billing a single, accountable owner. This is a true partnership across teams: you'll bring order and control to billing operations while continuously raising the bar for how accurate, explainable, and responsive Pontera's billing is for every customer. Billing at Pontera has outgrown the informal, all-hands-on-deck model that carried it so far - it now touches customer trust, adoption, and executive relationships, not just back-office accuracy. You're the connective tissue across the entire billing lifecycle - the person every other function turns to when something needs to actually get resolved, not just flagged. That means owning billing file validation before release, payment and check reconciliation, credits and refunds end to end process; being the Finance point of contact for all US based teams who they can rely on for any customer-impacting billing issue. The ability to serve as the busi

Pontera is a fintech company on a mission to help people retire better. Our software platform enables retirement savers to get the help they need managing their 401(k) and other retirement plan accounts as part of a personalized strategy by their trusted financial advisor. Pontera is used by financial advisors across the nation– from SMB to Fortune 500 RIA firms, independent broker-dealers, plan custodians, and plan advisors. Backed by leading venture capital firms including ICONIQ Growth and Lightspeed Venture Partners, Pontera is built by talented individuals who share a dedication to helping people retire with greater security. Our team is fast-growing and driven to become one of the largest fintech companies in the world. Our culture is built on a people-first principle: in a complex and numbers-driven industry, we never lose sight of the people we serve and work alongside. That’s where you come in. DESCRIPTION Pontera is seeking a highly skilled and motivated IT Specialist to join the Global IT team and lead IT operations for the New York office. As part of Pontera’s Global IT organization, this position works closely with Infrastructure, Security, R&D, and Operations teams to support secure, stable, and scalable IT operations across the company. Serving as the primary IT owner for the NY office, the role is responsible for employee support, office infrastructure, endpoint management, SaaS administration, identity operations, and operational continuity in a fast-paced fintech environment. Responsibilities include hands-on operational support, infrastructure administration, endpoint and security operations, project execution, and cross-functional collaboration. The ideal candidate is a highly independent IT professional capable of managing operational responsibilities while collaborating within a global IT organization. RESPONSIBILITIES Onsite IT Operations & Employee Support Serve as the primary onsite IT owner for the NY office

About Us OpenFX is on a mission to move money as freely as data, unrestricted by time zones, banking hours, or legacy systems. We are building the infrastructure that will power the next generation of cross-border payment systems for institutions. The team's execution has been exceptional, and we're scaling at a remarkable pace. Our stellar early team comes with experience in companies like J.P. Morgan, Goldman Sachs, FalconX, Paypal, Affirm, Polygon, Kraken, Nium & others. We're backed by Accel, Lightspeed, NfX and other top-tier investors. Role Overview We are looking for a Security & Compliance Engineer to turn regulatory requirements into real, running controls — and then prove to auditors that they work. This is a senior, hands-on role for someone who thrives in fast-paced, heavily regulated environments and knows how to make compliance provable in production rather than on paper. OpenFX is expanding across Europe in a heavily regulated financial environment. As we scale into EU markets, regulators, auditors, and enterprise partners expect provable, continuously operating security controls — not slide decks or one-off audits. Compliance requirements (DORA, GDPR, SOC 2, ISO 27001, and region-specific regulations) are increasing faster than our ability to operationalize them, and this role exists to close that gap. You will own the security controls and evidence that regulators and auditors care about, end to end — from translating regulatory language into concrete mechanisms through to audit walkthroughs and remediation. You will partner closely with Legal, Compliance, Risk, and engineering to ensure compliance is built into the platform rather than bolted on after the fact. This role is based in Amsterdam, Netherlands (EU/EEA). Key Responsibilities: Own audit-ready security controls Design, implement, and maintain technical and operational controls for DORA, GDPR, SOC 2, ISO 27001, and future regional requirements. Ensure controls are not just documente

Toradex is a global company strongly focused on engineering & technology. We’re powered by a diverse & uniquely gifted workforce. We pursue the best people to propel our innovative vision of embedded computing and IoT. If you’re interested in being a driving force at an agile technology company, engineering clever computing solutions & helping other companies bring their products to life, we should talk. About the Role We are looking for a motivated Electronics Assembly Operator to support circuits assembly, soldering, rework, repair, inspection, and testing activities. This role is ideal for someone who is detail-oriented, hands-on, and comfortable following work instructions, IPC standards, and quality requirements in an electronics manufacturing environment. Key Responsibilities · Assemble, install, replace, and repair electronic components and connectors on PCBAs according to drawings, work instructions, IPC standards, and quality requirements · Perform hand soldering, touch-up, and component-level rework for through-hole, surface-mount, and fine-pitch components · Complete approved PCBA rework and repair, including solder bridge removal, lifted lead correction, connector replacement, and related defect corrections · Operate selective soldering and depaneling equipment while maintaining yield, quality, and basic autonomous maintenance requirements · Assist in materials handling and station setups · Inspect PCBAs for solder quality, component placement, polarity, cleanliness, and workmanship against IPC and internal standards · Document defects, corrective actions, inspection results, and traceability information for rework and repair activities · Support box build, final assembly, troubleshooting, repair verification, and continuous improvement activities across Production, Testing, Quality, and Engineering · Maintain a clean, organized, ESD-safe workstation and follow company procedures, SOPs, ISO requirements, and safety practices Skill

About the role As a Forward Deployed Engineer (FDE) focused on Inference & Post-Training, you will be a hands-on technical partner to our most strategic customers — production AI teams looking to leverage high quality models and do inference at scale. For us, FDE is not a replacement for a Solutions Architect; you will partner with our SAs as a deep-domain specialist in inference optimization, fine-tuning pipelines, and production deployment. As key contributors to both the CX, Engineering, and Sales organizations, FDEs add tremendous value by ensuring we can meet the requirements of our most complex POCs, facilitate successful platform adoption, and guide tailored optimization efforts — directly impacting customer success, company growth, and the hardening of our core platform. Must be a permanent resident or citizen of Singapore. Responsibilities Inference Engine Optimization: Select, configure, and optimize inference engine based on hardware, model architecture, and workload profile Configuration & Performance Tuning: Develop configuration updates to win critical POCs, benchmarks, and optimize customer deployments; tune KV cache, apply speculative decoding, determine optimal tensor parallelism, and determine quantization strategy to hit throughput and latency targets. Post-Training & Fine-Tuning: Drive hands-on RL training runs and optimize system design; guide customers through LoRA, SFT, DPO, RLHF, and GRPO pipelines from experimentation through production. Strategic Customer Alignment: Act as the primary technical point of contact for aligned strategic accounts — monitoring and optimizing endpoint configurations, helping customers get the most out of the platform, and collaborating to ensure we hit critical milestones. Opinionated Onboarding: Establish direct alignment with strategic customers at onboarding; ensure the right inference and post-training configurations are in place from day one to improve time-to-value. Product Feedback Loop: D

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an Physical Design Engineer to lead cross-functional efforts to solve complex physical design challenges and develop end-to-end RTL-to-GDS methodologies across advanced nodes, with a strong focus on PPA and runtime improvements. The engineer will architect, integrate, and deploy AI/ML-driven solutions into production physical design flows, creating custom CAD tools and partnering with internal teams and EDA vendors to drive next-generation, ML-enabled capabilities. This role is hybrid, based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are BS in Electrical or Computer Engineering (or equivalent experience) with 5+ years in Physical Design CAD methodology at advanced nodes. Proven track record improving PPA and/or runtime on high-performance, low-power taped-out designs. Hands-on with industry-standard EDA tools (e.g., Fusion Compiler) across synthesis, P&R, STA, signoff, and hierarchical flows. Strong Python/Tcl and data skills, with interest or experience in ML frameworks (PyTorch, TensorFlow), and the ability to drive complex projects independent

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking talented Physical Design Engineers to implement high-performance blocks for our industry-leading CPU and AI/ML architectures. You'll own the complete implementation flow from synthesis to tapeout, working alongside world-class engineers to push the boundaries of performance, power, and area. If you're passionate about crafting silicon that powers the future of AI computing and thrive on solving complex design challenges, we want you on our team. This role is hybrid , based out of Austin, TX, Santa Clara, CA or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on engineer with deep expertise in SOC/ASIC physical design and a track record of successful tapeouts. Passionate about optimizing PPA through innovative implementation techniques and close RTL collaboration. Strong problem solver who excels at debugging complex issues across design hierarchies. Collaborative team player who thrives in fast-paced, technically challenging environments. What We Need BS/MS/PhD in EE/ECE/CE/CS with proven experience in synthesis, PnR, and timing closure on taped-out designs. Expertise with industry-

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we build open, state of the art compute for real workloads and real developers. You will own CPU core-level testbench development and verification, shaping how our out-of-order RISC-V CPUs behave in silicon. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You bring 8+ years in CPU verification, CPU testbench development, or closely related digital design. You have deep hands-on experience building and owning CPU core-level testbenches, not just using existing environments. You know high-performance out-of-order CPU microarchitecture in depth. You are comfortable developing testbench infrastructure in CVM methodology, with UVM experience as a strong plus. You work comfortably across RTL, waveforms, logs, regressions, and cross-functional debug with design, DV, emulation, and post-silicon teams. You are comfortable using AI-assisted verification workflows to improve debug, stimulus creation, and coverage analysis, while applying strong engineering judgment to validate results. What We Need Lead hands-on CPU core-level testbench development for hi

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we're building cutting-edge AI compute solutions. Developing diagnostics programs to validate the functionality and stress the performance of our solutions is a critical part of delivering exceptional products. We are looking for Engineers to join our Diagnostics Development team. These engineers will work closely with our firmware, software, board, ASIC design and verification teams to ensure that the ASICs, boards, and AI compute systems meet the highest standards of quality and performance. This role is hybrid, based out of Toronto, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You're curious, hands-on, and excited by the challenge of building powerful systems that sit at the intersection of hardware and software. You enjoy working close to the metal, whether that’s writing code, debugging hardware, or exploring how systems perform under stress. You thrive in collaborative environments and love learning from teammates across disciplines like firmware, ASIC design, and manufacturing. You’re motivated by impact and want to contribute to technology that’s shaping the future of AI and computing. What We Need A

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Join Tenstorrent and help bring next-generation AI accelerator technology from silicon bring-up to production. You’ll work at the forefront of hardware innovation, diagnosing complex issues across chips, systems, firmware, and software while collaborating with some of the brightest engineers in the industry. This role offers the opportunity to solve challenging technical problems, build impactful debug solutions, and directly influence the reliability and performance of cutting-edge AI compute platforms. This role is hybrid, based out of Toronto, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on hardware debug engineer who thrives on solving complex, cross-functional problems at the intersection of silicon, firmware, and software. A curious and analytical problem solver who enjoys digging into failures, identifying root causes, and driving issues from initial discovery through resolution. An engineer with strong post-silicon validation and bring-up experience who is comfortable working in the lab and getting deep into system-level behavior. Someone who enjoys building tools, improving debug methodologies, and creating

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Curious about how cutting-edge hardware actually comes to life? We're looking for someone who’s excited to dive into the core of next-gen systems and help make them real. In this role, you’ll validate high-speed interfaces, solve complex system-level puzzles, and collaborate across teams to shape the future of AI/ML computing. If firmware, hardware, and hands-on debugging sound like your kind of fun — let’s chat! This role is hybrid and based in Vancouver, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You love bringing hardware to life and enjoy the thrill of solving tricky problems across the hardware–firmware boundary. You’re hands-on in the lab and comfortable with tools like oscilloscopes, protocol analyzers, and JTAG — digging deep doesn’t scare you. You’re comfortable jumping into unfamiliar problems and figuring things out — whether it’s in the lab or in firmware. You’re curious, collaborative, and excited to work on technology that pushes the boundaries of performance. What We Need Someone to take the lead in validating our next-gen PCIe interfaces — from controller to PHY, and everything in between. A strong co

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Design Verification Engineer to contribute to the unit-level verification of our RISC-V CPU front end—including instruction fetch, branch prediction, and surrounding fetch control structures. As a key individual contributor within our front-end DV team, you will focus on building testbenches, generating stimulus, and developing checkers for complex microarchitectural scenarios. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Front-End Experience: Solid background verifying CPU front-end blocks—such as instruction fetch, branch predictors (BTB, TAGE, RAS), instruction caches/TLBs, or decode—using SystemVerilog, UVM, and C++. Unit-Level Focus: Hands-on experience building clean, controllable unit testbench environments with precise stimulus and checking. Reusable Design: Pragmatic approach to building transactors, predictors, and scoreboards that can be reused across verification levels. Collaborative Problem Solver: Comfortable working alongside RTL designers to trace and fix misspeculation, redirect, and edge-case fetch bugs. What We Need Unit-Level Verifica

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking a Verification Lead for our next-generation AI hardware. You’ll guide a top-tier team of Verification Engineers, shaping test strategies to validate functionality and performance of our AI core. This role requires expertise in AI-specific data types, common AI data-movement compute patterns, and on-chip network validation, combined with strong leadership and collaboration skills. This role is hybrid, based out Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A Seasoned Verification Leader: An experienced ASIC/SoC lead with proven track record of leading teams through complex tape-outs. An AI Hardware Specialist: An expert in the nuances of high-performance compute, specifically focused on AI/ML architectures and the intricacies of tensor-based operations. A Systems Architect at Heart: A strategist who views verification through a system-level lens, ensuring that hardware, software, and on-chip networks (NoC) harmonize perfectly. A Technical Mentor: A hands-on guide proficient in UVM, SystemVerilog, and cocotb, dedicated to elevating team capabilities and driving rigorous coverage-driven methodologies. What We

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a CPU Verification Fellow to lead verification strategy and execution for next-generation RISC-V high-performance processors. This role requires deep CPU verification expertise, strong microarchitecture understanding, and the ability to guide large engineering teams from early design through tapeout and post-silicon validation. The ideal candidate has verified complex out-of-order, speculative, superscalar CPUs and can define scalable methodology across simulation, formal verification, emulation, FPGA, and silicon bring-up. This role is hybrid, based out of Santa Clara, CA or Austin, TX. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have deep experience verifying high-performance superscalar CPUs, ideally including out-of-order and speculative processors. You have strong knowledge of RISC-V architecture, including ISA compliance, privileged architecture, virtual memory, atomics, vector extensions, and memory model behavior. You are highly proficient in SystemVerilog, UVM, constrained-random verification, assertions, functional coverage, and advanced debug methodologies. You have hands-on experience with CPU refere

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we build open, state of the art compute for real workloads and real developers. You will lead our Bangalore-based CPU Core Design Verification team, driving both the technical strategy and the people leadership behind verification of our high-performance, out-of-order RISC-V CPUs. You will manage a team of core-level verification engineers, partner closely with our Santa Clara and Austin sites, and own delivery of core verification from architecture definition through tapeout readiness. This role is hybrid based out of Bangalore, India, with regular collaboration across our globally distributed CPU organization. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are 15+ years of CPU/DV experience, including 7+ years leading verification teams, with strong hands-on expertise in high-performance, out-of-order CPU verification. Deep microarchitecture & verification expertise, including ISA, RTL, UVM/CVM, testbench development, regressions, coverage, and complex debug. Strong people and technical leadership, with experience hiring, mentoring, developing engineers, and setting verification strategy and methodology across teams. Highly