Infrastructure Team Manager Jobs

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is building the world’s fastest, most efficient AI compute clusters. TT-Fabric is the high-performance nervous system of this platform: the low-level networking layer that lets thousands of RISC-V and AI processors snap together into a single, massively parallel distributed supercomputer. If you love squeezing nanoseconds out of hot paths, designing protocols that move data at absurd scale, and turning messy hardware constraints into elegant distributed systems, this is an opportunity to shape the fabric that future AI models will run on This role is hybrid based out of Santa Clara, CA; Austin, TX; or Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who We Are Strong systems engineer with deep C or C++ experience and comfort working in low-level or bare-metal environments. Passionate about hardware-software interaction, performance tuning, and eliminating inefficiencies at the protocol level. Curious about networking, synchronization, and communication across large clusters. Comfortable reasoning from first principles and challenging industry conventions. Motivated by building infrastructure that directly impacts large-scale

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we build open, state of the art compute for real workloads and real developers. You will own CPU focused test generator development and verification strategy, shaping how our out-of-order RISC-V CPUs are validated against complex ISA and microarchitectural behavior. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You bring 8+ years in CPU design verification, test generation, or closely related CPU validation work. You have led development of test generators for x86, ARM, or RISC-V ISA environments. You understand CPU ISA behavior, privileged architecture, and high-performance out-of-order CPU microarchitecture. You are comfortable building tools, stimulus, and automation that scale verification across large CPU programs. You communicate clearly across design, DV, architecture, emulation, and post-silicon teams. What We Need Lead development of CPU core-level test generators for high-performance out-of-order RISC-V cores. Own generator strategy, infrastructure, and methodology for ISA and microarchitectural verification in both pre-silico

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a person ready to take up the challenge of working in a high-profile project where we integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better. In this role, you will ensure functionality and performance of the system. This role is based out of Tokyo, Japan and offer flexible Hybrid work style. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Responsibilities: Verify Tenstorrent’s digital IP and SoC logic at chiplet integration level, using industry standard verification methodologies Build and improve components of verification infrastructure including model builds and simulation/regression runs, Create verification components like testbenches, checkers and test generators, Add assertions and coverages along associated methodologies, Build verification test plans for subsystems, align them with project stakeholders, implement test suites, summarize the results and share feedback with project stakeholders Publish and review verification metrics and drive

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we build open, state of the art compute for real workloads and real developers.You will own CPU core‑level verification, shaping how our out‑of‑order RISC‑V CPUs behave in silicon. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You bring 8+ years in CPU verification or closely related digital design. You know high‑performance out‑of‑order CPU microarchitecture in depth. You work comfortably with RTL, waveforms, logs, and complex debug scenarios. You communicate clearly across design, DV, emulation, and post‑silicon teams. What We Need Plan and drive functional verification for CPU core features and complex microarchitectural scenarios. Develop UVM, assembly, and C/C++ based stimulus, functional models, and coverage for ISA, RISC-V extensions, and un-core components. Debug simulation and emulation regressions using RTL understanding, waveforms, and logs to identify and resolve issues efficiently. Build and enhance coverage models, testbenches, and debug infrastructure to improve verification quality and coverage closure. Collaborate with design, validation, and

OUR MISSION At Redwood, we empower our customers with lights-out automation for their mission-critical business processes. ABOUT US Redwood Software is the leading orchestration platform for the autonomous enterprise, driving business transformation at the lowest total cost of ownership. Redwood empowers organizations to intelligently automate and orchestrate mission-critical business and IT processes across complex ERP, hybrid cloud, data and emerging agentic AI systems. Through its SaaS-first automation fabric—with AI embedded across the automation lifecycle—Redwood accelerates the path to autonomous operations. Backed by 30 years of experience and trusted by more than 50% of the Fortune 50, Redwood helps organizations unlock human potential to focus on innovation, growth and what’s next. CORE VALUES One Team. One Redwood Make Your Own Weather Obsess over Customer Success Work the Problem Be Curious Own the Outcome Respect Each Other YOUR IMPACT We are looking for a Software Engineer, Platform & Integrations . You will own the end-to-end delivery of complex features, optimize backend performance, and collaborate on architectural decisions that impact more than 1,000 enterprise customers worldwide. This is an ideal role for an experienced engineer who thrives on technical autonomy, enjoys tackling complex cloud-native challenges, and wants to have a direct impact on product direction. Feature Ownership & Architecture: Design, build, and maintain scalable, secure, and highly observable backend services and microservices using Java and Spring Boot. Platform Evolution: Actively contribute to upgrading our core platform infrastructure, focusing on system resilience, performance tuning, and seamless component communication. Security & Compliance: Implement rigorous secure coding practices to safeguard data exchange and ensure compliance across our multi-tenant SaaS environment. Collaborative Execution: Work closely with Product, QA, and senior le

OUR MISSION At Redwood, we empower our customers with lights-out automation for their mission-critical business processes. ABOUT US Redwood Software is the leading orchestration platform for the autonomous enterprise, driving business transformation at the lowest total cost of ownership. Redwood empowers organizations to intelligently automate and orchestrate mission-critical business and IT processes across complex ERP, hybrid cloud, data and emerging agentic AI systems. Through its SaaS-first automation fabric—with AI embedded across the automation lifecycle—Redwood accelerates the path to autonomous operations. Backed by 30 years of experience and trusted by more than 50% of the Fortune 50, Redwood helps organizations unlock human potential to focus on innovation, growth and what’s next. CORE VALUES One Team. One Redwood Make Your Own Weather Obsess over Customer Success Work the Problem Be Curious Own the Outcome Respect Each Other YOUR IMPACT We are looking for a Software Engineer, Platform & Integrations . Working closely with senior and lead engineers, you will design, develop, and maintain high-quality features that power enterprise data exchange for more than 1,000 customers worldwide. This is an incredible opportunity to deepen your expertise in cloud-native architectures, enterprise security, and modern DevOps practices in a fast-growing product environment. Feature Development & Design: Write clean, maintainable, and well-tested code using Java and Spring Boot to deliver scalable backend services and microservices. Platform Reliability: Contribute to enhancing the monitoring, logging, and observability of our core platform to ensure high availability and performance. Security & Compliance: Implement secure coding practices to safeguard data exchange and maintain compliance across our cloud infrastructure. Collaborative Execution: Work within an agile team, collaborating closely with QA, Product, and fellow engineers to deliver high-qual

Silicon Verification Engineer Multiple roles across different levels Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. The verification team sits within the Silicon design team and is responsible for ensuring that the RTL created by the logical design team and used by the physical design team matches the architecture specification for Graphcore silicon. The silicon verification engineer is responsible for verification activities within Graphcore, helping the team meet the company objectives for quality silicon delivery. Responsibilities Verification planning, specification and closure of functional coverage Providing feedback to architects Test generation and failure diagnosis/triage Contributing to shared verification infrastructure Ensuring good communication between sites Essential skills: • Verification experience in relevant industry • Proven leadership and planning skills • Highly motivated, a self starter, and a team player • Ability to work across teams and programming languages to find root causes of deep and complex issues • Experience of the verification process applied in CPU and/or ASIC environments • System Verilog, Python, C++, Linux Desirable skills: • UVM • SVA • Assembly languages • LLVM, GCC • DVCS e.g. Git • SGE or other DRMS • XML and XPath/XSLT • Web programming – HTML/DOM, Javascript, SQL Benefits: In addition to a competitive salary, Graphcore offers a competitive benefit

Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. The physical design team sits within the wider silicon design team which includes RTL, verification and DFT. Our work also involves strong links with architecture, packaging and product engineering. We are responsible for working with those teams to create high-quality RTL and building the final chip layout (e.g. GDSII) ensuring a signoff-quality design is delivered to the Foundry (e.g. TSMC). We are looking to hire high-quality silicon physical design engineers to join our team. The successful candidate will support the team with achieving our goals and creating the right engineering solutions. We are a collaborative team and good communication is essential, as is the ability to adapt and learn. For the successful candidate we offer an open, honest and collaborative environment working on leading-edge designs at the most advanced nodes. Our engineers are not siloed, and they are trusted and encouraged to ta ke ownership of their designs and problem solutions. You will be part of a team that looks for improvements to everything we do: our designs, our flows, our methodologies, our infrastructure. Responsibilities and Duties Applicants will be expected to contribute technically to the development of Graphcore's next generation of AI superchips, focusing on achieving robust, high-performance and power-efficient designs

About us Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Job Summary Working within the Silicon verification team, the silicon verification engineer is responsible for a wide range of tasks within the silicon verification team. This person is responsible for verification activities within Graphcore, helping the silicon team meet the company objectives for quality silicon delivery. The Team The verification team sits within the Silicon design team. We are responsible for ensuring that the RTL created by the logical design team and used by the physical design team matches the architecture specification for Graphcore silicon. Responsibilities and Duties V erification activit i es within the verification team Ensuring good communication between sites Verification planning, specification and closure of functional coverage Providing feedback to architects Test generation and failure diagnosis/triage Contributing to shared verification infrastructure Candidate Profile Essential: verification experience in relevant industry Proven leadership and planning skills Be highly motivated, a self starter, and a team player Ability to work across teams and programming languages to find root causes of deep and complex issues Ability to research along with the knowledge to solve complex problems Presents technical and functional knowledge to design experiments/ projects that contribute to overall

Silicon Verification Engineer Multiple roles across different levels Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. The verification team sits within the Silicon design team and is responsible for ensuring that the RTL created by the logical design team and used by the physical design team matches the architecture specification for Graphcore silicon. The silicon verification engineer is responsible for verification activities within Graphcore, helping the team meet the company objectives for quality silicon delivery. Responsibilities Verification planning, specification and closure of functional coverage Providing feedback to architects Test generation and failure diagnosis/triage Contributing to shared verification infrastructure Ensuring good communication between sites Essential skills: • Verification experience in relevant industry • Proven leadership and planning skills • Highly motivated, a self starter, and a team player • Ability to work across teams and programming languages to find root causes of deep and complex issues • Experience of the verification process applied in CPU and/or ASIC environments • System Verilog, Python, C++, Linux Desirable skills: • UVM • SVA • Assembly languages • LLVM, GCC • DVCS e.g. Git • SGE or other DRMS • XML and XPath/XSLT • Web programming – HTML/DOM, Javascript, SQL Benefits: In addition to a competitive salary, Graphcore offers a competitive benefit

Silicon Physical Design Engineer Multiple roles across different levels Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. The physical design team sits within the wider silicon design team which includes RTL, verification and DFT. Our work also involves strong links with architecture, packaging and product engineering. We are responsible for working with those teams to create high-quality RTL and building the final chip layout (e.g. GDSII) ensuring a signoff-quality design is delivered to the Foundry (e.g. TSMC). We are looking to hire high-quality silicon physical design engineers to join our team. The successful candidate will support the team with achieving our goals and creating the right engineering solutions. We are a collaborative team and good communication is essential, as is the ability to adapt and learn. For the successful candidate we offer an open, honest and collaborative environment working on leading-edge designs at the most advanced nodes. Our engineers are not siloed, and they are trusted and encouraged to ta ke ownership of their designs and problem solutions. You will be part of a team that looks for improvements to everything we do: our designs, our flows, our methodologies, our infrastructure. Responsibilities and Duties Applicants will be expected to contribute technically to the development of Graphcore's next generation of AI superchips, fo

CLEAR is building THE secure identity company of the future. Our mission is to make experiences safer and easier—physically and digitally. With more than 43 million Members and a growing network of partners across the world, CLEAR's secure identity platform is transforming the way people live, work, and travel. Whether it’s at the airport, stadium, or throughout your everyday life, CLEAR unlocks the magic of frictionless experiences. CLEAR is seeking a Senior Security Operations Analyst III to join our SOC team to help strengthen our ability to detect, investigate, and respond to evolving security threats. In this role, you’ll lead complex investigations, improve CLEAR’s threat detection and response capabilities, and serve as a trusted security partner while helping develop the analysts and program around you. What you'll do: Lead complex investigations of security events across corporate networks, endpoints, data centers, cloud environments, and other critical systems, driving incidents from initial analysis through escalation and remediation Develop, tune, and optimize threat detection logic across SIEM, EDR, and other security platforms, proactively identifying coverage gaps, reducing false positives, and improving the fidelity of security alerts Partner with Engineering, Infrastructure, and other teams to investigate threats, identify root causes, communicate risk, and drive timely remediation and improvements to CLEAR’s security posture Apply threat intelligence, data, automation, and AI-enabled tools to identify emerging attack patterns, accelerate investigations, improve detection workflows, and strengthen decision-making while applying sound security judgment Serve as a subject matter expert and escalation point for other analysts, mentoring junior team members, sharing knowledge, and helping establish scalable processes, playbooks, and standards for threat detection and analysis Continuously evaluate CLEAR’s detection coverage against the evolving t

Role Overview We are seeking a Staff Simulation Engineer to build an end-to-end aerial autonomy simulation stack at DoorDash Labs. This is a highly technical, hands-on leadership role focused on defining and implementing the simulation architecture that underpins autonomy development, validation, CI/CD testing, and pilot training. You will operate as the technical authority for simulation: owning core architecture decisions, developing key components yourself, and setting engineering standards. You will build and mentor a small, high-caliber simulation team while remaining deeply involved in implementation and system design. This role is ideal for someone who has built simulation systems from first principles, understands simulator internals deeply, and is excited to create a world-class platform from scratch. Key Responsibilities Architect and implement an end-to-end simulation stack for aerial autonomy at DoorDash Labs.. Develop high-fidelity simulation capabilities, including: Flight dynamics modeling Contact modeling and constraint handling Sensor and perception simulation Autonomy software-in-the-loop (SITL) integration Design and implement scalable simulation infrastructure to support: Regression testing in CI/CD pipelines Continuous validation of flight autonomy and autopilot software stack Mission-level testing and scenario generation Build cloud-deployed simulation systems to enable large-scale parallel testing and pilot training. Partner closely with autonomy, controls, and aircraft teams to ensure simulation fidelity and validation alignment. Establish technical direction, architecture standards, and performance benchmarks for simulation. Mentor and grow a small team of simulation engineers while remaining deeply hands-on. Required Qualifications Master’s or PhD in Computer Science, Electrical Engineering, Mechanical Engineering, Robotics, Aerospace Engineering, or a related field. 10+ years of experience in robotics or physics-based simulation. Deep expe

We believe that the way people interact with their finances will drastically improve in the next few years. We’re dedicated to empowering this transformation by building the tools and experiences that thousands of developers use to create their own products. Plaid powers the tools millions of people rely on to live a healthier financial life. We work with thousands of companies like Venmo, SoFi, several of the Fortune 500, and many of the largest banks to make it easy for people to connect their financial accounts to the apps and services they want to use. Plaid’s network covers 12,000 financial institutions across the US, Canada, UK and Europe. Founded in 2013, the company is headquartered in San Francisco with offices in New York, Seattle, Washington D.C., Raleigh, London, and Amsterdam. About the team The Privacy & Regulatory Counsel will join Plaid’s Privacy & Regulatory Legal team, which supports Plaid in building infrastructure and products responsibly by translating complex regulatory expectations into concrete guidance. We are a lean, highly collaborative team that includes Privacy and Regulatory counseling. Role Description As Privacy & Regulatory Counsel at Plaid, you will partner with cross-functional teams to analyze complex legal and regulatory issues, provide practical guidance, and support business initiatives in compliance with applicable laws and regulations. This role is ideal for an ambitious attorney who exhibits a growth mindset and eagerness to learn. We value strong communicators who can empathize with business partners, deliver solutions-oriented advice, and foster trust with colleagues at all levels. Responsibilities Monitor and analyze new or changing laws, regulations, supervisory guidance, enforcement activity, and industry developments - and translate them into concise and practical guidance. Answer questions about regulatory compliance for Product, Governance, People, and other cross functional teams. Maintain Plaid’s regula

Who are we? Cohere is the leading security-first enterprise AI company. We build cutting-edge foundation AI models and end-to-end products that are designed to solve real-world business problems. We’re training and deploying frontier models for enterprises who are building AI systems. We believe that our work is instrumental to the widespread adoption of AI and we are looking for folks that want to be part of that. We obsess over what we build. Each one of us is responsible for contributing to increasing the capabilities of our models and the value they drive for our customers. Cohere is a team of researchers, engineers, designers, and more, who are all passionate about their craft. We are a global technology company headquartered in Toronto with key offices in London, New York City, San Francisco, Montreal, Paris, Berlin and Seoul. Join us! Role Overview Ready to build AI agents that revolutionize enterprise security? The North Security team is looking for a Senior Software Engineer to create autonomous systems that handle the complex, critical tasks security practitioners face every day. Key Responsibilities As a Senior Software Engineer focused on agentic security, you'll build intelligent systems that empower security teams. Your responsibilities will include: Build autonomous security agents that perform alert triage, secure code reviews, threat modeling, and vulnerability assessment Develop agent orchestration systems that help security practitioners automate repetitive security tasks Design and implement agent security controls to ensure our AI agents can safely interact with sensitive enterprise data Create the security infrastructure that allows agents to operate in high-trust environments with stringent deployment requirements Ship production-ready agent capabilities that run efficiently in resource-constrained environments Research and implement novel security patterns for AI agent systems, sometimes requiring custom solutions where standard libraries fal