Packaging Module Development Engineer Jobs

Job Details: Job Description: As one of the world's largest semiconductor manufacturers, Intel is committed to advancing every aspect of semiconductor technology, from process development and manufacturing to advanced packaging and reliability characterization. Employees within Intel Foundry are part of a global network spanning technology development, manufacturing, assembly, test, and quality organizations across both front-end silicon and advanced packaging facilities. You will join the Foundry Lab Network (FLN), a key organization within Foundry Quality, Reliability, and Labs (FQRL), located at Intel's growing Chandler, Arizona site. This site serves as the technology development hub for Intel's most advanced packaging technologies, including Hybrid Bond Interconnect (HBI), Embedded Multi-die Interconnect Bridge (EMIB-T), glass substrates, Foveros, and future advanced packaging innovations. FLN is actively expanding its laboratory capabilities and capacity to support Intel Foundry's roadmap, enabling faster technology qualification and accelerating development cycles through Quick Turn Monitoring (QTM) solutions that significantly reduce time-to-data. As the Stress Test and Reliability (STaR) Back-End Laboratory Manager, you will play a critical leadership role within FLN. You will partner closely with Packaging Technology Development, Quality and Reliability, and Failure Analysis teams to establish and enhance laboratory capabilities that support qualification and certification of next-generation packaging technologies and products. This position offers a unique combination of people leadership, technical problem solving, and organizational strategy. You will lead a team of 7-10 talented engineers, spearhead cross-functional efforts to resolve complex reliability and technology challenges, drive strong quality and operati

Position: Assistant Professor Printing Technology Department: Printing Technology Location: College Campus Key Responsibilities Deliver lectures and practical sessions in Printing Technology subjects. Prepare lesson plans, study materials, laboratory manuals, and assessments. Guide students in academic projects, internships, seminars, and industrial training. Conduct laboratory sessions and ensure the proper maintenance of printing equipment and laboratories. Evaluate student performance through assignments, practicals, and examinations. Participate in curriculum development, accreditation activities, and departmental administration. Encourage research, innovation, and collaboration with the printing and packaging industry. Perform academic and administrative responsibilities assigned by the Head of Department. Eligibility Qualification: B.E./B.Tech and M.E./M.Tech in Printing Technology or a relevant specialization (Ph.D. preferred)

JLL empowers you to shape a brighter way . Our people at JLL are shaping the future of real estate for a better world by combining world class services, advisory and technology for our clients. We are committed to hiring the best, most talented people and empowering them to thrive, grow meaningful careers and to find a place where they belong. Whether you’ve got deep experience in commercial real estate, skilled trades or technology, or you’re looking to apply your relevant experience to a new industry, join our team as we help shape a brighter way forward. Mechatronics & Robotics Technician - JLL What this job involves: As a Mechatronics & Robotics Technician, you will use your skills to support the Operations Maintenance team in repairing and maintaining material handling equipment and pneumatic systems throughout the building. You will have the opportunity to install, maintain and repair automated packaging and distribution equipment. In addition to developing your skills, you will have the opportunity to mentor junior technicians to grow in their roles. What your day-to-day will look like: Promote a safe working environment by following all safety procedures Complete preventative maintenance routines with proper documentation Troubleshoot electrical and mechanical problems related to all Material Handling Equipment (MHE) which includes belts, motors, photo-eyes, relays, and more

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Introduction: The Advanced Packaging Technology Development (APTD) team at Micron drives the technologies that enable the AI era. We work hands‑on with global R&D, suppliers, and manufacturing teams to turn breakthrough ideas into production‑ready solutions. Our work sits at the intersection of innovation, scale, and real‑world impact—and collaboration is how we win Position Overview: Artificial intelligence is transforming the world, and High Bandwidth Memory (HBM) is at the center of that transformation. As a Senior or Staff Engineer on the Dry Etch R&D team, you will play a key role in developing and scaling plasma‑based etch processes that enable next‑generation packaging technologies. This role offers deep technical ownership, broad cross‑functional collaboration, and the opportunity to influence long‑term technology roadmaps from early research through high‑volume manufacturing. Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Are you eager to be a pioneer in AI and semiconductor breakthroughs? At Micron, we invite a passionate Staff Engineer, Collateral Integration Engineer to join our upbeat group. This opportunity offers the chance to work on innovative technology within a team-orie

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description As Package Characterization Lab Manager within Advanced Packaging Technology Development (APTD), you will lead a high-performing team of shift engineers and technicians delivering package characterization and failure analysis (FA) support for leading-edge technology development in advanced packaging. You will provide technical direction, own lab operational excellence and workforce development, ensuring timely, high‑quality results that directly impact critical APTD technical decisions. This role partners closely with Micron's global engineering labs, subject-matter experts and external vendors to expand lab capability, efficiency and ensure forward-looking readiness for new technologies. Responsibilities and Tasks Lab Management, Compliance & Audits Lead Package Characterization lab operations to meet key performance metrics, cycle-time and safety standards. Plan and optimize FA lab equipment, space, and budget to support current and future needs with high utilization efficiency. Coordinate timely equipment calibration (external vendors), repairs, and spare parts procurement to ensure sustained equipment uptime. Evaluate and introduce new FA tool models and capabilities in partnershi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking experienced engineers for Principal, MTS, and SMTS roles. The level at which candidates are hired will be determined by their years of experience, demonstrated technical depth, and overall qualifications Principal Photonics Integration Engineer The Advanced Packaging Technology Development (APTD) team is shaping the future of memory, storage, and photonics technologies that power AI, high-performance computing, and next-generation data infrastructure. We collaborate across research, device, process, packaging, and manufacturing organizations to develop innovative solutions that move quickly from concept to production. Join a team where technical challenges are complex, innovation is constant, and your work will directly influence Micron's technology roadmap. As a Principal Photonics Integration Engineer, you will lead the development and integration of silicon photonics and heterogeneous integration technologies that enable high-performance optical connectivity solutions. This role combines process integration, advanced packaging, device development, and program leadership to bring new technologies from concept through manufacturing readiness. You will work across multidisciplinary teams to solve complex technical challenges while employing AI-enabled engineering tools to accelerate development and improve decision-making. Responsibilities: Develop an

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Role Summary: As an Advanced Packaging Characterization Engineer within Advanced Packaging Technology Development (APTD), your responsibilities include but are not limited to providing package development characterization and failure analysis support for development test vehicles, qualifications, customer returns, new product introduction, and general test failures. You are the domain expert on advanced packaging characterization methodology and responsible for establishing relevant analysis methods needed to support technology development. You will also have a thorough understanding of product package assembly and process flow, to work with Process Integration, Process Development, and Product Engineering groups ensuring failures are classified and root cause fixes implemented. Main Responsibilities: Conduct Electrical and PFA Characterization Perform electrical fault analysis to pin-point hot

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As FE CPIE CPI PI Senior Engineer at Micron Technology, Inc., you will be responsible for working with global Micron network to drive each silicon node's Packaging Product yield, quality improvement, new product introduction (NPI) through technical expertise, business process management and project execution. In addition, you will be responsible in integrating solutions by connecting cross-functional expertise, standardizing the business process and regularly benchmarking internal and external intelligence to achieve the highest value bits and productivity. In addition, you will leverage AI-enabled engineering approaches, advanced analytics, and digital tools to accelerate problem solving, improve productivity, enhance decision quality, and drive continuous innovation across product yield, quality, and business processes. Responsibilities and Tasks Promote worldwide synergy for improved benchmark performance and efficiency gains through global project management and execution, network BKM leveraging and enhancement, and business process creation and re-engineering. Define strategies to ensure that Packaging Technology and interaction with Front End manufacturing process are fully developed and qualified well ahead of any qualific

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Location Singapore Department MSB Process Integration Engineering Project Title Semiconductor Manufacturing Reject Reduction Through Process Variability Analytics Project Description The intern will participate in a structured project focused on improving semiconductor manufacturing reject rates through process variability reduction. The project will provide practical exposure to semiconductor packaging, Assembly and Test processes, and manufacturing data analytics. Under appropriate guidance, the intern will analyze inline signals, process parameters, and test results to identify patterns and potential contributors to process variability and yield loss. The intern will also explore the responsible application of Artificial Intelligence and AI-Enabled analytical tools to improve the efficiency, quality, and effectiveness of project analysis. Objective of the Project The project aims to: Identify potential sources of process variability and yield loss. Improve the analysis of inline signals, process data, and test results. Determine relationships between process conditions and manufacturing rejects. Develop data-driven re

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Summary The DRAM Packaging organization is responsible for developing and delivering advanced memory packaging solutions that enable Micron’s next generation products. The team partners across design, technology development, manufacturing, quality, supply chain, and external ecosystem partners to drive innovation, accelerate product development, and deliver industry-leading packaging technologies that support markets including AI, cloud, mobile, automotive, high-performance computing, and data centers! Position Overview As the Director of DRAM Packaging, you will lead the strategy, development, and execution of advanced packaging solutions across Micron's memory portfolio. You will define technology roadmaps, drive innovation in next-generation packaging architectures, and build a high-performing global engineering organization. This executive leadership role combines technical expertise, business strategy, customer engagement, and digital transformation to accelerate innovation, improve organizational effectiveness, and strengthen Micron’s competitive position. Responsibilities Define and execute long-term DRAM packaging strategies that support future product, technology, and business objectives Lead development and deployment of advanced packaging technologies, including HBM, LPDRAM, DDR, 2.5D/3D integration, heterogeneous integration, chiplets, and next-generation interconnect solutions Drive adoption of AI, machine learning, advanced analytics, and digital engineering

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As part of APTD Technology Development Process Integrator, you will be responsible for developing advanced packaging process solution and ensure New Process, New Equipment, New Material and Path finding activities success for all adv pkg products in Micron. To lead/contribute new Technode process readiness and improving the yield, quality and reliability with process characterization and optimization and new materials, machines & technologies introduction. Having understanding of Frontend Process is a plus, packaging requirements, chip package interaction, equipment understanding and process technology in the industry. The ability to enable best technology for New Technode with packaging requirements. You will also be required to drive & collaborate with cross functional teams to resolve process related problems. Ensure smooth transition from new process development, 1st qualification success to small volume production launch Development and Qualification of new packaging process, material, equipment and technology solutions to meet new Technode requirements and schedule Perform CPI NUDD, process TRA, Si characterization, risk mitigation execution and process recipe readiness prior Silicon arrives and ensure 1st pass rate. Qualify new process/technology/equipment/materials Technical capability Identify path finding opportunities for Micron's technology leadership with BIC t

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the team defining the future of packaging of complex memory systems! Our Package pathfinding and Architecture organization sits at the intersection of silicon, packaging, systems, and customer needs—turning complex scaling challenges into technologies that power next generation platforms, through cutting edge packaging technologies. If you enjoy working on problems with real industry impact, look no further! This is a technical pathfinding role driving forward-looking packaging technology for next generation memory systems from datacenter to edge-AI. You will leverage understanding of end to end memory system architectures, to guide long term package technology direction, and partner with customers, to build innovative ideas into scalable products. You will interface between package process technology, materials, electrical, thermo-mechanical and system performance areas to guide the package strategic roadmaps for Micron. Responsibilities: Define next‑generation package pathfinding and system architectures optimizing for speed performance, system bandwidth, power, capacity, thermal, mechanical and electrical performance. Lead cross‑stack co‑optimization across silicon, package, board, and system with package centric solutions approach Drive long‑term memory technology packaging strategy and influence industry standards Work closely with silicon, and system design teams and customers for next generation and long term disruptive solutions to boost speed performance for edge-AI and d

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an SoC Physical Design Senior Manager, HBM in the Heterogeneous Integration Group (HIG), you will lead a team of physical design and physical verification engineers responsible for implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver best‑in‑class PPA (performance, power, area) and robust signoff collateral for tapeout. This is a hands‑on role with opportunities to own blocks or top‑level integration across multiple product generations. Key Responsibilities Recruit, develop, and mentor a team of physical design engineers delivering HBM base die products. Plan project resourcing requirements and timelines. Prioritize resources across projects and individual assignments to meet aggressive product delivery schedules. Drive physical implementation for SoC blocks and/or top-level including floorplanning, placement, CTS, routing, and physical optimization to meet PPA targets. Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs. Collaborate with design and integration teams to ensure clean implementation of clocking/reset strategy, power architecture, and SoC integration requirements. Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY‑adjacent logic) with focus on robust

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Role Summary: We are currently experiencing a ground-breaking period in artificial intelligence (AI), where AI is anticipated to become an integral component of daily life. This proliferation is being fueled by advances in memory and compute technologies. High bandwidth memory (HBM) is at the forefront of these innovations. Micron’s Advanced Packaging Technology Development (APTD) is responsible to deliver package development for high performance memory products and transfer to manufacturing . We are looking for an Advanced Packaging Metrology-RDA Engineer to join our Advanced Packaging Technology Development (APTD) team! Your responsibilities include but are not limited to developing and enabling innovative inspection and metrology techniques to enable advanced packaging technologies. You will also be required to identify , diagnose, and propose y

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Principal Signal Integrity Engineer — Interface Pathfinding About the Role At Micron, we transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next era of AI, ML, and advanced computing. Micron’s Interface Pathfinding team operates at the leading edge of that mission — serving as a bridge between corporate strategy and engineering through forward-looking investigation and development of energy-efficient bandwidth solutions. Our work spans innovative circuit, signaling, packaging, and interconnect solutions with a 3–5 year technology horizon, grounded in rigorous analysis, hands-on measurement, and a commitment to building a robust intellectual property portfolio. As a Principal Signal Integrity Engineer , you will be a core technical contributor on a deliberately small, senior team united around the goal of preparing high-speed interface innovations for high-confidence product adoption. What You’ll Work On Micron’s Interface Pathfinding team investigates and validates novel interconnect and signaling solutions for high-speed memory and die-to-die interfaces. The signal integrity scope is broad and analytically deep — spanning electrical modeling, channel analysis, and substrate evaluation — with an emphasis on original analysis rather than execution of established playbooks. Key signal integrity domains include: Interconnect Modeling — Generating an