Packaging Tech Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Intro: The Advanced Packaging Technology Development (APTD) department at Micron Technology is at the forefront of innovation, driving the advancement of memory and storage Interconnects and Packaging solutions that transform how the world uses information. Our team is dedicated to developing innovative processes and technologies that enable the creation of next-generation semiconductor products which drive the AI revolution. Position Overview: As a Staff Process Engineer in Advanced Packaging CMP team, you will be primarily responsible for starting up, developing and optimizing processes to improve product quality and reliability, working on process yield improvement, cost reduction, productivity improvement and risk management as well as resolving manufacturing line problems. You will also be required to identify, diagnose and resolve assembly process related problems by applying failure analysis, FMEA, 8D or SPC/FDC methodology. This position requires communication and collaboration with associates both within the region and internationally. Strict adherence to Micron Intellectual Property Protection policy is vital. This role will also extensively collaborate with vendors to develop processes that meet integration requirements. Responsibilities: Perform fundamental research, consumables development, and hardware evaluation, as well as test processes for novel applications Initiate and manage experiments to widen process margins and evaluate man

Define the physical limits of what a chip can do, then break them! NVIDIA's Silicon Co-Design Group sits at the crossroads of architecture, silicon, systems, and manufacturing, where first principles thinking translates directly into product outcomes at scale. As GPU power density and thermal limits approach physical boundaries, the gap between system architecture needs and manufacturable, testable capabilities widens with every generation, and this role exists to close it. You wouldn't be maintaining existing solutions, you'd be identifying where physical constraints will erode NVIDIA's competitive edge before anyone else sees it coming, then building the cross-domain responses that ensure the next generation leapfrogs those limits entirely. The problems here don't have known answers yet: Every generation of NVIDIA silicon pushes closer to the limits of physics. The Co-Design Architect role isn't about optimizing within known bounds; it's about redrawing those bounds entirely. If you want your work to shape what's physically possible in the world's most demanding computing products, this is where that work happens. What you'll be doing: Power, Thermal & Packaging Limits Analysis: Gather and analyze the hard constraints of packaging, power delivery, and thermal dissipation against roadmap demands, predicting when those constraints will reduce competitiveness and acting before they do. Cross-Domain Solution Development: Develop solutions that span silicon features, packaging innovation, firmware and hardware co-design, and DFX updates, ensuring future products are not only performant but testable to the highest quality and reliability standards. Packaging Technology Evaluation: Assess emerging packaging technologies for their voltage/frequency, noise, reliability, and testability implications, determining which are worth adopting an

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Intro: The Advanced Packaging Technology Development (APTD) department at Micron Technology is shaping the future of memory and storage technology through advanced packaging innovation. Our team develops the processes, automation, and manufacturing capabilities that enable next-generation semiconductor products. Working closely with global R&D and manufacturing partners, we turn new ideas into scalable solutions that help maintain Micron’s leadership in the industry. Position Overview: As a Process Engineer, you will play a key role in improving the quality, reliability, and manufacturability of future memory products. This position combines hands-on problem solving, process optimization, and cross-functional collaboration in a fast-paced development environment. You will help drive technical advancements, influence technology roadmaps, and contribute directly to the success of next-generation semiconductor solutions. Responsibilities: Optimize automation, equipment, and process performance to improve product quality, reliability, and cost Develop and enhance host, automation, and data systems to accelerate learning and decision-making Perform root cause analysis and failure investigations using methodologies such as FMEA, 8D, SPC, and FDC Partner with equipment, process development, and process integration teams to develop and implement new solutions Support pilot line operations and technology transfer to high-volume ma

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The HBM Design Technology Package Co-Optimization (DTPCO) organization is seeking a Staff Engineer! Lead the design and development of test vehicles that enable technology learning and risk reduction for future HBM products! This role serves as a key technical contributor within DTPCO, partnering closely with Architecture, Design, Layout, Product Engineering, Reliability, and Advanced Packaging teams to translate emerging product requirements and technology challenges into actionable test vehicle solutions. You will apply expertise in semiconductor design, physical implementation, silicon characterization, and advanced packaging technologies to define test structures, develop validation strategies, and generate data that drives product decisions across future HBM generations. Unlike a traditional product role centered on ownership of product blocks, this position emphasizes enabling learning in development and engineering. It does so by developing representative test vehicles and characterization structures. Key Responsibilities Serve as a technical lead for HBM test vehicle design and structure development within DTPCO. Partner with HBM product, technology and reliability team. Define and implement test structures targeting key learning areas such as package interaction and reliability Drive test vehicle content definition, structure specifications, measurement requirements, and validation objectives. Analyze silicon characterization and qualification results to identify optimization opportunit

Job Details: Job Description: The Role and Impact We are seeking a dynamic individual to lead global supply chain engineering and commercial teams in optimizing supply chain performance and fostering supplier relationships in support of Advanced Packaging Technology and Manufacturing (APTM) operations. In this role, you will drive operational excellence by integrating supplier strategies with Intel's manufacturing capabilities, collaborating closely with cross-functional teams to develop and implement strategies across global manufacturing sites. Business group Strategic Parts and Service Supply Chain (SPSC) is part of the Foundry Construction and Sourcing (FCS) team in Intel Foundry. We play a pivotal role in developing and managing supply chain solutions supporting Intel Foundry's wafer/packaging development and manufacturing operations. Key Responsibilities - Lead global supply chain teams to optimize supplier performance and operational efficiency through clear metrics, market intelligence, and continuous improvement. - Build strategic supplier partnerships to drive long-term engineering and supply chain roadmaps aligned with future technological needs. - Lead benchmarking and industry intelligence to drive supplier and technology improvements in factory equipment spares and service products. - Provide leadership through goal setting, facilitating team execution, maintaining accountability, and driving performance management practices. - Inspire and develop teams to achieve results while role modeling Intel values and creating a productive work environment. Qualifications: Minimum Qualifications - Bachelor's degree in a relevant field. - 12+ years of progressive experience with a Bachelor's degree, 10+ years of experience with an advanced degree in supply chain, engineering

Job Details: Job Description: As a Packaging Module Development Engineer, you will play a pivotal role in the development and optimization of Intel's assembly media and collaterals. Your daily work will involve designing innovative solutions to improve media and collateral reliability, manufacturability, and cost efficiency. Your contributions will directly support Intel's cutting-edge assembly packaging technology roadmap, driving advancements in semiconductor manufacturing processes. Business Group You will be part of Intel Corporation's Media Development organization, a team dedicated to advancing packaging technologies and manufacturing processes. This group operates at the forefront of innovation, enabling high-performance products and driving Intel's leadership in the semiconductor industry. By joining this collaborative environment, you will contribute to Intel's broader goals of delivering transformative technology solutions. Key Responsibilities Develop and optimize media and collaterals to meet quality, reliability, cost, yield, and productivity targets. Design and implement new media and collateral solutions, leveraging statistical methods like Design of Experiments (DOE) and Statistical Process Control (SPC). Conduct evaluations of media and collaterals under simulated field conditions, including tests for heat, humidity, temperature cycling, and dynamic forces. Lead initiatives to identify and mitigate media and collateral quality and reliability risks, utilizing innovative tools and methods. Provide technical consultation on media and collateral challenges and deliver solutions that align with operational and technology milestones. Document technical improvements and innovations through research papers and presentations. <p styl

Job Details: Job Description: As one of the world's largest semiconductor manufacturers, Intel is committed to advancing every aspect of semiconductor technology, from process development and manufacturing to advanced packaging and reliability characterization. Employees within Intel Foundry are part of a global network spanning technology development, manufacturing, assembly, test, and quality organizations across both front-end silicon and advanced packaging facilities. You will join the Foundry Lab Network (FLN), a key organization within Foundry Quality, Reliability, and Labs (FQRL), located at Intel's growing Chandler, Arizona site. This site serves as the technology development hub for Intel's most advanced packaging technologies, including Hybrid Bond Interconnect (HBI), Embedded Multi-die Interconnect Bridge (EMIB-T), glass substrates, Foveros, and future advanced packaging innovations. FLN is actively expanding its laboratory capabilities and capacity to support Intel Foundry's roadmap, enabling faster technology qualification and accelerating development cycles through Quick Turn Monitoring (QTM) solutions that significantly reduce time-to-data. As the Stress Test and Reliability (STaR) Back-End Laboratory Manager, you will play a critical leadership role within FLN. You will partner closely with Packaging Technology Development, Quality and Reliability, and Failure Analysis teams to establish and enhance laboratory capabilities that support qualification and certification of next-generation packaging technologies and products. This position offers a unique combination of people leadership, technical problem solving, and organizational strategy. You will lead a team of 7-10 talented engineers, spearhead cross-functional efforts to resolve complex reliability and technology challenges, drive strong quality and operati

Job Details: Job Description: Embark with us on a journey of growth and transformation as we create exceptionally engineered technology and bring AI everywhere. As a valued team member, your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision. Life at Intel: https://jobs.intel.com/en/life-at-intel As a Yield Development Engineer, you will be at the forefront of advancing Intel's cutting-edge process technologies within our Logic Technology Development (LTD) organization. This pivotal role involves identifying root cause yield limiters and driving solutions that enhance manufacturability and yield across technology nodes. You will work within a dynamic, fast-paced environment to ensure the successful introduction of new products, process improvements, and robust methodologies to meet manufacturing goals. Your expertise will directly contribute to Intel's ability to deliver world-class semiconductor solutions and advance the future of computing. About Intel Foundry At Intel, the Foundry Technology Development (TD) unit is the driving force behind Moore's Law, enabling us to create groundbreaking technology that enriches lives globally. With over 15,000 dedicated employees, Foundry TD spearheads innovative research, develops next-generation processes and packaging technologies, and manages high-volume manufacturing in state-of-the-art facilities. Within Intel Foundry TD, our Logic Technology Development (LTD) organization is at the forefront of creating and refining each process technology node, paving the way for tomorrow's computing solutions. Your responsibilities as a Product Yield Development Eng

Job Details: Job Description: Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans Intel's research divisions and partnerships with leading academic institutions worldwide. We are seeking an exceptional Quantum Interposer Design Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for physical design and integration of advanced packaging interposers within a multidisciplinary team. You'll play a crucial role in advancing Intel's silicon quantum dot technology while contributing to the development of scalable quantum systems that will revolutionize computing. Key Responsibilities - Physical design and integration of interposers used within advanced packaging for quantum computing - Work closely with stakeholders to meet design requirements - e.g., receive feedback from silicon testchip, signal integrity (SI), power integrity (PI), thermal simulation, and system integration engineers - Design validation and verification; including DRC and LVS - Deliver and disseminate design milestones to stakeholders - Communicate designs in presentations and relevant documentation - Stay current with the latest developments in packaging technology and design techniques by attending conferences and reading papers As

We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Omnicare is a leading provider of pharmacy services to long-term care facilities nationwide, supporting skilled nursing facilities, assisted living communities, and other institutional care settings. Following the sale of Omnicare by CVS Health, this role will support Omnicare and its continued operations as an independent, standalone organization. Candidates should be aware that this role will not remain within CVS Health following the transaction. The individual hired into this role will be employed by Omnicare and will contribute to shaping the future of our organization during this exciting period of growth and transformation. Position Summary: Looking for a career that rewards you? As a Back-End Pharmacy Technician with Omnicare, you will not only find rewarding work in your community, but a team focused on providing a supportive and innovative team environment for all members. Day In The Life: As an Back-End Pharmacy Technician, you will work to ensure all medication needs and regulatory standards are met for our patients. You will work in various workstations allowing you to grow your skillsets further. Our back-end team focuses on order fulfillment in our closed-door pharmacy setting, including packaging and dispensing of medication, reviewing delivery orders and bins for accuracy, and coordinating stock rotations. Additional tasks and responsibilities incl

Principal/Staff, APTD - Advanced Packaging Wafer Level Technology Process Engineer — Fab 10A, Singapore. Apply via Workday.

Engineer, APTD CEM - Advanced Packaging Die Level Technology Engineering — Fab 10A, Singapore. Apply via Workday.

Engineer, APTD CEM – Advanced Packaging Wafer Level Technology Engineering — Fab 10A, Singapore. Apply via Workday.

Principal/Staff Engineer Engineer, APTD CEM - Advanced Packaging Die Level Technology Engineering — Fab 10A, Singapore. Apply via Workday.

Principal/Staff/Senior Engineer, APTD CEM - Advanced Packaging Wafer Level Technology Engineering — Fab 10A, Singapore. Apply via Workday.