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Secure Every Identity, from AI to Human Identity is the key to unlocking the potential of AI. Okta secures AI by building the trusted, neutral infrastructure that enables organizations to safely embrace this new era. This work requires a relentless drive to solve complex challenges with real-world stakes. We are looking for builders and owners who operate with speed and urgency and execute with excellence. This is an opportunity to do career-defining work. We're all in on this mission. If you are too, let's talk. The Technology, Data and Intelligence Team Message Okta’s Technology, Data and Intelligence (TDI) team delivers the systems, tools, and services that power internal operations across the company. From core infrastructure to enterprise platforms, we partner across functions to drive scale, reliability, and innovation through technology. The Senior Site Reliability Engineer Opportunity Reporting to the Manager, Site Reliability Engineering , this role will help build, improve, and maintain our cloud platform services by designing and implementing complex cloud-based engineering enablement systems. With a strong focus on automation, testing, and operational excellence, you will deliver foundational infrastructure capabilities that enable corporate engineering teams to operate securely, reliably, and at scale. What you'll be doing Secure Cloud Infrastructure & Pipelines: Design, build, and modernize scalable cloud environments and development tools while strictly enforcing security policies and standards for regulated environments. Cross-Functional Collaboration & Advocacy: Partner with software engineering teams to champion DevOps and SRE best practices, deliver excellent internal customer service, and actively contribute to Agile workflows (e.g., demos, architecture sessions). Technical Documentation & Operations: Create and maintain comprehensive technical documentation, including network diagrams, runbooks, and disaster recovery procedures to en

Secure Every Identity, from AI to Human Identity is the key to unlocking the potential of AI. Okta secures AI by building the trusted, neutral infrastructure that enables organizations to safely embrace this new era. This work requires a relentless drive to solve complex challenges with real-world stakes. We are looking for builders and owners who operate with speed and urgency and execute with excellence. This is an opportunity to do career-defining work. We're all in on this mission. If you are too, let's talk. The Federal SRE Team We are looking for an experienced Staff Site Reliability Engineer to join Okta's Federal SRE team for the Emerging Products Group (EPG). Our mission is to build highly reliable, scalable, and secure cloud services that our customers can trust. We embrace an automation-first mindset and continuously invest in platform engineering, observability, and operational excellence to enable our engineering teams to move quickly and safely. The Staff SRE, Classified Opportunity This role is ideal for an engineer who enjoys solving complex technical challenges at scale, building automation, and improving the reliability of production systems. You will serve as a technical leader within the EPG SRE organization, partnering closely with software engineers, architects, and product teams to design, build, and operate world-class cloud services. The ideal candidate exemplifies the philosophy of "if you have to do it more than once, automate it" and possesses a strong passion for continuous improvement, operational excellence, and software engineering. Security Clearance: Active U.S. TS/SCI clearance with Full Scope Poly Compliance Expertise: Proven experience navigating Federal and DoD compliance frameworks, specifically FedRAMP and Impact Level 6 (IL6) What you’ll be doing: Reliability & Operations Design, build, and operate large-scale cloud infrastructure and production services. Participate in an on-call rotation supporting hi

Secure Every Identity, from AI to Human Identity is the key to unlocking the potential of AI. Okta secures AI by building the trusted, neutral infrastructure that enables organizations to safely embrace this new era. This work requires a relentless drive to solve complex challenges with real-world stakes. We are looking for builders and owners who operate with speed and urgency and execute with excellence. This is an opportunity to do career-defining work. We're all in on this mission. If you are too, let's talk. Get to know Okta Okta is The World’s Identity Company. We free everyone to safely use any technology—anywhere, on any device or app. Our Workforce and Customer Identity Clouds enable secure yet flexible access, authentication, and automation that transforms how people move through the digital world, putting Identity at the heart of business security and growth. At Okta, we celebrate a variety of perspectives and experiences. We are not looking for someone who checks every single box, we’re looking for lifelong learners and people who can make us better with their unique experiences. Join our team! We’re building a world where Identity belongs to you. The Engineering Opportunity We are looking for an experienced Staff Site Reliability Engineer to join Okta's Emerging Products Group (EPG). Our mission is to build highly reliable, scalable, and secure cloud services that our customers can trust. We embrace an automation-first mindset and continuously invest in platform engineering, observability, and operational excellence to enable our engineering teams to move quickly and safely. This role is ideal for an engineer who enjoys solving complex technical challenges at scale, building automation, and improving the reliability of production systems. You will serve as a technical leader within the EPG SRE organization, partnering closely with software engineers, architects, and product teams to design, build, and operate world-class cloud s

Secure Every Identity, from AI to Human Identity is the key to unlocking the potential of AI. Okta secures AI by building the trusted, neutral infrastructure that enables organizations to safely embrace this new era. This work requires a relentless drive to solve complex challenges with real-world stakes. We are looking for builders and owners who operate with speed and urgency and execute with excellence. This is an opportunity to do career-defining work. We're all in on this mission. If you are too, let's talk. Get to know Okta Okta is The World’s Identity Company. We free everyone to safely use any technology—anywhere, on any device or app. Our Workforce and Customer Identity Clouds enable secure yet flexible access, authentication, and automation that transforms how people move through the digital world, putting Identity at the heart of business security and growth. At Okta, we celebrate a variety of perspectives and experiences. We are not looking for someone who checks every single box, we’re looking for lifelong learners and people who can make us better with their unique experiences. Join our team! We’re building a world where Identity belongs to you. The Engineering Opportunity We are looking for an experienced Staff Site Reliability Engineer to join Okta's Emerging Products Group (EPG). Our mission is to build highly reliable, scalable, and secure cloud services that our customers can trust. We embrace an automation-first mindset and continuously invest in platform engineering, observability, and operational excellence to enable our engineering teams to move quickly and safely. This role is ideal for an engineer who enjoys solving complex technical challenges at scale, building automation, and improving the reliability of production systems. You will serve as a technical leader within the EPG SRE organization, partnering closely with software engineers, architects, and product teams to design, build, and operate world-class cloud s

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. Role summary We are seeking a Networking Operating System Firmware Engineer to help bootstrap and scale the switching layer of our AI supercomputers. In this role, you will build and maintain custom NOS images from scratch, using open source components from SONiC, SAI, FRR, and related networking stacks while working across the Linux kernel, switch ASIC SAI/SDKs, platform drivers, control-plane services, and orchestration layers. This is a software engineering role that requires a deep understanding of networking, NOS internals, switch hardware, and production systems. You will design, implement, test, and debug production NOS software across platform drivers, routing and control-plane state, ASIC programming, observability, and fleet integration. The engineer in this role should be able to work through ambiguous, open-ended technical problems and drive feature development across software, hardware, and vendor boundaries. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will Design, develop, and maintain custom NOS images for large-scale AI fabrics, using open source components from SONiC, FRR, and related networking stacks. Integrate, build and configure Linux kernel components, device drivers, switch ASIC SDKs, and SAI layers. Bring up new switch platforms, including thermal and fan control, power monitoring, transceiver management, watchdogs, OSFP CMIS, L

About the Team OpenAI’s Infrastructure organization builds and evaluates the systems that power advanced AI workloads. We work closely with hardware, modeling, and architecture teams to ensure that new platforms deliver real-world performance aligned with workload needs. Our team focuses on understanding workload behavior across evolving hardware platforms—bridging the gap between theoretical capability and observed system performance. About the Role We are seeking a Workload Porting & Performance Engineer to evaluate new hardware platforms by porting benchmarks and real-world workloads, analyzing performance, and identifying system bottlenecks. In this role, you will bring up workloads on new systems, characterize performance behavior, and adapt workloads to better utilize hardware capabilities. You will play a critical role in validating new platforms and ensuring that performance aligns with expectations across compute, memory, and networking subsystems. This role requires strong hands-on experience with performance analysis, workload optimization, and system-level debugging across hardware and software boundaries. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance. Key Responsibilities Port and enable benchmarks and real-world workloads on new hardware platforms. Evaluate system performance across compute, memory, storage, and networking subsystems. Identify and analyze performance bottlenecks and inefficiencies. Adapt and optimize workloads to better utilize hardware capabilities. Develop and run performance experiments and profiling workflows. Compare expected vs. observed performance and provide feedback to: hardware architecture teams performance modeling teams system and software engineers. Debug issues across the stack, including software, runtime, and hardware interactions. Provide actionable insights to guide platform readiness and deployment decisions. Qualifications E

Leidos has an exciting opportunity for a Sr. DevOps Engineer in our Intel Security Sector's Analysis Solutions Business Area . Our talented team is at the forefront in Security Engineering, Computer Network Operations (CNO), Mission Software, Analytical Methods and Modeling, Signals Intelligence (SIGINT), and Cryptographic Key Management. At Leidos , we offer competitive benefits , including Paid Time Off, 11 paid Holidays, 401K with a 6% company match and immediate vesting, Flexible Schedules, Discounted Stock Purchase Plans, Technical Upskilling, Education and Training Support, Parental Paid Leave, and much more. Join us and make a difference in National Security! Job Summary This DevOps Engineer role provides mission critical system support to our customer. You will closely work with the Development team as well as other technology stakeholders to maintain, develop and support IC enterprise products – legacy and new products – in an Agile SAFe environment. The role will also work collaboratively with software engineering to deploy and operate systems. Additionally, this role will help automate and streamline operations and processes; as well as build and maintain tools for deployment, monitoring and operations, and troubleshoot and resolve issues in dev, test, and production environments. Primary Responsibilities: Supports software deployments, cloud infrastructure baselines, and operational availability of production systems. Managing, building, configuring, administering, operating and maintaining all components that comprise the DevOps environment. Defining enterprise Continuous Integration/Continuous Deployment processes and best practices Codifying DevOps best practices across the enterprise Developing and maintaining scripts to automate tool deployment to an AWS cloud environment and other tasks. Scripting and

Job Details: Job Description: Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone. Want to learn more? Visit our YouTube Channel or the link below. Life at Intel The Role and Impact As a SoC Power Thermal Performance Validation and Optimization Engineer, you will play an essential role in ensuring Intel's products achieve optimal power, thermal, and performance benchmarks at the system-on-chip (SoC) level. In this position, you will develop and execute validation methodologies, optimize hardware/software solutions, and perform SoC-level debugging to address power, thermal, and performance challenges. Your contribution will directly impact Intel's ability to deliver competitive, high-performing products to market. Business Group This role is part of Intel's Data Center Group (DCG), which focuses on designing innovative solutions to power the next generation of computing platforms for data centers. As a member of the PTP PreSi Correlation Solution team, you will contribute to shaping the development and validation processes for cutting-edge technologies, ensuring Intel meets and exceeds industry standards for performance and efficiency. Key Responsibilities: Develop and execute SoC-level power, thermal, and performance validation and

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE We are seeking a highly technical Lead Release Engineer with a strong engineering foundation to lead the end-to-end release lifecycle of our storage products. You will serve as the bridge between Development, QA, and Product Management — ensuring that complex storage stacks are delivered with high quality and predictable cadences. Unlike traditional project-based release management, this role demands deep hands-on expertise across CI/CD orchestration, codeline management, system-level triaging, fleet operations, and the engineering rigor required for data-critical products. You will own the health of our release pipelines, lead triage war rooms, drive automation initiatives, and participate in on-call rotations to keep CI and test-orchestration infrastructure running reliably. You will also build developer-facing tooling, manage HW test fleet operations, and maintain high-quality integration workflows across our code lines. WHAT YOU'LL DO Release Orchestration: Own the end-to-end release process for storage software and firmware, from development to GA (General Availability). CI/CD Leadership: Design and build optimized pipelines and tools to scale code management and merge operations. Work closely with systems such as Jenkins, test frameworks, Premerge, Orchestrator, and related developer productivity tooling to keep the codeline healthy and actionable. Technical Triaging: Act as the primary technical poin

Who We Are Addepar is a global data and AI platform empowering investment professionals to turn complex financial information into actionable intelligence. Addepar unifies portfolio, market and client data in a total portfolio view and delivers AI-powered insights within investment and client workflows. More than 1,400 firms in nearly 60 countries use Addepar to manage and advise on nearly $9 trillion in assets. Its open platform integrates with nearly 650 software, data and consulting partners to power end-to-end investment operations across firms of all sizes and complexity. Addepar supports clients worldwide with offices in New York City, Salt Lake City, London, Edinburgh, Pune, Dubai, Geneva, Singapore and São Paulo. The Role As a Field Engineer, Team Lead you will serve as a player-coach — guiding a team of field engineers while personally executing the most complex, mission-critical technical work yourself. Operating at the intersection of engineering and client success, you are both the technical anchor for your team and Addepar's technical vanguard in the field, translating complex business requirements into production-grade integrations, automations, and data solutions. You will be the technical expert across Addepar's full solution suite — from API integrations and automation frameworks to advanced data platforms (including our white-labeled Databricks offering, ADX) and AI-driven tooling. At the same time, you will develop your people-management skills: providing daily guidance, coordinating work allocation, and turning the vision set by leadership into reality while keeping your team aligned to our core processes. This role combines a forward-deployed delivery model with hands-on technical depth and functional leadership of a high-performing engineering team. Applicants must have legal authorization to work in the country where this role is based on the first day of employment. Visa sponsorship is not available for this position. Important Note: Th

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team and lead the front-end RTL physical implementation team. Drive CAD flows on multiple process technologies while working closely with core micro-architects to refine CPU core configurations and optimizing PPA. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, RTL and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An expert in physical design practices used to optimize PPA Experienced in high-performance physical design. Proficient in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation and power analysis. Skilled in synthesis, place and route tools including flows and physical design methodology. Background in CPU micro-architecture. What We Need Own front‑end physical implementation and PPA definition for a high‑performance RISC‑V CPU and CPU subsystem Work closely with microarchitects and RTL designers to “make the IP better” by optimizing frequency, power, and area

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Sr. Staff Design Verification Engineer to lead end-to-end verification efforts for our advanced CPU and AI compute platforms. This role is ideal for seasoned engineers with deep expertise in CPU verification who excel at driving complex test plans to closure, mentoring teams, and leveraging modern AI tools to accelerate innovation. This role is hybrid, based out of Boston, Toronto, Ottawa or Santa Clara. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Proven track record leading end-to-end CPU verification across processor cores, caches, interconnects, interrupts, MMU/IOMMU, and cache coherency protocols, with multi-chip and emulation experience a plus. Expert in creating comprehensive test plans and building simulation testbenches using SV-UVM, C/DPI, and Cocotb. Skilled in managing high-volume regression execution, complex failure triage, and driving test plans and coverage metrics to closure. Experienced leader and mentor dedicated to guiding junior engineers and fostering verification best practices across teams. Proficient in leveraging modern AI tools like Copilot, Cursor, Claude, Gemini, and ChatGPT to optimize ver

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Join Tenstorrent as a Staff Reliability Engineer and help define the reliability strategy behind the next generation of AI computing systems. In this highly visible technical leadership role, you'll drive reliability from architecture through production, partnering across hardware, software, and manufacturing teams to build high-performance AI platforms that set the standard for uptime, durability, and quality. If you're passionate about solving complex engineering challenges and influencing products at scale, you'll have the opportunity to shape technology powering the future of AI. This role is hybrid, based out of Toronto, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You've spent 8+ years in reliability engineering, ideally in high-performance computing, AI hardware, or data center systems. You're comfortable with the statistical side of the job, HALT, HASS, ALT, MTBF, Weibull analysis, and FMEA are all familiar territory. You can work through a technical problem in a thermal lab and then explain the risks and trade-offs clearly to leadership. You're good at bringing people together, mechanical, electrical, thermal, softw

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Curious about how cutting-edge hardware actually comes to life? We're looking for someone who’s excited to dive into the core of next-gen systems and help make them real. In this role, you’ll validate high-speed interfaces, solve complex system-level puzzles, and collaborate across teams to shape the future of AI/ML computing. If firmware, hardware, and hands-on debugging sound like your kind of fun — let’s chat! This role is hybrid and based in Vancouver, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You love bringing hardware to life and enjoy the thrill of solving tricky problems across the hardware–firmware boundary. You’re hands-on in the lab and comfortable with tools like oscilloscopes, protocol analyzers, and JTAG — digging deep doesn’t scare you. You’re comfortable jumping into unfamiliar problems and figuring things out — whether it’s in the lab or in firmware. You’re curious, collaborative, and excited to work on technology that pushes the boundaries of performance. What We Need Someone to take the lead in validating our next-gen PCIe interfaces — from controller to PHY, and everything in between. A strong co

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Design Verification Engineer to contribute to the unit-level verification of our RISC-V CPU front end—including instruction fetch, branch prediction, and surrounding fetch control structures. As a key individual contributor within our front-end DV team, you will focus on building testbenches, generating stimulus, and developing checkers for complex microarchitectural scenarios. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Front-End Experience: Solid background verifying CPU front-end blocks—such as instruction fetch, branch predictors (BTB, TAGE, RAS), instruction caches/TLBs, or decode—using SystemVerilog, UVM, and C++. Unit-Level Focus: Hands-on experience building clean, controllable unit testbench environments with precise stimulus and checking. Reusable Design: Pragmatic approach to building transactors, predictors, and scoreboards that can be reused across verification levels. Collaborative Problem Solver: Comfortable working alongside RTL designers to trace and fix misspeculation, redirect, and edge-case fetch bugs. What We Need Unit-Level Verifica