Sr Staff Quantitative Product Researcher Jobs

Photolithography Staff/Sr Engineer, Process Development, Advanced NAND — Fab 10N/X, Singapore. Apply via Workday.

QE PCT STAFF ENGINEER/SR ENGINEER, OMT_TY — Taoyuan - Fab 11, Taiwan. Apply via Workday.

Zscaler (NASDAQ: ZS) accelerates digital transformation so customers can be more agile, efficient, resilient, and secure. The Zscaler Zero Trust Exchange™️ platform protects thousands of customers from cyberattacks and data loss by securely connecting users, devices, and applications in any location. Distributed across 160+ public exchanges globally and thousands of private exchanges at the edge, the SASE-based Zero Trust Exchange is the world’s largest in-line cloud security platform. We believe the future of work is Human + AI and are building an AI-native enterprise where human potential is amplified by machine intelligence to solve the world’s hardest security challenges. Driven by deep customer obsession, we are committed to the mission, outcome, and to each other. We bring these commitments to life through three core behaviors: ownership and collaboration, trust through outcomes and impact, and a challenge culture with ongoing feedback. Ready to make an impact at the company pioneering security transformation in the AI era? Join us at Zscaler. Role We are looking for a Sr. Staff Integration Engineer (Security Platform and Data Pipelines) to join our team. This is a remote based in India role, reporting to the Director, Software Development Engineering in the Technical Implementation and Integration department. You will be responsible for connecting and onboarding diverse cybersecurity data sources, mapping and normalizing security data to power exposure and threat management use cases, and customizing workflows to deliver measurable outcomes. This role requires technical depth, comfort with complex datasets, and the ability to communicate with both technical and non-technical stakeholders. What you’ll do (Role Expectations) Quickly get up-to-speed on Zscaler’s SecOps platform, utilizing Python and APIs to configure, customize, and automate data transformations and workflows Partner with cybersecurity subject matter experts (SMEs) to onboard new data pipelines

Zscaler (NASDAQ: ZS) accelerates digital transformation so customers can be more agile, efficient, resilient, and secure. The Zscaler Zero Trust Exchange™️ platform protects thousands of customers from cyberattacks and data loss by securely connecting users, devices, and applications in any location. Distributed across 160+ public exchanges globally and thousands of private exchanges at the edge, the SASE-based Zero Trust Exchange is the world’s largest in-line cloud security platform. We believe the future of work is Human + AI and are building an AI-native enterprise where human potential is amplified by machine intelligence to solve the world’s hardest security challenges. Driven by deep customer obsession, we are committed to the mission, outcome, and to each other. We bring these commitments to life through three core behaviors: ownership and collaboration, trust through outcomes and impact, and a challenge culture with ongoing feedback. Ready to make an impact at the company pioneering security transformation in the AI era? Join us at Zscaler. Role We are looking for a Sr. Staff Network Engineer to join our team. This is a fully remote capacity in the Netherlands role, reporting to the Manager, Network Engineering in the Cloud Ops - Network Engineering department. This position involves a mix of infrastructure, project management, and network engineering responsibilities. You will join our global team as an integral member, taking ownership of the deployment, monitoring, and ongoing operation of our worldwide production infrastructure across diverse data center locations. We are seeking a high-trust collaborator with a background in large-scale enterprise or telecom networks who approaches challenges with a growth mindset and a commitment to achieving engineering excellence. This role requires active participation in our technical on-call rotations, which include support during weekends and holidays to ensure continuous service reliability. What you’ll d

Zscaler (NASDAQ: ZS) accelerates digital transformation so customers can be more agile, efficient, resilient, and secure. The Zscaler Zero Trust Exchange™️ platform protects thousands of customers from cyberattacks and data loss by securely connecting users, devices, and applications in any location. Distributed across 160+ public exchanges globally and thousands of private exchanges at the edge, the SASE-based Zero Trust Exchange is the world’s largest in-line cloud security platform. We believe the future of work is Human + AI and are building an AI-native enterprise where human potential is amplified by machine intelligence to solve the world’s hardest security challenges. Driven by deep customer obsession, we are committed to the mission, outcome, and to each other. We bring these commitments to life through three core behaviors: ownership and collaboration, trust through outcomes and impact, and a challenge culture with ongoing feedback. Ready to make an impact at the company pioneering security transformation in the AI era? Join us at Zscaler. Role We are looking for a Sr. Staff Software Development Engineer-AI Security to join our team. This is a Hybrid (based in San Jose, CA or Bellevue, WA with a 3 days in office requirement) role, reporting to the Director of Software Engineering in the Emerging Tech department. You will be responsible for designing and implementing core infrastructure components and distributed systems, serving as a foundational architect for our AI security solution. This high-impact role focuses on scaling security infrastructure to support hundreds of millions of users, collaborating with stakeholders across the development lifecycle to drive innovation and technical excellence. What you’ll do (Role Expectations) Architect, develop, and optimize a low-latency, high-throughput AI Security plane utilizing Rust, specifically leveraging its async/await model for highly efficient I/O and service-oriented architecture Build resi

Reddit is a community of communities. It’s built on shared interests, passion, and trust, and is home to the most open and authentic conversations on the internet. Every day, Reddit users submit, vote, and comment on the topics they care most about. With 100,000+ active communities and approximately 130 million daily active unique visitors, Reddit is one of the internet’s largest sources of information. For more information, visit www.redditinc.com . Reddit’s Ads Data Science team is looking for a Senior Staff Data Scientist to lead the scientific strategy behind Reddit’s ads measurement and signal systems. This role sits at the center of how Reddit proves advertiser value, improves signal quality, builds privacy-aware measurement systems, and connects ads exposure to real advertiser outcomes. As a Senior Staff Data Scientist for Ads Measurement, you will be the principal architect of our technical vision and the driving force behind the next generation of our measurement ecosystem. In a landscape rapidly shifting due to privacy regulations, browser changes, and evolving platform dynamics, you will spearhead innovation across experimental design (incrementality/lift), identity, signals, and privacy-safe 1P/3P measurement. This is a high-visibility, high-impact role requiring a rare blend of deep experimentation & causal inference expertise, strategic foresight, and the ability to influence cross-functional executives and industry standards. You will not just adapt to the changing ad-tech environment, you will redefine how we measure value. Responsibilities Technical Vision & Strategy: Define the long-term data science vision & strategy across ads measurement, signal quality, identity, attribution, and privacy. Establish how Reddit should evaluate advertiser value, measurement quality, and signal utility across first-party and third-party products. Set the Cross-Pillar Measurement Science Strategy: Define the long-term data science strategy across a

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a highly technical Senior Staff/Principal Engineer to lead the porting and enablement of critical AI workloads. You will be a primary driver in migrating compute workloads to RISC-V architectures, ensuring our hardware is optimized for real-world application performance. The ideal candidate has a strong background in DevOps, workload porting, or application enablement . While this is an individual contributor role at its core, you will have the opportunity to grow and lead a small, specialized team over time as our workload migration efforts scale. This role is remote, based in the United States or Australia. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A Technical Catalyst: You thrive on the challenge of driving AI hardware porting to RISC-V and making complex software stacks run efficiently on new hardware. Systems Expert: You possess deep knowledge of system software, compilers, or low-level OS internals. You are an expert in ARM or x86 environments and are ready to apply those skills to the RISC-V frontier. A Project Driver: You have the technical authority to lead the implementation of a compute migration to RISC-V through

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team and lead the front-end RTL physical implementation team. Drive CAD flows on multiple process technologies while working closely with core micro-architects to refine CPU core configurations and optimizing PPA. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, RTL and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An expert in physical design practices used to optimize PPA Experienced in high-performance physical design. Proficient in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation and power analysis. Skilled in synthesis, place and route tools including flows and physical design methodology. Background in CPU micro-architecture. What We Need Own front‑end physical implementation and PPA definition for a high‑performance RISC‑V CPU and CPU subsystem Work closely with microarchitects and RTL designers to “make the IP better” by optimizing frequency, power, and area

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Sr. Staff Design Verification Engineer to lead end-to-end verification efforts for our advanced CPU and AI compute platforms. This role is ideal for seasoned engineers with deep expertise in CPU verification who excel at driving complex test plans to closure, mentoring teams, and leveraging modern AI tools to accelerate innovation. This role is hybrid, based out of Boston, Toronto, Ottawa or Santa Clara. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Proven track record leading end-to-end CPU verification across processor cores, caches, interconnects, interrupts, MMU/IOMMU, and cache coherency protocols, with multi-chip and emulation experience a plus. Expert in creating comprehensive test plans and building simulation testbenches using SV-UVM, C/DPI, and Cocotb. Skilled in managing high-volume regression execution, complex failure triage, and driving test plans and coverage metrics to closure. Experienced leader and mentor dedicated to guiding junior engineers and fostering verification best practices across teams. Proficient in leveraging modern AI tools like Copilot, Cursor, Claude, Gemini, and ChatGPT to optimize ver

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Curious about how cutting-edge hardware actually comes to life? We're looking for someone who’s excited to dive into the core of next-gen systems and help make them real. In this role, you’ll validate high-speed interfaces, solve complex system-level puzzles, and collaborate across teams to shape the future of AI/ML computing. If firmware, hardware, and hands-on debugging sound like your kind of fun — let’s chat! This role is hybrid and based in Vancouver, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You love bringing hardware to life and enjoy the thrill of solving tricky problems across the hardware–firmware boundary. You’re hands-on in the lab and comfortable with tools like oscilloscopes, protocol analyzers, and JTAG — digging deep doesn’t scare you. You’re comfortable jumping into unfamiliar problems and figuring things out — whether it’s in the lab or in firmware. You’re curious, collaborative, and excited to work on technology that pushes the boundaries of performance. What We Need Someone to take the lead in validating our next-gen PCIe interfaces — from controller to PHY, and everything in between. A strong co

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Design Verification Engineer to contribute to the unit-level verification of our RISC-V CPU front end—including instruction fetch, branch prediction, and surrounding fetch control structures. As a key individual contributor within our front-end DV team, you will focus on building testbenches, generating stimulus, and developing checkers for complex microarchitectural scenarios. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Front-End Experience: Solid background verifying CPU front-end blocks—such as instruction fetch, branch predictors (BTB, TAGE, RAS), instruction caches/TLBs, or decode—using SystemVerilog, UVM, and C++. Unit-Level Focus: Hands-on experience building clean, controllable unit testbench environments with precise stimulus and checking. Reusable Design: Pragmatic approach to building transactors, predictors, and scoreboards that can be reused across verification levels. Collaborative Problem Solver: Comfortable working alongside RTL designers to trace and fix misspeculation, redirect, and edge-case fetch bugs. What We Need Unit-Level Verifica

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is building the next generation of AI and RISC-V compute. As a Sr. Staff NPI Global Supply Planner, you will own end-to-end demand, materials, and production planning across our AI hardware product lines, including Blackhole, Galaxy, and future platforms. You will translate engineering release schedules, BOM structures, and production forecasts into executable supply and capacity plans with our contract manufacturers, while keeping planning data accurate and reliable across ERP and PLM systems. This role is hybrid, based out of Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A strategic, detail-oriented supply chain planner who can turn engineering and program ambiguity into clear, executable plans. Experienced in NPI planning within semiconductor, AI hardware, or high-tech manufacturing environments. Comfortable working across BOM structures, engineering change processes, ERP and PLM systems, and system-of-record data. A clear, collaborative communicator who can align engineering, operations, planning teams, and contract manufacturers. What We Need Lead end-to-end materials and production planning across NPI r

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we are building the next generation of AI and RISC-V compute. This role supports our CVP of Operations by turning priorities into execution, driving cross-functional programs forward, and making sure important work does not stall between teams. It is a high-trust role for someone who can bring structure to ambiguity, keep leaders aligned, and move quickly without creating noise. This role is hybrid, based out of Santa Clara,CA; Austin,TX; Boston,MA; or Toronto,ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are High-agency operator who moves seamlessly between executive-level priorities and day-to-day execution, owning end-to-end outcomes. Proven at driving complex cross-functional work across operations, finance, legal, recruiting, and business partners. Deep understanding of the semiconductor business, including development timelines, product portfolios, manufacturing, sales and operations planning, and financial investments. Clear, direct, and organized communicator who brings structure, follow-through, and sound judgment to fast-moving, ambiguous environments. Trusted partner to senior leadership, anticipating needs, press

Ready to do the most impactful work of your career? At Coinbase , we are uncompromising on our mission to increase economic freedom. The bar is high, the environment is intense, and we like it that way. This isn't a place for complacency, it’s a place to be pushed past your perceived limits. If you're ready to build the future of finance alongside people who refuse to settle for "good enough," you belong here. Coinbase is a remote-first, but not remote-only company. Expect to get together quarterly for intense in-person working sessions called “surges.” learn more about working at Coinbase . Team/ Role: Coinbase is building the future of institutional trading as part of the Everything Exchange, powering the systems that let the world's largest financial institutions trade across markets with speed, depth, and trust. As a Risk Architect on the Trading team, you'll design, build, and own the real-time risk engine at the heart of a unified trading platform: cross-asset user and portfolio risk evaluated in real time on the core trading system that serves our Retail, Prime, and wholesale brokerage customers. It's a rare chance to architect risk infrastructure from the ground up, with the ownership of a startup and the reach of Coinbase. What you’ll do: Own the architecture of the real-time, cross-asset risk and margin engine: user and portfolio modeling, multifactor and borrow risk, and cross-portfolio evaluation at scale. Design low-latency, high-throughput risk systems, keeping correctness and performance in step with a growing trading platform. Drive reliability and performance, owning SLOs, observability, and incident response for risk-critical systems. Set the technical bar through code, design reviews, and standards, and pay down the technical debt that matters most. Serve as the risk-architecture anchor for the team, mentoring engineers and reducing single-point-of-failure risk. Partner cross-functionally with Product, Trading, Financing/C

About Pinterest: Millions of people around the world come to our platform to find creative ideas, dream about new possibilities and plan for memories that will last a lifetime. At Pinterest, we’re on a mission to bring everyone the inspiration to create a life they love, and that starts with the people behind the product. Discover a career where you ignite innovation for millions, transform passion into growth opportunities, celebrate each other’s unique experiences and embrace the flexibility to do your best work. Creating a career you love? It’s Possible. At Pinterest, AI isn't just a feature, it's a powerful partner that augments our creativity and amplifies our impact, and we’re looking for candidates who are excited to be a part of that. To get a complete picture of your experience and abilities, we’ll explore your foundational skills and how you collaborate with AI. Through our interview process, what matters most is that you can always explain your approach, showing us not just what you know, but how you think. You can read more about our AI interview philosophy and how we use AI in our recruiting process here . Our Merchants organization focuses on onboarding and activation, catalog quality and health, merchant presence (including creator/UGC and trust signals), and ads upsell—helping merchants build healthy catalogs, reach the right audiences, and unlock clear paths to growth. In this role, you’ll lead high-impact engineering at the intersection of commerce platforms, catalog systems, and AI-native experiences. This includes applying ML, AI-assisted workflows, and GenAI where appropriate to improve metadata quality, merchant tooling, and operational efficiency. You’ll partner closely with Engineering Managers, Product Managers, Data Scientists, and other senior engineers to deliver systems with measurable business and user impact. What you’ll do: Own end-to-end technical delivery for cross-team initiatives—from problem framing and technical stra