System Ip Design Engineer Jobs

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a hands-on RTL Design Engineer to own the microarchitecture and RTL implementation of the Power Management Subsystem/Interrupt Controllers/AXI Interconnect/Cache Controller . You’ll collaborate with cross-functional teams—architecture, firmware, software, DV, and PD—to define, design, and optimize power management solutions for next-generation RISC-V/ARM-based SoCs. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels. During the interview process, you will beevaluated and offered a level that aligns with your experience, which may differ from the one in this posting. Who You Are 5–10 years of experience in ASIC/SOC/IP design, with hands-on experience in microarchitecture and RTL development Skilled in Verilog/SystemVerilog and comfortable working across design, debug, and analysis Design and develop microarchitectures for a set of highly configurable IPs Microarchitecture and RTL coding ensuring optimal performance, power, area Work with verification teams on assertions, test plans, debug, coverage, etc. Deep understanding of power management concepts—clocking, reset, DVFS, and low-power modes Familiar with RISC-V or ARM-based SoCs and standard bus protocols (AXI, AHB, APB, CHI) Awareness of functional safety (ISO 26262) practices in hardware design What We Need Abil

Job Details: Job Description: The Role and Impact As a GPU Platform Hardware Design Engineer, you will play a pivotal role in designing and developing high-quality GPU hardware platforms that drive innovation in high-performance computing, graphics, and visualization technologies. You will lead the design process from initial feasibility studies through board layout, tapeout, and platform power-on, ensuring robust functionality and compatibility with industry standards. Your expertise in platform-level requirements, electrical engineering applications, and system bring-up will directly contribute to delivering cutting-edge GPU systems that accelerate Intel's leadership in computing. Business group The Data Center Group (DCG) is dedicated to advancing Intel's role in powering the digital world with leading-edge technologies. Focused on delivering innovative solutions for data center and cloud environments, DCG supports high-performance computing and graphics to enable capabilities such as AI, machine learning, and advanced visualizations. As part of the GPU IP Engineering team within DCG, you'll contribute to developing GPU systems that meet the evolving demands of the industry while supporting Intel's broader mission to create world-changing technology. Key Responsibilities - Design, develop, and evaluate electronic components, PCBs, and integrated circuits for GPU hardware platforms. - Translate platform-level requirements into detailed specifications and ensure adherence throughout the design process. - Define component placement and trace routing rules to optimize board layouts for performance, power, and signal integrity. - Conduct feasibility studies, board layout, tapeout, and platform power-on activities. - Perform functionality tests and utilize tools to verify platform configurations and compatibility. - Research, develop, and validate firmware, hardwa

About the Team: OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role OpenAI is developing custom silicon to power the next generation of frontier AI models. We’re looking for experienced Design Verification (DV) Engineers to ensure functional correctness and robust design for our cutting-edge ML accelerators. You will play a key role in verifying complex hardware systems—ranging from individual IP blocks to subsystems and full SoC—working closely with architecture, RTL, software, and systems teams to deliver reliable silicon at scale. In this role you will: Own the verification of one or more of: custom IP blocks, subsystems (compute, interconnect, memory, etc.), or full-chip SoC-level functionality. Define verification plans based on architecture and microarchitecture specs. Develop constrained-random, directed, and system-level testbenches using SystemVerilog/UVM or equivalent methodologies. Build and maintain stimulus generators, checkers, monitors, and scoreboards to ensure high coverage and correctness. Drive bug triage, root cause analysis, and work closely with design teams on resolution. Contribute to regression infrastructure, coverage analysis, and closure for both block- and top-level environments. You might thrive in this role if you have: BS/MS in EE/CE/CS or equivalent with 3+ years of experience in hardware verification. Proven success verifying complex IP or SoC designs in industry-standard flows Proficient in SystemVerilog, UVM, and common simulation and debug tools (e.g., VCS, Questa, Verdi). Strong knowledge

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Our Tensix team is building custom AI compute cores, RISC-V CPUs, and chiplet-based architectures for datacenter, edge, and automotive AI. Design Verification Engineers on this team validate compute IP and subsystems and build scalable DV infrastructure to keep verification fast, automated, and production-grade. This role is hybrid, based out of Toronto, ON, Austin, TX or Belgrade, Serbia. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in modern verification methodologies with strong SystemVerilog skills and exposure to structured testbench development. Comfortable working from block-level to system-level verification and reasoning about microarchitecture behavior from specs and waveforms. Proficient in Linux environments with Python, or Bash scripting for automate builds, parse logs, manage CI pipelines. Skilled in coverage-driven verification and confident debugging across RTL, testbench, and workload scenarios. Motivated by AI hardware and eager to learn verification strategies for new architectures and domains. What We Need Contribute to verification of Tensix IP and subsystems from early planning through tape-out, owning cov

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are looking for a highly experienced RTL engineer to own critical on- and off-chip interconnect components for our custom AI accelerator platform. You will drive the microarchitecture and RTL implementation of scalable on-chip communication fabrics connecting high-bandwidth compute, memory, and I/O subsystems as well as purpose-built off-chip interfaces and protocols needed to enable custom computing at scale. This is a senior, hands-on engineering role with broad technical ownership. You will drive design from requirements through the full silicon lifecycle, from architecture definition and performance analysis through RTL implementation, verification closure, physical design convergence, bring-up, and production readiness. You will plan and oversee the work of junior engineers and help drive and develop productive engineering relationships with external partners and help manage partner execution. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Own the microarchitecture, RTL design, and delivery of major SoC interconnect components, including network-on-chip fabrics, switches, routers, bridges, protocol adapters, arbiters, and traffic-management logic as well as off-chip protocol bridges and interfaces. Drive third party engagements to develop novel networking and interface protocols and silicon IP while ensuring high quality and de

GitLab is the intelligent orchestration platform for DevSecOps. GitLab enables organizations to increase developer productivity, improve operational efficiency, reduce security and compliance risk, and accelerate digital transformation. More than 50 million registered users and more than 50% of the Fortune 100* trust GitLab to ship better, more secure software faster. The same principles built into our products are reflected in how our team works: we embrace AI as a core productivity multiplier, with all team members expected to incorporate AI into their daily workflows to drive efficiency, innovation, and impact. GitLab is where careers accelerate, innovation flourishes, and every voice is valued. Our high-performance culture is driven by our values and continuous knowledge exchange, enabling our team members to reach their full potential while collaborating with industry leaders to solve complex problems. Co-create the future with us as we build technology that transforms how the world develops software. * Fortune 500® is a registered trademark of Fortune Media IP Limited, used under license. Claim based on GitLab data. Fortune 100 refers to the top 20% ranked companies in the 2025 Fortune 500 list, published in June 2025. Fortune and Fortune Media IP Limited are not affiliated with, and do not endorse products or services of GitLab. Senior Backend Engineer - Database Change Management An overview of this role As a Senior Backend Engineer, Database Upgrades, you'll help replace GitLab's sequential database migration system with a dependency graph model that makes upgrades faster and safer for GitLab.com and self-managed customers. You'll lead the design and delivery of a migration validation and test framework, including versioned fixture data across about 1,000 tables, a continuous integration (CI)-integrated test runner, and required correctness checks. You'll also serve as the senior technical anchor for our India-based engineering group, using clear writt

GitLab is the intelligent orchestration platform for DevSecOps. GitLab enables organizations to increase developer productivity, improve operational efficiency, reduce security and compliance risk, and accelerate digital transformation. More than 50 million registered users and more than 50% of the Fortune 100* trust GitLab to ship better, more secure software faster. The same principles built into our products are reflected in how our team works: we embrace AI as a core productivity multiplier, with all team members expected to incorporate AI into their daily workflows to drive efficiency, innovation, and impact. GitLab is where careers accelerate, innovation flourishes, and every voice is valued. Our high-performance culture is driven by our values and continuous knowledge exchange, enabling our team members to reach their full potential while collaborating with industry leaders to solve complex problems. Co-create the future with us as we build technology that transforms how the world develops software. * Fortune 500® is a registered trademark of Fortune Media IP Limited, used under license. Claim based on GitLab data. Fortune 100 refers to the top 20% ranked companies in the 2025 Fortune 500 list, published in June 2025. Fortune and Fortune Media IP Limited are not affiliated with, and do not endorse products or services of GitLab. Senior Backend Engineer - Platform Insights An overview of this role As a Senior Backend Engineer in Platform Insights, you'll build and evolve the core backend systems that power GitLab's data platform. In this role, you'll focus primarily on Go-based development for the Data Insights Platform and Siphon, with an emphasis on core system design, production readiness, and deployment across GitLab environments. You'll own high-throughput, multi-component backend systems and help shape architecture, reliability, deployment, and operational maturity across GitLab's SaaS, Dedicated, and Self-Managed environments. What you'll do Design

GitLab is the intelligent orchestration platform for DevSecOps. GitLab enables organizations to increase developer productivity, improve operational efficiency, reduce security and compliance risk, and accelerate digital transformation. More than 50 million registered users and more than 50% of the Fortune 100* trust GitLab to ship better, more secure software faster. The same principles built into our products are reflected in how our team works: we embrace AI as a core productivity multiplier, with all team members expected to incorporate AI into their daily workflows to drive efficiency, innovation, and impact. GitLab is where careers accelerate, innovation flourishes, and every voice is valued. Our high-performance culture is driven by our values and continuous knowledge exchange, enabling our team members to reach their full potential while collaborating with industry leaders to solve complex problems. Co-create the future with us as we build technology that transforms how the world develops software. * Fortune 500® is a registered trademark of Fortune Media IP Limited, used under license. Claim based on GitLab data. Fortune 100 refers to the top 20% ranked companies in the 2025 Fortune 500 list, published in June 2025. Fortune and Fortune Media IP Limited are not affiliated with, and do not endorse products or services of GitLab. An overview of this role As a Backend Engineer on the Chat Engine team, you'll build the engine behind GitLab Duo Chat, the conversational AI experience for GitLab. You'll work primarily in Python to build and maintain our agentic runtime: the Flow Registry, LangGraph flows, and the Duo Workflow Service. You'll also work in the GitLab Rails monolith, where Chat connects with the product. You'll own scoped parts of the system, ship small features and improvements with minimal guidance, and collaborate with the team on larger projects. You'll work alongside senior and staff engineers who will partner with you on design and support

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. About the Role We’re looking for a Sales Solution Engineer in Vietnam to work with enterprise customers, system integrators, MSPs, and channel partners. You’ll design and present end-to-end solutions across networking, ProAV, VoIP, storage, and Physical Security (Protect & Access). As a key solution engineering lead in Vietnam, you’ll play an important role in market expansion. Working in a pre-sales capacity, you will help lead regional technical strategy for Ubiquiti in Vietnam, collaborating with product teams, partners, and global sales to drive adoption, market fit, and brand growth. Responsibilities Design scalable solutions across Network, Protect, Talk, Drive, and Access Deliver demos, POCs, webinars, and technical workshops Build proposals, architectures, and BoMs Enable partners and distributors Drive product visibility in retail and online channels Share market feedback with global teams Desired Experience Solution Architecture Enterprise Networking (SD-WAN, MC-LAG, BGP, OSPF) ProAV (AV-over-IP, PTP) Physical Security (CCTV & Access Control) VoIP (SIP, PBX systems) Storage (NAS, SAN) General Native Vietnamese and business English 3+ years in pre-sales, solution engineering, or system design Certifications (CCNP, CWNP, UWA) preferred Strong reliance on AI tools, LLMs, and automation to drive productivity and sca

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. About the Role We’re looking for a Sales Solution Engineer in Thailand to support enterprise customers and partners. You’ll design solutions across networking, ProAV, VoIP, storage, and Physical Security (Protect & Access). Working in a pre-sales capacity, you will lead regional technical strategy for Ubiquiti in Thailand, collaborating with product teams, partners, and global sales to drive adoption and growth. Responsibilities Design solutions across all product categories Deliver demos and technical workshops Build architectures and BoMs Support partners and distributors Drive market awareness Share insights with global teams Desired Experience Solution Architecture Enterprise Networking (SD-WAN, MC-LAG, BGP, OSPF) ProAV (AV-over-IP, PTP) Physical Security (CCTV & Access Control) VoIP (SIP systems) Storage (NAS, SAN) General Thai and English Pre-sales or system integration experience Certifications preferred Strong reliance on AI tools, LLMs, and automation to improve productivity Benefits Remote flexibility Travel opportunities Competitive compensation

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. About the Role We’re hiring a Sales Solution Engineer in South Korea to support enterprise customers and partners. You’ll design networking, ProAV, VoIP, storage, and Physical Security (Protect & Access) solutions. Working in a pre-sales capacity, you will lead regional technical strategy for Ubiquiti in South Korea, collaborating with product teams, partners, and global sales to drive adoption, market fit, and brand growth. Responsibilities Design solutions across all product areas Deliver demos and technical sessions Build proposals and architectures Enable partners and distributors Drive brand presence Provide market insights Desired Experience Solution Architecture Enterprise Networking (SD-WAN, BGP, OSPF) ProAV (AV-over-IP, PTP) Physical Security (CCTV & Access Control) VoIP (SIP, PBX systems) Storage (NAS, SAN) General Korean and English 3+ years in pre-sales, solution engineering, or system integration Certifications preferred Strong reliance on AI tools, LLMs, and automation to scale productivity Benefits Remote or hybrid flexibility Travel opportunities Competitive compensation

Why Sony Interactive Entertainment? Sony Interactive Entertainment isn’t just the Best Place to Play — it’s also the Best Place to Work. Sony Interactive Entertainment (SIE) is the company behind the PlayStation brand. As a subsidiary of Sony Group Corporation, we’re part of a proud legacy of innovation and excellence. SIE is a dynamic technology company, delivering cutting-edge hardware and network services to more than 100 million people and an entertainment leader, home to some of the most beloved and recognizable intellectual properties (IP) in the world. Our role at SIE is to create and nurture the experiences under the PlayStation brand, a name synonymous with entertainment excellence and creativity. Join the team responsible for developing the tests, tools, automation, and infrastructure that help ensure the quality of the software toolchain used to build every PlayStation®5 game. You’ll collaborate closely with the ToolChain development teams to design tests and testing systems for new features as they are developed. You’ll also help design and implement internal tools, automation, diagnostics, and workflows that improve confidence in the quality, reliability, and maintainability of the product. This role sits within Quality Engineering. That means our work goes beyond running tests or finding bugs. We build software that helps teams understand risk, improve feedback loops, diagnose issues faster, and build quality into the development process as early as possible. Our toolchain is based on a private fork of the open-source LLVM project, continuously updated through an automated merge system. Thanks to our advanced continuous testing, we have a strong track record of identifying and reporting new bugs in the open-source project very quickly. This role offers a great opportunity to build a career in Software Engineering in Test and Quality Engineering, working on industry-leading development tools. You’ll receive mentorship from experts in the field and have

SonicWall is a cybersecurity forerunner with more than 30 years of expertise and is recognized as a leading partner-first company, ensuring our partners and their customers are never alone in the fight against cybercrime. With the ability to build, scale and manage security across the cloud, hybrid and traditional environments in real-time, SonicWall provides relentless security against the most evasive cyberattacks across endless exposure points for increasingly remote, mobile and cloud-enabled users. With its own threat research center, SonicWall can quickly and economically provide purpose-built security solutions to enable any organization—enterprise, government agencies and SMBs—around the world. For more information, visit www.sonicwall.com or follow us on Twitter , LinkedIn , Facebook and Instagram . Role Summary We are seeking a highly skilled Test Staff Engineer with deep expertise in Firewall/Security testing and strong hands-on automation . This role requires technical leadership, end-to-end ownership of test strategy for assigned components, and building scalable automation and test tools to ensure high-quality SonicOS releases. Key Responsibilities Own test strategy, planning, execution, and quality sign-off for SonicOS components Architect, develop, and maintain automation frameworks, pipelines, and test tools Drive an automation-first regression strategy and improve overall test coverage Perform complex system, integration, and upgrade/downgrade testing Partner with Dev/PM in design reviews, scrums, and defect triage Lead root-cause analysis and validation of critical customer issues Mentor engineers; review test plans, automation design, and coverage Drive release readiness, escape analysis, and quality metrics Must-Have Skills Minimum 4+ Years of experience in QA and Automation Strong Networking: TCP/IP, Routing, NAT, VLANs, Firewall policies Firewall/Security: VPN, DPI/App Control, IPS, Gate

At Snowflake, we are powering the era of the agentic enterprise. To usher in this new era, we seek AI-native thinkers across every function who are energized by the opportunity to reinvent how they work. You don’t just use tools; you possess an innate curiosity, treating AI as a high-trust collaborator that is core to how you solve problems and accelerate your impact. We look for low-ego individuals who thrive in dynamic and fast-moving environments and move with an experimental mindset — who rapidly test emerging capabilities to discover simpler, more powerful ways to deliver results. At Snowflake, your role isn't just to execute a function, but to help redefine the future of how work gets done. Company Overview We are building the next generation of cloud security infrastructure, focusing on advanced Data Exfiltration Protection (DXP) and unified Data Movement Policies (DMP). Our mission is to provide seamless, context-aware security that protects sensitive data without hindering developer velocity. We are looking for a visionary Principal Engineer to lead the technical strategy and architecture for our Data Movement and Perimeter control systems. Role Summary As a Principal Engineer in the Data Protection group, you will be the technical lead for the Data Exfiltration Protection (DXP) and Data Movement Policy (DMP) initiatives. You will bridge the gap between high-level security policy and low-level system enforcement, ensuring that our perimeter controls are robust, scalable, and deeply integrated with context-aware access policy frameworks. You will be responsible for the architectural evolution of our egress control systems, moving from simple IP-based rules to sophisticated, content-aware, and identity-driven data movement governance. AS A PRINCIPAL SOFTWARE ENGINEER - IDENTITY, DATA SECURITY AND TRUST AT SNOWFLAKE YOU WILL: Architectural Leadership: Lead the design and implementation of the Data Movement Policy (DMP) framework, ensuring it can handle complex

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about driving innovation for next-generation memory solutions powering AI/ML and high-performance computing systems. As a Director of HBM RTL Design and Integration, you will lead a team responsible for the design, integration, and delivery of next-generation HBM SoC logic die, with a strong focus on RTL development and IP integration. You will drive technical strategy and execution across multiple product generations, working closely with architecture, verification, physical design, firmware, and product engineering teams. Key Responsibilities Lead SoC RTL design and integration for HBM logic die, including subsystem partitioning, IP integration, and SoC-level design convergence. Drive translation of architectural and micro-architectural specifications into robust, high-quality RTL implementations across multiple teams. Oversee SoC integration aspects, including clocking, reset, power intent, configuration infrastructure, and system-level design correctness. Establish design methodologies and best practices to improve quality, reuse, and development efficiency across HBM programs. Partner with SoC Architecture, Verification, Physical Design, Firmware, and System teams to ensure successful end-to-end product execution. Work closely with Product Engineering, Test, Probe, Process Integration, Assembly, and Manufacturing to ensure robust, manufacturable HBM