Test Job 02 09 Jobs

Senior Software Development Engineer in Test - Datacenter Server OS — CA, Santa Clara. Apply via Workday.

Front End Central Product Integration Engineer – Test & Product Yield Integration (Senior / Staff / Principal) — Fab 10A, Singapore. Apply via Workday.

DRAM Product Engineer - LPDDR Design for Test — Taichung - Fab 16, Taiwan. Apply via Workday.

Principal Engineer – HBM Design for Test (DFT) — Richardson, TX. Apply via Workday.

Front End Central Product Integration Engineer – Test & Product Yield Integration (Senior / Staff / Principal) — 2 Locations. Apply via Workday.

Senior Integrated Product Team Lead - Spacecraft Integration & Test — USA - El Segundo, CA. Apply via Workday.

Front End Central Product Integration Engineer – Test & Product Yield Integration (Senior / Staff / Principal) — Boise, ID - ID1. Apply via Workday.

New College Grad - CMOS & Metallization Test Structure Design and Layout — Jalisco, Mexico. Apply via Workday.

Senior Engineer - HBM Design for Test (DFT) — Richardson, TX. Apply via Workday.

Staff/Principal Engineer - HBM Design for Test (DFT) — Richardson, TX. Apply via Workday.

At Snowflake, we are powering the era of the agentic enterprise. To usher in this new era, we seek AI-native thinkers across every function who are energized by the opportunity to reinvent how they work. You don’t just use tools; you possess an innate curiosity, treating AI as a high-trust collaborator that is core to how you solve problems and accelerate your impact. We look for low-ego individuals who thrive in dynamic and fast-moving environments and move with an experimental mindset — who rapidly test emerging capabilities to discover simpler, more powerful ways to deliver results. At Snowflake, your role isn't just to execute a function, but to help redefine the future of how work gets done. The success and effectiveness of our engineering teams is the most critical factor in helping customers succeed with Snowflake. As a Staff Product Manager for Developer Experience, you will lead the mission to build an industry-leading, AI-forward developer experience for the engineers at Snowflake. This is a high-impact, high-ownership role where you will act as the single-threaded owner (DRI) for our internal developer platform and product validation strategy. Your primary focus will be redefining how the Snowflake product is developed and tested - shaping an AI-forward and opinionated developer experience and a modern, intelligent test pyramid that balances speed, reliability, and coverage. You will ensure our internal tools enable engineers to move with maximum velocity while maintaining the world-class quality our customers expect. AS A STAFF PRODUCT MANAGER, YOU WILL : Drive AI-Native Validation: Lead the transformation of our testing suites by integrating AI to generate test cases, identify regression risks, and optimize test selection, significantly accelerating the time-to-impact. Redefine Developer Workflow: Build an AI-forward developer experience that removes friction from the "inner loop" of development, ensuring engineers can validate and iterate on their idea

NVIDIA’s Silicon Co-Design Group is the team that gets every GPU, SoC, and CPU silicon program from first power-on to high-volume production. We are hiring a Senior Manager to lead our Test, Manufacturability, Reliability & Quality (TMRQ) organization. This is not a coordination role . Your work decides if a product can be built at scale and trusted in the field. These include production test development (SLT, BLT), control run flow, system reliability stress (HTOL), platform- and board-level manufacturing issue closure, and field diagnostic test development. You lead a team of individual contributors and a first-line manager at the layer where silicon, platform, and software collide with manufacturing reality. Decisions you make show up in yield curves, production ramp , and customer escapes. You are the leader the program turns to when a build is stuck, a control run is fallout-heavy, or a field return points back at silicon . The exceptional hire also uses AI deliberately — with demonstrated workflow impact and the judgment to know where it compresses real work and where it introduces risk. What you will be doing: Keep programs moving. Own the technical execution and velocity of SLT, BLT, Board/Chip/Rack CR, and system reliability stress (HTOL) across every GPU, SoC, and CPU silicon program. Close the hardest multi-functional failures. Resolve Vmin and binning escapes, performance shortfalls, and power anomalies by driving root-cause across design, methodology, DFT, ATE, package, software/firmware, and manufacturing — and own the WARs and productized fixes through to confirmation. Give leadership the clarity to act. Convert raw integration signals — CR fallout, BLT/SLT yield, SHTOL/CHTOL data, RMA trends, customer escalations — into decision-ready options that enable executive leadership to act with confidence on POR, QS/PS gates, a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The HBM Design Technology Package Co-Optimization (DTPCO) organization is seeking a Staff Engineer! Lead the design and development of test vehicles that enable technology learning and risk reduction for future HBM products! This role serves as a key technical contributor within DTPCO, partnering closely with Architecture, Design, Layout, Product Engineering, Reliability, and Advanced Packaging teams to translate emerging product requirements and technology challenges into actionable test vehicle solutions. You will apply expertise in semiconductor design, physical implementation, silicon characterization, and advanced packaging technologies to define test structures, develop validation strategies, and generate data that drives product decisions across future HBM generations. Unlike a traditional product role centered on ownership of product blocks, this position emphasizes enabling learning in development and engineering. It does so by developing representative test vehicles and characterization structures. Key Responsibilities Serve as a technical lead for HBM test vehicle design and structure development within DTPCO. Partner with HBM product, technology and reliability team. Define and implement test structures targeting key learning areas such as package interaction and reliability Drive test vehicle content definition, structure specifications, measurement requirements, and validation objectives. Analyze silicon characterization and qualification results to identify optimization opportunit

At Lyft, our purpose is to serve and connect. We aim to achieve this by cultivating a work environment where all team members belong and have the opportunity to thrive. As a Test Automation Intern at Lyft, you'll collaborate closely with industry-leading engineers while enjoying the freedom to innovate from day one. Your contributions will be pivotal in accelerating our product development and enhancing user trust and satisfaction through the creation of cutting-edge test automation tools. At Lyft, we cultivate a dynamic and collaborative office environment, where brilliant minds are always eager to hear and support your next big idea. What will yours be? Responsibilities: Own your project, while checking in with other team members throughout the day with questions and updates You leave the code in a better state than when you found it (progressive refactor) You value reliability, ensured by testing (unit, integration and load tests) Participate in code reviews to ensure code quality and distribute knowledge Continuous integration and deployment Go home knowing that your work today is meaningfully improving the quality of every Lyft Urban Solutions rider! Experience: Currently pursuing a Bachelor's or Master's degree in Computer Science from a university in Canada (required) , with a graduation date between December 2027 and Summer 2028 (required) . For any candidates who are master's students who worked between their bachelor's and master's programs: candidates should also have less than 2 years of relevant full-time work experience Available during Summer 2027 for the internship in Montreal Strong knowledge of CS fundamentals Excellent communication skills Passion for community, sustainability, and/or transportation Passion for quality and testing Ability to thrive in a startup environment Contributions to open source projects Experience working with databases Experience solving real-time technology problems Experience with mobile development Experience wit

About the Team: OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. In this role you will: As a Hardware Test Engineer, you will work on Machine Learning/AI hardware system projects to craft the solutions for current and future data center deployments. You will bring a strong understanding of hardware system testing, excellent project management skills, and the ability to collaborate across multiple teams to ensure efficient lab operations. You will be responsible for designing, implementing, and executing comprehensive test plans that ensure the reliability, performance, and scalability of our supercomputing hardware systems. You will develop detailed test plans and methodologies tailored to hardware components, including processors, memory modules, custom accelerators and interconnects. You will collaborate with hardware design, manufacturing, firmware teams and vendors to identify, analyze, and resolve issues affecting hardware, power, thermal and high-speed interconnects. You will perform in-depth debugging on the hardware system Excellent analytical skills to diagnose hardware issues, troubleshoot problems, and propose solutions. Ability to interpret complex test data, identify trends, and draw meaningful conclusions. High-speed links, with a focus on SerDes (Serializer/Deserializer) technology to assess signal integrity, error rates, and overall link performance. You will collaborate with the lab manager to maintain the equipment and hardware systems, including oscilloscopes, thermal test chambers, liquid cooling systems, and other mea