Verification Of Benefits Specialist Jobs

NVIDIA is seeking a highly enthusiastic and motivated Verification Engineer to verify the design and implementation of the next generation of control subsystems for the world’s leading GPUs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. At NVIDIA, our employees are passionate about parallel and visual computing. We are united in our quest to transform the way graphics are used to solve some of the most complex problems in computer science. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA’s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as “the AI computing company.” What you’ll be doing: As a key member of our ASIC Verification team, you will contribute to verifying graphics and compute features within an IP. You will be responsible for IP-level verification of GPU ASICs, including the design, architecture, golden models, and micro-architecture, using advanced verification tools and methodologies. You will work with the specifications, develop test plans, tests and verification infrastructure using UVM methodology and ensure functional and code coverage of all the RTL which you will verify. Work with HW architects and designers to make the right implementation choices. You will be working with architects, designers, and other members of yo

Job Details: Job Description: Do Something Wonderful At Intel, we put silicon at the center of the world’s most meaningful innovations. From personal computing and AI to cloud-scale data centers and edge platforms, our processors power technologies that touch billions of lives. If you’re passionate about building world-class silicon at massive scale, we want to build the future with you. The Team You’ll join Intel’s All Cores Engineering (ACE) organization, the team responsible for designing and delivering Intel’s industry‑leading CPU cores. Within ACE, the Atom group focuses on high‑efficiency, performance‑per‑watt optimized cores that enable everything from client platforms to emerging edge and scalable solutions. This is a hands‑on senior engineering role with direct impact on next‑generation CPU silicon. What You’ll Do As a Senior CPU Design Verification Engineer you will play a critical role in ensuring architectural correctness, functional robustness, and power‑efficient performance of Intel’s Atom CPU designs before first silicon. Key responsibilities include but not limited to the following: Lead pre‑silicon functional verification of complex CPU and SoC logic to ensure full compliance with architectural and microarchitectural specifications. Develop and execute verification plans, testbenches, and SystemVerilog/UVM environments, ensuring comprehensive functional and coverage closure. Define, run, and analyze system‑level simulations to uncover functional, performance, power, and corner‑case issues. Debug and root‑cause complex RTL, microarchitecture, and integration issues; drive issues to resolution with design teams. Collaborate cross‑functionally with CPU architects, RTL de

Job Details: Job Description: The Role and Impact As a Sr Deep Learning Hardware Verification Engineer, you will play a pivotal role in shaping the future of AI hardware by validating and optimizing next-generation NPU silicon solutions. In this role you will join the NPU Hardware Pre-Silicon Validation team working closely with design engineers, model engineers and AI architects to validate components of the next generation NPU IP portfolio, your contributions will directly shape Intel's advancements in AI technologies. Your responsibilities will include: • Functional Verification of complex digital design block(s) on the latest generations of Intel's NPU AI accelerators. • Architect, development and implementation of verification environments from initial planning through the validation lifecycle to review and signoff. • Development of test plans and test cases. • Implementation of random test generators, high level transactional models, bus functional models (BFMs), functional/formal constraints, checkers and scoreboards, coverpoints/covergroups and SVA properties. • Implementation of software based testcases for functional and performance based testing of the NPU AI accelerators. • Collaborate with cross-functional teams to analyses and address next-generation AI requirements, influencing the AI product roadmap. Leixlip is the primary location for this position, however, we offer some flexibility to support your work/life balance arrangements. Business group The Artificial Intelligence and Deep Learning team drives innovation in AI hardware development, aligning with Intel's mission to deliver world-class solutions in the AI domain. With a focus on building state-of-the-art hardware that supports cutting-edge AI models, the team collaborates across Intel to en

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the design and implementation of the world’s leading inference accelerator. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people around the globe. Their mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will help to build the high-performance processor elements that implement programmable compute and graphics functionality. What you'll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation of inference accelerator You will be responsible for verification of the ASIC design, architecture, reference models and micro-architecture using advanced verification methodologies Understand the design and implementation of your unit, define the verification scope, develop the verification infrastructure and verify the correctness of the design Collaborate with architects, designers, and pre and post silicon verifi

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we build open, state of the art compute for real workloads and real developers. You will lead our Bangalore-based CPU Core Design Verification team, driving both the technical strategy and the people leadership behind verification of our high-performance, out-of-order RISC-V CPUs. You will manage a team of core-level verification engineers, partner closely with our Santa Clara and Austin sites, and own delivery of core verification from architecture definition through tapeout readiness. This role is hybrid based out of Bangalore, India, with regular collaboration across our globally distributed CPU organization. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are 15+ years of CPU/DV experience, including 7+ years leading verification teams, with strong hands-on expertise in high-performance, out-of-order CPU verification. Deep microarchitecture & verification expertise, including ISA, RTL, UVM/CVM, testbench development, regressions, coverage, and complex debug. Strong people and technical leadership, with experience hiring, mentoring, developing engineers, and setting verification strategy and methodology across teams. Highly

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Our Tensix team is building custom AI compute cores, RISC-V CPUs, and chiplet-based architectures for datacenter, edge, and automotive AI. Design Verification Engineers on this team validate compute IP and subsystems and build scalable DV infrastructure to keep verification fast, automated, and production-grade. This role is hybrid, based out of Toronto, ON, Austin, TX or Belgrade, Serbia. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in modern verification methodologies with strong SystemVerilog skills and exposure to structured testbench development. Comfortable working from block-level to system-level verification and reasoning about microarchitecture behavior from specs and waveforms. Proficient in Linux environments with Python, or Bash scripting for automate builds, parse logs, manage CI pipelines. Skilled in coverage-driven verification and confident debugging across RTL, testbench, and workload scenarios. Motivated by AI hardware and eager to learn verification strategies for new architectures and domains. What We Need Contribute to verification of Tensix IP and subsystems from early planning through tape-out, owning cov

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. Join NVIDIA's GPU Performance Infrastructure team and be part of a brand-new journey in validating and shipping next-generation GPU architectures. At NVIDIA, we empower our engineers to innovate and drive powerful performance through innovative infrastructure and workflows. This role is uniquely positioned to influence the entire lifecycle of GPU performance verification, from early-stage modelling to post-silicon validation. With our bold standards and extraordinary team, you'll have the chance to define a significant impact on the future of computing! What you'll be doing: Build and develop end-to-end performance verification infrastructure. Build scalable data pipelines to surface performance metrics from simulation, emulation, and silicon environments. Coordinate with GPU architects to craft infrastructure for performance verification of upcoming architectures. Work closely with HW teams to automate and accelerate verification workflows, enabling faster GPU build iteration. Empower GPU architects by providing insights to understand current performance and model industry-leading performance for future builds. Improve the daily workflows of the wo

NVIDIA is looking for an excellent Senior Firmware Verification Engineer for NVIDIA FW PHY verification Group. The person will be part of FW PHY verification of NVIDIA Products. Will closely work with NVIDIA FW PHY development, architecture teams and gain deep understanding of NVIDIA's products and technologies. What you'll be doing: Own the responsibility for delivering Networking features and their verification aspects. Define, develop and maintain verification infrastructure and regression tests suites - make test suites robust, maintainable and easy portable. Work with continuous integration system, regression tools, automate builds, run test suites and analyzing results. Innovate! Bring NVIDIA product to next quality level What we need to see: B.Sc. in Computer Science / Computer Engineering / Electrical Engineering / Communication Engineering 5+ year of relevant experience working with established brands Experience with Verification and Automation Programming Knowledge in C and C ++, object-oriented OOP Knowledge in Linux Creative, motivated and value-driven person Ways to stand out from the crowd: Background with C/C++ as well as Git Experience with python Experience with Networking applications and protocols Background with CI methodology & tools (Gerrit, Jenkins etc.) NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a highly skilled and motivated Senior Design Verification Engineer to join our team. In this role, you will be responsible for the end-to-end verification of our IOMMU (Input/Output Memory Management Unit) IP. You will play a critical role in ensuring the functional correctness and performance of the design, taking ownership of the verification process right from the initial specification understanding down to final coverage closure. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have hands-on experience in ASIC or SoC verification using SystemVerilog and UVM. You enjoy debugging complex design and verification issues and working closely with cross-functional teams. You’re comfortable building verification environments from scratch and driving coverage closure. You have familiarity with standard bus protocols and modern verification tools. What We Need Experience owning block or subsystem-level verification from test planning to sign-off. Strong understanding of constrained-random verification, coverage analysis, and regression debugging. Familiarity with proto

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Design Verification Engineer to lead pre-silicon verification of the Beowulf SoC, with focus on the Compute Subsystem (CSS), DDR memory subsystem, and Fabric NoC. This role will drive coverage, coherency, memory traffic, connectivity, error handling, and bring-up features critical to silicon success. This role is hybrid, based out of Boston, MA; Toronto, ON; or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Deeply curious about SoC architecture, compute systems, DDR behavior, and Fabric NoC/interconnect verification. Expert in UVM, SystemVerilog, coverage-driven verification, assertions, and subsystem-level debug. Experienced in verifying compute subsystems, DDR controllers and PHY-facing logic, NoC/interconnect protocols, coherency, ordering, and data movement. Comfortable with reset, power management, error handling, performance, and high-concurrency system scenarios. Proactive, detail-oriented, and effective in cross-functional technical discussions. Familiar with Python, C/C++, Tcl, CocoTB, or similar verification automation tools. What We Need Develop and own scalable verification environmen

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Design Verification Engineer to contribute to the unit-level verification of our RISC-V CPU front end—including instruction fetch, branch prediction, and surrounding fetch control structures. As a key individual contributor within our front-end DV team, you will focus on building testbenches, generating stimulus, and developing checkers for complex microarchitectural scenarios. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Front-End Experience: Solid background verifying CPU front-end blocks—such as instruction fetch, branch predictors (BTB, TAGE, RAS), instruction caches/TLBs, or decode—using SystemVerilog, UVM, and C++. Unit-Level Focus: Hands-on experience building clean, controllable unit testbench environments with precise stimulus and checking. Reusable Design: Pragmatic approach to building transactors, predictors, and scoreboards that can be reused across verification levels. Collaborative Problem Solver: Comfortable working alongside RTL designers to trace and fix misspeculation, redirect, and edge-case fetch bugs. What We Need Unit-Level Verifica

Firmware Engineer BIOS/UEFI Description - The Firmware Engineer is responsible for ensuring that embedded firmware meets the highest standards of quality, robustness, and long‑term reliability. This role works closely with firmware developers, hardware engineers, architecture teams, QA, and cross‑functional partners to define quality metrics, validate system behavior, improve defect detection, and build processes that prevent regressions. Responsibilities Develop, execute, and maintain comprehensive firmware test plans, including functional, regression, stress, corner-case, and long-duration reliability tests. • • • Evaluates the firmware architecture, design and development plus testing methodologies to create strategy and implement methods to bring increased quality and reliability to the firmware. Reviews firmware code and test plans including functional, regression, stress, corner-case and long-duration reliability tests. Perform root-cause analysis for firmware defects, drive containment, corrective actions, and verification of fixes. Create and manage quality dashboards, KPI, failure rates, and reliability metrics. Evaluate failure modes exposed during design, development, manufacturing and field use; propose design or process improvements to prevent recurrence. Works with product architects, firmware teams, product managers and provides critical guidance, system-level debugging and troubleshooting to various teams, as a Subject Matter Expert. Reviews and evaluates designs and project activities for compliance with systems design and development guidelines and standards; provides tangible feedback to improve product quality and mitigate failure risk. Create and manage quality dashboards , KPIs, failure rates, and reliability metrics. Validate firmware integration with hardware, BIOS/UEFI, EC, micro

We anticipate the application window for this opening will close on - 28 Sep 2026 Careers that change lives start here. Medtronic is a global leader in healthcare technology with a Mission to alleviate pain, restore health, and extend life. Our 95,000 employees work across more than 150 countries to put patients first — developing innovative medical technologies that improve the lives of 72+ million patients each year. Your unique talents will help shape the future of healthcare while building a career grounded in purpose, growth, and impact. A Day in the Life At Medtronic, we bring bold ideas forward with speed and decisiveness to put patients first in everything we do. In-person exchanges are invaluable to our work. We’re working a minimum of 5 days a week onsite as part of our commitment to fostering a culture of professional growth and cross-functional collaboration as we work together to engineer the extraordinary. The Cardiac Rhythm Management (CRM) portfolio delivers therapies designed to restore, support, and protect every heartbeat through advanced pacing, defibrillation, and remote monitoring solutions. CRM's unique ability to pair proven life-saving therapies with intelligent technology gives clinicians and patients greater confidence. Clinical impact and innovation come together to improve lives through meaningful patient outcomes. The Senior Principal Electrical Engineer is a key individual contributor within the Medtronic Cardiac Rhythm Management (CRM) Electrical System Design Team. In this role, you will drive the definition, design, integration, and verification of complex mixed-signal electronics for active implantable cardiac devices and external patient systems

We anticipate the application window for this opening will close on - 28 Sep 2026 Careers that change lives start here. Medtronic is a global leader in healthcare technology with a Mission to alleviate pain, restore health, and extend life. Our 95,000 employees work across more than 150 countries to put patients first — developing innovative medical technologies that improve the lives of 72+ million patients each year. Your unique talents will help shape the future of healthcare while building a career grounded in purpose, growth, and impact. A Day in the Life At Medtronic, we bring bold ideas forward with speed and decisiveness to put patients first in everything we do. In-person exchanges are invaluable to our work. We’re working a minimum of 5 days a week onsite as part of our commitment to fostering a culture of professional growth and cross-functional collaboration as we work together to engineer the extraordinary. The Cardiac Rhythm Management (CRM) portfolio delivers therapies designed to restore, support, and protect every heartbeat through advanced pacing, defibrillation, and remote monitoring solutions. CRM's unique ability to pair proven life-saving therapies with intelligent technology gives clinicians and patients greater confidence. Clinical impact and innovation come together to improve lives through meaningful patient outcomes. The Principal Electrical Engineer will be an individual contributor within the Medtronic Cardiac Rhythm Management Electrical System Design Team. The individual will be involved in all phases of product development including definition, design, troubleshooting, characterization, and verification of implantable pulse generators (pacemakers), implantable cardioverter defibrillators, and implantable diagnostic devices as well as external patient comm

WPP is the trusted growth partner for the world’s leading brands. We unite cutting-edge media intelligence and data solutions, world-class creativity, next-generation production, transformative enterprise solutions and expert strategic counsel in a single company – powered by exceptional talent and our agentic marketing platform, WPP Open, to help our clients navigate change, capture opportunity and deliver transformational growth. We work with the world's most valuable brands and have global reach across 100+ markets, with deep local expertise. Our people are the key to our success. We're committed to fostering a culture of creativity, belonging and continuous learning, attracting and developing the brightest talent, and providing exciting career opportunities that help our people grow. For more information, visit WPP.com. Job Summary - To manage travel and expense reimbursement of employees in an organization and ensure timely payments of all expense claims. Key responsibilities - Educate employees about travel program policies and correct procedures. Verification of T&E Expense claims in Macanomy. Reconciliation and Clearing of T&E GL accounts and month end accrual reports. Posting of Macanomy claims and preparing Reconciliation file and sharing with the Payment team. Employee profile creation and Modifications. Service now tool query handling. Monitoring generic mailbox and follow up with employees. Amex reconciliation file and sending inputs to process payments as per deadlines. Monitoring Generic Mailbox. Report generation and Allocation within the team on daily basis. Skills/Experience Minimum 4-6 years of experience in Travel & Expense – Accounts Payable. Bcom Graduate. Should be an experienced problem solver with excellent written and verbal communication skills. Flexible attitude to achieve results. Excell