Advanced Analytics Lead in United States

Job Details: Job Description: This position is in the Intel Mask Operations within the Logic Technology Development team working in one of the most advanced semiconductor process technologies in the world. In this position the engineer will be an integral contributor to the ongoing production of photolithography masks for Intel's leading-edge silicon manufacturing solutions. In this position, you will work on-site, in a dynamic and collaborative environment solving complex and challenging technical problems on sophisticated manufacturing processes and equipment. As IMO module Engineer the responsibilities may include but not limited to: Process equipment installation and development. Equipment maintenance, management of troubleshooting activities, regular monitoring of process performance, defect analysis and reduction. Drives improvements on quality, reliability, cost, yield, process stability/capability, productivity, and safety/ergonomics. Working with cross functional teams to solve technical process and defect issues. Plans and conducts experiments to fully characterize the process throughout the development cycle. Establishes control systems to optimize and sustain production performance. Develops strategies to resolve difficult problems and establishes systems to manage these problems in the future. An ideal candidate should exhibit the below behavioral traits: Experience with rapid analysis of complex process issues and identification of a solution path Willing to work Independently with minimal direction, to be self-directing and show initiative Communication skills and demonstrated ability to summarize complex d

Senior Low Observables (LO) Mission Systems Integration Engineer Company: The Boeing Company The Senior LO Mission Systems Integration Engineer will lead design, integration, analysis, test, and production activities for low observable materials, structures, apertures, sensors, and radomes for mission systems. The role requires strong technical leadership, independent execution of complex tasks, advanced use of computational electromagnetic (CEM) solvers, and the ability to produce and defend technical results with minimal oversight. Key Responsibilities Lead design, modeling, and analysis efforts for LO materials, coatings, structures, and integrated mission systems to meet signature reduction and performance requirements. Independently apply CEM solvers (e.g., FEKO, HFSS, CST, WIPL‑D, xFDTD, or equivalent) to model antennas, apertures, radomes, and LO treatments; perform design optimization and trade studies. Drive integration of LO treatments with mechanical, thermal, and sensor/antenna system constraints; identify and mitigate producibility, testability, and sustainment risks. Plan, execute, and oversee laboratory and field tests (anechoic chamber measurements, antenna/radome characterization, RCS measurements); lead data collection, reduction, and validation activities. Develop and validate predictive models, reconcile simulations with measurements, perform uncertainty quantification, and provide actionable recommendations to engineering and program leadership. Produce high-quality technical documentation: test plans, test reports, technical memoranda, design reviews, and customer briefings. Mentor and provide technical oversight to junior engineers and technicians; ensure adherence to engineering processes, qual

About the Team OpenAI, in close collaboration with our capital partners, is building the world’s most advanced AI infrastructure ecosystem. Our Industrial Compute organization develops and deploys large-scale AI campuses designed to support the next generation of frontier model training and inference workloads. The Hardware Operations team is responsible for ensuring the reliability, availability, and lifecycle health of OpenAI’s compute infrastructure. We partner closely with Data Center Operations, Fleet Health Engineering, Manufacturing, Network Infrastructure, Capacity Planning, and our infrastructure partners to maintain world-class operational performance across rapidly expanding AI environments. As we scale globally, we are building the operational frameworks, reliability standards, and sustaining engineering practices required to support thousands of GPUs and servers across multiple campuses. About the Role We are seeking a Datacenter Hardware Technician Lead to serve as the senior on-site technical authority for hardware reliability and fleet health at one of OpenAI’s flagship AI campuses. This role operates at the intersection of hardware operations, sustaining engineering, and fleet reliability. You will partner closely with Cloud Service Provider operations teams, OpenAI fleet-health engineers, hardware engineering teams, and OEM vendors to identify, diagnose, and resolve hardware issues affecting production systems. Beyond day-to-day operational support, you will drive root cause investigations, reliability improvement initiatives, lifecycle management programs, and operational readiness efforts. You will help establish hardware maintenance standards, operational procedures, and best practices that scale across future OpenAI infrastructure deployments. The ideal candidate combines deep hands-on datacenter hardware expertise with strong troubleshooting, failure analysis, and cross-functional leadership skills. Candidates must be able to sit onsite at our

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are seeking an experienced SoC Architect to lead the definition and development of next-generation custom AI silicon for edge deployments. This role will be responsible for shaping the architecture of highly efficient, high-performance SoCs optimized for machine learning inference and on-device intelligence. You will work cross-functionally with internal engineering teams and external ecosystem partners to translate product requirements into scalable silicon solutions, driving execution from concept through delivery. In this role you will: Define the architecture and technical roadmap for custom SoCs targeted for edge applications. Drive system-level tradeoff analysis across compute, memory, interconnect, power, thermal, and cost constraints. Architect energy-efficient ML compute subsystems optimized for inference workloads and real-world deployment environments. Collaborate with internal hardware, software, systems, and product teams to align architecture with platform needs. Partner with external silicon vendors, IP providers, and manufacturing partners to execute development plans. Lead hardware/software co-design efforts to maximize performance per watt and end-to-end system efficiency. Guide implementation teams through microarchitecture, RTL development, validation, and bring-up phases. Operate effectively in agile development environments and help teams deliver against aggressive schedules and milestones. You might thrive in this role if: Proven exper

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we are transforming how the world uses information to enrich life through innovative memory and storage solutions. The DRAM Thin Films Process Engineering team develops advanced materials and deposition processes that enable future memory scaling, improved device performance, and next-generation semiconductor technology. Our team works at the forefront of process development to support DRAM technologies that power artificial intelligence, cloud computing, and data-intensive applications. As a DRAM Thin Films Process Engineering Intern, you will work alongside experienced engineers on a high-impact summer project focused on semiconductor process development and optimization. This role provides hands-on experience with experimental design, process characterization, data analysis, and multi-functional collaboration. You will contribute to real engineering challenges and present your results to technical and leadership audiences at the conclusion of the internship. Responsibilities Research and develop innovative solutions that support next-generation memory technology and thin film process advancement. Develop, complete, and analyze experiments to improve thin films process performance, manufacturability, and product quality. Apply statistical analysis, data science techniques, and AI-enabled tools to identify process trends, optimize performance, and accelerate engineering decision-making. Partner with process, equipment, and integration engineering teams to solve complex technic

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities include but are not limited to the following: Team oriented approach to create new strategies for DRAM DFT. New DRAM Test Flow Strategy. Fail Pattern Recognition. Improved methodology for test time reduction and improved quality. Assist in solutions to high visibility DRAM product issues. Create supporting software tools to assist in Engineering Analysis. Invent and Innovate anything and everything related to DFT. Employer will accept a Bachelor’s degree in Electrical Engineering, Computer Science, Electrical and Computer Engineering or related field. Position requires: 1) CMOS circuit knowledge 2) Basic programming skills in Python, Java, C or C&#43;&#43; 3) DRAM knowledge 4) Statistics 5) Basic lab experience or equivalent applied software profiling/analytics As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays.<s

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Intro: The Advanced Packaging Technology Development (APTD) department at Micron Technology is shaping the future of memory and storage technology through advanced packaging innovation. Our team develops the processes, automation, and manufacturing capabilities that enable next-generation semiconductor products. Working closely with global R&D and manufacturing partners, we turn new ideas into scalable solutions that help maintain Micron’s leadership in the industry. Position Overview: As a Process Engineer, you will play a key role in improving the quality, reliability, and manufacturability of future memory products. This position combines hands-on problem solving, process optimization, and cross-functional collaboration in a fast-paced development environment. You will help drive technical advancements, influence technology roadmaps, and contribute directly to the success of next-generation semiconductor solutions. Responsibilities: Optimize automation, equipment, and process performance to improve product quality, reliability, and cost Develop and enhance host, automation, and data systems to accelerate learning and decision-making Perform root cause analysis and failure investigations using methodologies such as FMEA, 8D, SPC, and FDC Partner with equipment, process development, and process integration teams to develop and implement new solutions Support pilot line operations and technology transfer to high-volume ma

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron has an opening for a Photolithography Engineer (Level 2 or 3) at our Boise, Idaho facility. This position is part of Micron’s Technology Development organization, where advanced ideas become manufacturable technologies. Our team works at the leading edge of memory innovation, partnering across design, integration, manufacturing, and equipment suppliers to enable the next generation of semiconductor devices. This is where curiosity, experimentation, and impact come together. As a Photolithography Engineer, you will play a key role in developing and integrating lithography processes that directly shape future memory technologies. You will work hands-on with tools, materials, layouts, and data, while leveraging Artificial Intelligence and other software, collaborating with global partners to move innovations from R&D into high-volume manufacturing. This role offers broad technical exposure and the opportunity to influence device performance, yield, and cost at scale. Responsibilities: Develop and integrate photolithography unit processes for advanced memory technologies Perform material evaluations, reticle, and layout development, OPC, overlay optimization, and process window analysis Drive yield improvement, failure analysis, and device performance optimization Partner with equipment vendors to evaluate tools and improve process capability Document processes, communicate results, and support technology transfer to manufacturing Leverage Artifi

Systems Engineer (Modeling & Simulation) (Associate or Mid-Level) Company: The Boeing Company Boeing Defense & Security (BDS) is looking for an Associate or Mid-Level Systems Engineer (Modeling & Simulation) (Level 2 or 3) to join our multi-disciplined engineering team in Albuquerque, New Mexico designing and developing advanced concepts on a DOD propriety program . This position will join a multi-disciplined team of engineers and scientists to develop and test advanced concepts for the Department of Defense. Work could include such things as image processing and analysis, radiometry, modeling and simulation, evaluation of field data to anchor models, and wherever the data may lead throughout the program. The ideal candidate will have strong MATLAB or Mathematic skills, an interest in data analysis; modeling and simulation; and some knowledge of optics and electro-optics. Position Responsibilities: Assists in developing and validating requirements for various electro-optical systems and components Uses data analysis results and output of mod/sim tools to assist in the development and validation of requirements for electro-optical systems, mechanical systems, interconnects and structures Works with engineering teams to collect and analyze data used to anchor models Performs complicated trade studies, modeling, simulation and other forms of analysis to predict component, interconnects and system performance and to optimize design around established requirements Defines and conducts critical analyses of various kinds to validate performance of designs to requirements Defines and conducts tests to validate performance of designs to requirements and anchor models to fi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The TD Electrical Device Characterization team pushes the boundaries of Micron’s memory technology. We explore device behavior, uncover insights through data, and collaborate across engineering teams to enable next-generation products. We are a hands-on team that values curiosity, precision, technical rigor, and collaboration. In this role, you will drive electrical characterization for advanced memory technologies and partner with device, process, and product teams to turn measurements into actionable technical insights. Your work will help guide technology development and shape the performance and reliability of future NAND, DRAM, and emerging memory products. Responsibilities: Lead electrical characterization for advanced memory devices Develop measurement methods, algorithms, and scalable characterization standards Automate data pipelines and analysis using Python, JSL, C/C&#43;&#43;, and dashboard tools Architect test setups and manage wafer probe and ATE test flows Investigate device behavior, identify root causes, and communicate technical findings Minimum Qualifications: <span style="color:#6

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Principal Signal Integrity Engineer — Interface Pathfinding About the Role At Micron, we transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next era of AI, ML, and advanced computing. Micron’s Interface Pathfinding team operates at the leading edge of that mission — serving as a bridge between corporate strategy and engineering through forward-looking investigation and development of energy-efficient bandwidth solutions. Our work spans innovative circuit, signaling, packaging, and interconnect solutions with a 3–5 year technology horizon, grounded in rigorous analysis, hands-on measurement, and a commitment to building a robust intellectual property portfolio. As a Principal Signal Integrity Engineer , you will be a core technical contributor on a deliberately small, senior team united around the goal of preparing high-speed interface innovations for high-confidence product adoption. What You’ll Work On Micron’s Interface Pathfinding team investigates and validates novel interconnect and signaling solutions for high-speed memory and die-to-die interfaces. The signal integrity scope is broad and analytically deep — spanning electrical modeling, channel analysis, and substrate evaluation — with an emphasis on original analysis rather than execution of established playbooks. Key signal integrity domains include: Intercon

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are at the heart of advanced DRAM node development, driving innovations from concept to high-volume production. Our team partners closely across Technology Development, Design, Quality, and Manufacturing to bring innovative memory technologies to life. If you’re excited about translating breakthrough ideas into real-world impact, you’ll find this work both challenging and rewarding. As a High Volume Manufacturing (HVM) Node Development Product Engineer, you will play a central role in introducing new DRAM nodes into production at the ID1 fab. This role connects development to manufacturing—owning yield ramp, cost efficiency, and quality improvements. You’ll collaborate cross-functionally to solve complex problems, improve product performance, and ensure successful technology transfer at scale. Responsibilities: Lead new node startup, qualification, yield ramp, and production readiness Guide development teams on process integration using deep technical insight Analyze yield data and electrical failures to drive measurable improvements Partner with Design, TD, Quality, and Test teams to resolve yield and performance issues Use statistical tools and lab analysis to identify root causes and optimize processes Minimum Qualifications: Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field Familiarity with DRAM architecture, operation, testing, and process integration Understanding of CMOS fundamentals and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Design Technology Co-Optimization (DTCO) team works at the intersection of process technology, standard cell architecture, and design implementation to optimize power, performance, and area (PPA) for advanced memory products. The team collaborates closely with standard cell library, RTL, and physical design engineers to evaluate design tradeoffs and develop methodologies that improve silicon outcomes. As a DTCO Intern, you will gain hands-on experience assessing and optimizing PPA at the standard cell and logic block level. You will use industry-standard place-and-route tools and AI-enabled automation techniques to implement, benchmark, and optimize logic blocks while developing practical skills in physical design, timing closure, and design analysis. Responsibilities Implement standard cell logic blocks using industry-standard physical design tools, including floorplanning, placement, clock tree synthesis (CTS), routing, and optimization activities focused on PPA assessment. Analyze and benchmark power, performance, and area across standard cell libraries and logic block configurations, identifying opportunities for improvement. Perform static timing analysis (STA), investigate setup and hold timing violations, and support timing closure activities. Execute physical verification checks, including DRC, LVS, and IR-drop analysis, and assist with resolving design issues. Leverage Generative AI, AI Assistants, and Agentic AI solutions to automate data collection, reporting, comparison, and w

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Introduction The Systems Integration Group (SIG) develops advanced test solutions that support semiconductor manufacturing and product quality. The team partners across engineering, operations, procurement, and external suppliers to design, build, and deploy innovative hardware platforms that enable reliable testing and validation of semiconductor devices. Join the team building semiconductor memory test platforms for tomorrow’s AI infrastructure. Position Overview As an Electrical Design Engineer, you will design and develop electronic hardware used in advanced semiconductor test systems. You will apply electrical engineering principles to create analog, digital, and mixed-signal solutions that support manufacturing and product development. This role spans the full hardware development lifecycle, from concept and design through validation, deployment, and sustaining support. You will collaborate with cross-functional teams around the world to deliver reliable, high-quality test solutions. Responsibilities Design analog, digital, and mixed-signal electronic circuits from concept through implementation and validation Evaluate and select electronic components to meet system performance, reliability, and cost objectives Develop schematics and collaborate with PCB designers to create optimized board layouts Perform circuit simulation, analysis, and design verification using industry-standard tools Debug, test, and val

About the Team OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI’s supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI. About the Role We're looking for an Optical Interconnect System Engineer to design, qualify, and deploy scalable optical connectivity for large-scale AI infrastructure. This role spans fiber-system architecture, optical-mechanical integration, validation, reliability, deployment, and serviceability. You will work with optical, mechanical, electrical, networking, manufacturing, reliability, and data-center teams to translate system needs into practical interconnect solutions. This is a hands-on role for someone who can connect design decisions with installation, qualification, troubleshooting, and long-term operational performance. In this role, you will: Define optical interconnect architectures and requirements across hardware platforms and rack-level systems. Design high-density fiber systems for performance, density, reliability, installation, and serviceability. Lead optical-mechanical integration and cross-functional design reviews. Develop test and qualification plans for optical components, modules, switching platforms, and integrated systems. Own optical loss budgets, routing guidelines, handling requirements, and serviceability criteria. Support system bring-up, deployment, troubleshooting, failure analysis, and reliability improvement. Create reusable design guidelines, interface requirements, and qualification methods. You might thrive in this role if you have: Core experience Experience desi