Ai Compiler Engineer in United States

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Design Verification Engineer to validate the System Management Controller (SMC) and enable seamless multi-chip integration. In this role, you will design and execute tests, build infrastructure, and debug issues across chiplet-based SoCs. You’ll have the opportunity to work with remote mentorship while contributing to the foundation of scalable multi-die systems. This role is hybrid, based out of Toronto, Ontario, Boston, MA or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Proficient in SystemVerilog, SV-UVM, Python, and C/C++ with strong verification skills. Experienced in writing test plans, building infrastructure, and debugging hardware/software flows. Comfortable working with remote mentorship and distributed teams. Familiar with AI-assisted tools like Copilot, Cursor, and Claude to accelerate verification. What We Need Develop and maintain SMC tests and supporting DV infrastructure. Write, execute, and track test plans for chiplet and multi-chip SoC designs. Use C/C++ to develop tests compiled, loaded, and executed directly on the DUT. Triage, analyze, and debug issues in clos

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Design Verification Engineer to contribute to the unit-level verification of our RISC-V CPU front end—including instruction fetch, branch prediction, and surrounding fetch control structures. As a key individual contributor within our front-end DV team, you will focus on building testbenches, generating stimulus, and developing checkers for complex microarchitectural scenarios. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Front-End Experience: Solid background verifying CPU front-end blocks—such as instruction fetch, branch predictors (BTB, TAGE, RAS), instruction caches/TLBs, or decode—using SystemVerilog, UVM, and C++. Unit-Level Focus: Hands-on experience building clean, controllable unit testbench environments with precise stimulus and checking. Reusable Design: Pragmatic approach to building transactors, predictors, and scoreboards that can be reused across verification levels. Collaborative Problem Solver: Comfortable working alongside RTL designers to trace and fix misspeculation, redirect, and edge-case fetch bugs. What We Need Unit-Level Verifica

Join the MongoDB Server Query Optimization team, and help us build a world-class distributed open-source query optimizer. Our team plays a crucial role in the experience and performance of data processing. We are responsible for the MongoDB Query Language and the lifecycle of each query, through parsing, optimization and plan selection. We have a presence across the US and Europe including New York, Dublin, Seattle, Palo Alto, and Chicago. We support office-based and remote work and align projects with convenient work hours for each time zone. We have tons of interesting problems to solve with a direct impact on users for transactional, time-series, and analytical workloads. The team is endeavoring to systematically rewrite every major component of our optimization and execution systems. We need your help to design and build the heart of a distributed, flexible schema, document database. ​​This role can be based out of our US offices or remotely in the North America region. Candidate Profile 10+ years of experience in data management systems, distributed systems, or large-scale backend engineering Experience with building production-level code with a large user base, robust design structure and rigorous code quality Degree in Computer Science or similar field, or equivalent practical experience, with strong competencies in data structures, algorithms, and software design/architecture Experience with large code bases written in C++ or another systems programming language. You'll need to trace down defects, estimate work complexity, and design evolution and integration strategies as we rewrite different components of the system A strong foundation in core database internals is essential. While direct experience in query optimization is a massive bonus, it is not a prerequisite. We are also excited to meet candidates with strong backgrounds in compilers, language transpilers, or distributed storage systems Position Expectations Innovate in the area of flexible schema d

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent builds AI and RISC-V compute hardware that requires best-in-class design tools and intellectual property to compete globally. The Sr. Strategic Sourcing Manager, Engineering Infrastructure leads procurement strategy for the design ecosystem, owning vendor negotiations, IP licensing agreements, and tool sourcing that enable our worldwide engineering teams to innovate at speed. The role suits someone who takes ownership of complex, multidimensional deals, operates independently with minimal oversight, and commands credibility with vendor executives, internal stakeholders, and the C-suite. This role is hybrid or remote, based out of Santa Clara, CA; Austin, TX or Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A strategic negotiator with 5+ years of experience sourcing complex technology (IP, design tools, or semiconductor components) in fast-paced environments Someone who builds trust-based vendor relationships and leverages them to unlock better terms, faster delivery, and innovative solutions A detail-oriented operator who thrives managing multiple concurrent deals while maintaining executive visibility and cross-func

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a highly skilled and experienced Engineer to lead post-silicon power characterization and correlation activities for cutting-edge semiconductor products. In this role, you will be responsible for developing and executing detailed power measurement strategies on silicon, correlating results with pre-silicon models, and driving improvements across power architecture, design, and modeling methodologies. You will serve as a key technical leader, interfacing across design, architecture, validation, and systems teams to ensure silicon meets power and performance specifications under all operating conditions. This role is hybrid, based out of Toronto, ON or Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are A Principal-level engineer with 8+ years in silicon power analysis and characterization, and a Master’s or PhD in EE, CE, or related field. Deep understanding of digital and mixed-signal power domains, including DVFS, leakage vs. dynamic power, and power gating. Highly proficient in lab-based power measurement using oscilloscopes, current probes, power analyzers, and SMUs, plus Python/Perl/MATLAB

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. This role sits at the center of cutting-edge AI hardware development, keeping the servers, PCIe systems, and engineering infrastructure running that power next-generation compute. You’ll be hands-on with rapidly evolving prototype and production systems, installing, maintaining, and troubleshooting hardware in fast-paced R&D and data center environments. Acting as a critical bridge between hardware engineers, software teams, and IT, you’ll help ensure seamless access to the platforms that turn ideas into working silicon and systems. This role is onsite, based out of Toronto, Canada or Austin, Texas. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on hardware professional who enjoys building, maintaining, and troubleshooting complex computing systems. Comfortable working in fast-paced R&D environments where hardware, firmware, and software are constantly evolving. Knowledgeable in computer architecture, operating systems, and hardware diagnostics, with strong problem-solving skills. Collaborative, detail-oriented, and motivated to improve processes through documentation, scripting, and automation. What We Need Inst

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is building high-performance AI systems and the supply chain required to deliver them at scale. We are looking for a Global Supply Chain Manager to own OSAT partnerships, backend manufacturing execution, and supply continuity from wafer-out through final shipment. This role is based in Santa Clara, CA; Austin, TX, or Toronto, ON, with regular travel to Taiwan and other Asia-based partner sites, approximately 25-30%. Candidates should be located near one of these hubs and able to work effectively across North American and Asia-Pacific time zones. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Bring 7+ years of experience in semiconductor supply chain, manufacturing, or supplier management, along with a bachelor’s degree in Supply Chain, Engineering, or a related discipline. Have a strong understanding of OSAT workflows, including flip-chip, wire bond, and wafer-level packaging, with hands-on experience working with Taiwan-based OSAT partners. Are comfortable negotiating complex supplier agreements, pricing, tooling, or NRE costs and managing relationships across technical, commercial, and operational issues. Are a clear, direct, a

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we build open, state of the art compute for real workloads and real developers. You will own CPU core-level testbench development and verification, shaping how our out-of-order RISC-V CPUs behave in silicon. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You bring 8+ years in CPU verification, CPU testbench development, or closely related digital design. You have deep hands-on experience building and owning CPU core-level testbenches, not just using existing environments. You know high-performance out-of-order CPU microarchitecture in depth. You are comfortable developing testbench infrastructure in CVM methodology, with UVM experience as a strong plus. You work comfortably across RTL, waveforms, logs, regressions, and cross-functional debug with design, DV, emulation, and post-silicon teams. You are comfortable using AI-assisted verification workflows to improve debug, stimulus creation, and coverage analysis, while applying strong engineering judgment to validate results. What We Need Lead hands-on CPU core-level testbench development for hi

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. As a Director, Strategy & Solutions in our GTM team, this role defines how Tenstorrent shows up in the market for AI/ML workloads—from positioning and messaging to real customer solutions. Sitting at the intersection of product, sales, engineering, and marketing, this role turns deep technical capability into clear, compelling value across industries and use cases. This role is hybrid OR remote, based out of The United States. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced at connecting complex AI/ML systems to real customer outcomes and business value. Comfortable acting as a technical storyteller for developers, architects, and executive audiences. Naturally curious and forward-looking about customer workloads, competitive dynamics, and emerging AI trends. What We Need Ownership of GTM positioning and messaging for Tenstorrent’s AI hardware, software stack, and solutions. Development of application - and vertical-specific value propositions across enterprise, cloud, and regulated markets. Value proposition & GTM strategy, including creation of technical collateral (whitepapers, sales decks, benchmarks, dem

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a CPU Verification Fellow to lead verification strategy and execution for next-generation RISC-V high-performance processors. This role requires deep CPU verification expertise, strong microarchitecture understanding, and the ability to guide large engineering teams from early design through tapeout and post-silicon validation. The ideal candidate has verified complex out-of-order, speculative, superscalar CPUs and can define scalable methodology across simulation, formal verification, emulation, FPGA, and silicon bring-up. This role is hybrid, based out of Santa Clara, CA or Austin, TX. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have deep experience verifying high-performance superscalar CPUs, ideally including out-of-order and speculative processors. You have strong knowledge of RISC-V architecture, including ISA compliance, privileged architecture, virtual memory, atomics, vector extensions, and memory model behavior. You are highly proficient in SystemVerilog, UVM, constrained-random verification, assertions, functional coverage, and advanced debug methodologies. You have hands-on experience with CPU refere

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. As a Manager, Strategy & Solutions in our GTM team, this role defines how Tenstorrent shows up in the market for AI/ML workloads—from positioning and messaging to real customer solutions. Sitting at the intersection of product, sales, engineering, and marketing, this role turns deep technical capability into clear, compelling value across industries and use cases. This role is hybrid OR remote, based out of The United States. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced at connecting complex AI/ML systems to real customer outcomes and business value. Comfortable acting as a technical storyteller for developers, architects, and executive audiences. Naturally curious and forward-looking about customer workloads, competitive dynamics, and emerging AI trends. What We Need Ownership of GTM positioning and messaging for Tenstorrent’s AI hardware, software stack, and solutions. Development of application - and vertical-specific value propositions across enterprise, cloud, and regulated markets. Value proposition & GTM strategy, including creation of technical collateral (whitepapers, sales decks, benchmarks, demo

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking an experienced Project Manager to lead our ERP implementation and drive delivery across technical and business teams. In this role, you will bridge Solution Architects with stakeholders across Sales, Supply Chain, Finance, Trade, Infosec, and Engineering to keep the program aligned, accountable, and moving forward. This role is hybrid, based out of Santa Clara, CA, or Austin, TX. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An experienced project manager who has led complex ERP implementations, such as NetSuite or SAP. Skilled in project management methodologies and tools, including Jira and Asana. A strong interpersonal communicator who can influence, align, and mediate across technical and business teams. Able to synthesize complex technical discussions into clear, actionable reporting for varied stakeholders. What We Need Define project scope, milestones, deliverables, and governance for the ERP implementation. Manage external consultants, monitor adherence to statements of work, and drive accountability for delivery. Coordinate Sales, Supply Chain, Finance, Trade, Infosec, Engineering, Solution Architecture, and o

About the Team Codex is OpenAI’s first-party developer product focused on agentic software engineering. We’re building tools that help engineers design, write, test, and ship code faster—safely and at scale. We partner tightly with research and product to translate model advances into tangible developer productivity. About the Role As a Data Scientist on Codex, you will measure and accelerate product-market fit for AI developer tools. You’ll define what “developer productivity” means for our product, run experiments on new coding models and UX, and pinpoint where the model helps or hurts across languages and tasks. Your insights will directly shape how an entire industry builds software. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will Embed with the Codex product team to discover opportunities that improve developer outcomes and growth Design and interpret A/B tests and staged rollouts of new coding models and product features Define and operationalize metrics such as suggestion acceptance, edit distance, compile/test pass rates, task completion, latency, and session productivity Build dashboards and analyses that help the team self-serve answers to product questions (by language, framework, repo size, task type) Diagnose failure modes and partner with Research on targeted improvements (model quality signals, user feedback, evals) You might thrive in this role if you have 5+ years in a quantitative role at a developer-facing or high-growth product Fluency in SQL and Python; comfort with experiment design and causal inference Experience defining product metrics tied to user value Ability to communicate clearly with PM, Eng, and Design—and to influence product direction You could be an especially great fit if you have Strong programming background; ability to prototype, run simulations, and reason about code quality Familiarity with IDE/extensi

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Our Tensix Team is building the next generation of high-performance AI compute systems. We’re looking for a Power Architect to drive architectural strategy, modeling, and design decisions that shape how power is understood and optimized across our products. This is a hands-on role with massive influence over how we build power-aware systems from the ground up. This role is hybrid, based out of Santa Clara, CA, Boston, MA, Austin, TX or Toronto. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are 15+ years experience with power estimation tools like PowerArtist, PtPX, RTL Architect, and PrimePower. Skilled in modeling and optimizing power at the architectural level, with deep knowledge of power-gating, voltage domains, and leakage control. Track record of influencing architectural and micro-architectural changes that meaningfully reduced design power. Proficient in Verilog HDL, Design Compiler, C/C++ and Python. Background in power-optimization of compute datapath and/or interconnects. What We Need Predict power consumption early in architecture and track it through RTL evolution. Propose architectural changes for power optimization across server and non-

About the Team Security is at the foundation of OpenAI’s mission to ensure that artificial general intelligence benefits all of humanity. The Security team protects OpenAI’s technology, people, and products. We are technical in what we build but are operational in how we do our work, and are committed to supporting all products and research at OpenAI. Our Security team tenets include: prioritizing for impact, enabling researchers, preparing for future transformative technologies, and engaging a robust security culture. About the Role Trusted Computing and Cryptography is a core security team at OpenAI focused on deploying high-performance cryptography at scale, secure key management, and trusted hardware enclaves—from boot measurements to GPU confidential computation. As a Hardware Platform Security Architect, you’ll own hardware platform security at OpenAI. In this role, you will: Co-Architect Secure Silicon: Collaborate with cross-functional silicon teams (Silicon Design, DV, FW) and silicon partners (silicon test facilities, foundries) to develop secure silicon that meets the end-to-end system requirements. Co-Architect Secure Hardware: Collaborate with hardware vendors and cross-functional teams (kernel, compiler, infra) to design secure hardware that meets performance and security needs. Co-Architect Secure Systems: Architect and deploy systems using TPM2, Secure Boot, Nitro Enclaves, Intel SGX, AMD-SEV, and other secure hardware technologies. Drive Innovation: Engage with internal and external partners to align hardware innovations with OpenAI’s trusted computing and cryptographic requirements. You might thrive in this role if you have: 10+ years of industry experience in hardware security or hardware–software co-design. Proven expertise in deploying secure hardware systems at scale and integrating secure hardware primitives. Strong coding skills in Rust and/or C/C++, with proficiency in Python. Proven ability to collaborate across teams, architect solutions,