Engineer Ip Verification in United States

Leidos has an exciting opportunity for a Sr. DevOps Engineer in our Intel Security Sector's Analysis Solutions Business Area . Our talented team is at the forefront in Security Engineering, Computer Network Operations (CNO), Mission Software, Analytical Methods and Modeling, Signals Intelligence (SIGINT), and Cryptographic Key Management. At Leidos , we offer competitive benefits , including Paid Time Off, 11 paid Holidays, 401K with a 6% company match and immediate vesting, Flexible Schedules, Discounted Stock Purchase Plans, Technical Upskilling, Education and Training Support, Parental Paid Leave, and much more. Join us and make a difference in National Security! Job Summary This DevOps Engineer role provides mission critical system support to our customer. You will closely work with the Development team as well as other technology stakeholders to maintain, develop and support IC enterprise products – legacy and new products – in an Agile SAFe environment. The role will also work collaboratively with software engineering to deploy and operate systems. Additionally, this role will help automate and streamline operations and processes; as well as build and maintain tools for deployment, monitoring and operations, and troubleshoot and resolve issues in dev, test, and production environments. Primary Responsibilities: Supports software deployments, cloud infrastructure baselines, and operational availability of production systems. Managing, building, configuring, administering, operating and maintaining all components that comprise the DevOps environment. Defining enterprise Continuous Integration/Continuous Deployment processes and best practices Codifying DevOps best practices across the enterprise Developing and maintaining scripts to automate tool deployment to an AWS cloud environment and other tasks. Scripting and

Leidos has an exciting opportunity for a Sr. Software Engineer in our Intel Security Sector's Analysis Solutions Business Area . Our talented team is at the forefront in Security Engineering, Computer Network Operations (CNO), Mission Software, Analytical Methods and Modeling, Signals Intelligence (SIGINT), and Cryptographic Key Management. At Leidos , we offer competitive benefits , including Paid Time Off, 11 paid Holidays, 401K with a 6% company match and immediate vesting, Flexible Schedules, Discounted Stock Purchase Plans, Technical Upskilling, Education and Training Support, Parental Paid Leave, and much more. Join us and make a difference in National Security! Job Summary As a Software Engineer on this program, you will have the opportunity to build strong systems, software, and cloud environments while providing operations and maintenance for critical systems. This role will provide technical expertise in the design, development, implementation and testing of customer tools and applications. Based in a DevOps framework, this role participates in and/or directs major deliverables of projects through all aspects of the software development lifecycle including scope and work estimation, architecture and design, coding and unit testing. Primary Responsibilities: Participates in and/or directs software programming initiatives using Java, JavaScript, Python, SpringBoot, and Hibernate. Develops software system validation and testing methods using Junit and Katalon and uses integrated custom developed software solutions to leverage automated deployment technologies Develop, prototype and deploy solutions within Commercial Cloud Solutions leveraging infrastructure platform services Coordinate closely with team members, Product Owners and Scrum Masters to ensure User Story alignment and implementation to customer use cases Support th

Careers that change lives start here. Medtronic is a global leader in healthcare technology with a Mission to alleviate pain, restore health, and extend life. Our 95,000 employees work across more than 150 countries to put patients first — developing innovative medical technologies that improve the lives of 72+ million patients each year. Your unique talents will help shape the future of healthcare while building a career grounded in purpose, growth, and impact. A Day in the Life A career at Medtronic is like no other. We’re purposeful. We’re committed. And we’re driven by our Mission to alleviate pain, restore health and extend life for millions of people worldwide. The Sr. Manufacturing Engineer is responsible for leading and supporting manufacturing process development, optimization, and continuous improvement efforts to ensure safe, efficient, and high-quality production. This role provides technical expertise for process design, equipment implementation, troubleshooting, and validation while partnering cross-functionally with Operations, Quality, Supply Chain, and R&D to drive manufacturing excellence. The Sr. Manufacturing Engineer serves as a subject matter expert and technical leader, helping to improve productivity, reduce cost, enhance product quality, and support new product introductions and manufacturing scale-up. The role also evaluates and implements process improvements, advanced technologies, and engineering solutions that strengthen operational performance and compliance. Responsibilities may include the following and other duties may be assigned. Designs manufacturing processes, procedures and production layouts for assemblies, equipment installation, processing, machining and material handling. Designs arrangement of machines within plant facilities to ensure most efficient a

Careers that change lives start here. Medtronic is a global leader in healthcare technology with a Mission to alleviate pain, restore health, and extend life. Our 95,000 employees work across more than 150 countries to put patients first — developing innovative medical technologies that improve the lives of 72+ million patients each year. Your unique talents will help shape the future of healthcare while building a career grounded in purpose, growth, and impact. A Day in the Life A career at Medtronic is like no other. We’re purposeful. We’re committed. And we’re driven by our Mission to alleviate pain, restore health and extend life for millions of people worldwide. A Sr. Process Engineer is responsible for developing, optimizing, and maintaining manufacturing processes to ensure efficient, safe, and high‑quality production. This role focuses on improving process performance, reducing waste, and supporting continuous improvement initiatives across manufacturing operations. Key responsibilities typically include analyzing production workflows, implementing process improvements, troubleshooting manufacturing issues, and collaborating with cross‑functional teams such as quality, operations, and supply chain. The engineer also develops process documentation, validates new equipment or processes, and ensures compliance with regulatory and safety standards. The position requires strong analytical and problem‑solving skills, knowledge of manufacturing methods and quality systems, and the ability to use data to drive operational improvements. Manufacturing Process Engineers play a critical role in increasing productivity, maintaining product quality, and supporting scalable manufacturing operations. Responsibilities may include the following and other duties may be assigned. Provides technical and sustaining en

About Pinterest: Millions of people around the world come to our platform to find creative ideas, dream about new possibilities and plan for memories that will last a lifetime. At Pinterest, we’re on a mission to bring everyone the inspiration to create a life they love, and that starts with the people behind the product. Discover a career where you ignite innovation for millions, transform passion into growth opportunities, celebrate each other’s unique experiences and embrace the flexibility to do your best work. Creating a career you love? It’s Possible. At Pinterest, AI isn't just a feature, it's a powerful partner that augments our creativity and amplifies our impact, and we’re looking for candidates who are excited to be a part of that. To get a complete picture of your experience and abilities, we’ll explore your foundational skills and how you collaborate with AI. Through our interview process, what matters most is that you can always explain your approach, showing us not just what you know, but how you think. You can read more about our AI interview philosophy and how we use AI in our recruiting process here . At Pinterest, we’re seeking curious, versatile Web Engineers to join our Product Engineering teams. You’ll work closely with product managers, designers, and backend engineers to continuously push the boundaries of what’s possible on the web—delivering delightful, cutting-edge experiences for millions of Pinners around the world. This is your opportunity to shape the future of inspiration—bringing bold product ideas to life, owning projects end to end, and driving innovations that empower both our users and fellow engineers. If you love solving complex problems, embrace new technologies, and care deeply about user experience, we’d love to have you onboard. What you’ll do: Build for Impact: Create and launch powerful, user-facing features for Desktop and Mobile Web that help spark creativity and inspire our global community. Full Product Ow

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Our diverse team of technologists have developed a high performance RISC-V-based CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to build and run the performance infrastructure shared by our RISC-V Software and RISC-V Performance teams. This is the plumbing that both teams' performance work stands on — benchmarking automation, data collection, and workload capture across silicon, FPGA/emulation platforms and performance models. You'll work across both teams, enabling performance and software engineers to spend their time on analysis and optimization instead of running experiments by hand. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Great at identifying problems and developing solutions, with a bias toward owning the systems you build. Enjoys building tools and optimizing workflows so other engineers can move faster. Strong Linux systems engineer, c

Who We Are Addepar is a global data and AI platform empowering investment professionals to turn complex financial information into actionable intelligence. Addepar unifies portfolio, market and client data in a total portfolio view and delivers AI-powered insights within investment and client workflows. More than 1,400 firms in nearly 60 countries use Addepar to manage and advise on nearly $9 trillion in assets. Its open platform integrates with nearly 650 software, data and consulting partners to power end-to-end investment operations across firms of all sizes and complexity. Addepar supports clients worldwide with offices in New York City, Salt Lake City, London, Edinburgh, Pune, Dubai, Geneva, Singapore and São Paulo. The Role The Advisor Experience team builds bespoke solutions for financial advisors to grow and sustain their business, starting with a new secure messaging experience. As a Senior Software Engineer with a frontend emphasis, you will be the primary owner of the team’s user interface layer — crafting modern, performant, and intuitive experiences that financial advisors rely on daily. You will lead frontend architecture decisions, build and maintain component systems, and collaborate closely with Product Design to translate complex advisor workflows into elegant, accessible interfaces. While your primary impact will be on the frontend, you will work across the full stack as needed to deliver complete features and integrate with backend services and APIs. Applicants must be legally authorized to work in the United States for any employer without requiring current or future visa sponsorship (for example, employment-based visas such as H-1B , F-1 /OPT, or similar), and must be authorized to begin work in the U.S. on their first day of employment. What You’ll Do Lead frontend development for the Advisor Experience Secure Messaging product, building rich, performant user interfaces using modern web frameworks. Design and maintain scalable frontend a

This is where your work makes a difference. At Baxter, we believe every person—regardless of who they are or where they are from—deserves a chance to live a healthy life. It was our founding belief in 1931 and continues to be our guiding principle. We are redefining healthcare delivery to make a greater impact today, tomorrow, and beyond. Our Baxter colleagues are united by our Mission to Save and Sustain Lives. Together, our community is driven by a culture of courage, trust, and collaboration. Every individual is empowered to take ownership and make a meaningful impact. We strive for efficient and effective operations, and we hold each other accountable for delivering exceptional results. Here, you will find more than just a job—you will find purpose and pride. Your role at Baxter: Operational Excellence is responsible for leading site performance improvement initiatives through deployment of the Baxter Growth & Performance System (GPS). This role partners with manufacturing, engineering, quality, and support functions to drive sustainable improvements in Safety, Quality, Delivery, Cost, and People performance through Lean principles, Problem Solving, Value Stream Management, and Continuous Improvement methodologies. The position plays a key role in supporting site strategic priorities, improving operational performance, developing organizational capability, and driving a culture of continuous improvement. What we offer from Day One Medical, Dental and Vision coverage 160 hours of Paid Time Off and Paid Holidays 401K match Employee Stock Purchase Program Paid Parental Leave Tuition Reimbursement What you'll be doing: GPS Deployment & Continuous Improvement Lead and support deployment of GPS across manufacturing

Zscaler (NASDAQ: ZS) accelerates digital transformation so customers can be more agile, efficient, resilient, and secure. The Zscaler Zero Trust Exchange™️ platform protects thousands of customers from cyberattacks and data loss by securely connecting users, devices, and applications in any location. Distributed across 160+ public exchanges globally and thousands of private exchanges at the edge, the SASE-based Zero Trust Exchange is the world’s largest in-line cloud security platform. We believe the future of work is Human + AI and are building an AI-native enterprise where human potential is amplified by machine intelligence to solve the world’s hardest security challenges. Driven by deep customer obsession, we are committed to the mission, outcome, and to each other. We bring these commitments to life through three core behaviors: ownership and collaboration, trust through outcomes and impact, and a challenge culture with ongoing feedback. Ready to make an impact at the company pioneering security transformation in the AI era? Join us at Zscaler. Role We are looking for a Sr. Staff Software Development Engineer-AI Security to join our team. This is a Hybrid (based in San Jose, CA or Bellevue, WA with a 3 days in office requirement) role, reporting to the Director of Software Engineering in the Emerging Tech department. You will be responsible for designing and implementing core infrastructure components and distributed systems, serving as a foundational architect for our AI security solution. This high-impact role focuses on scaling security infrastructure to support hundreds of millions of users, collaborating with stakeholders across the development lifecycle to drive innovation and technical excellence. What you’ll do (Role Expectations) Architect, develop, and optimize a low-latency, high-throughput AI Security plane utilizing Rust, specifically leveraging its async/await model for highly efficient I/O and service-oriented architecture Build resi

Zscaler (NASDAQ: ZS) accelerates digital transformation so customers can be more agile, efficient, resilient, and secure. The Zscaler Zero Trust Exchange™️ platform protects thousands of customers from cyberattacks and data loss by securely connecting users, devices, and applications in any location. Distributed across 160+ public exchanges globally and thousands of private exchanges at the edge, the SASE-based Zero Trust Exchange is the world’s largest in-line cloud security platform. We believe the future of work is Human + AI and are building an AI-native enterprise where human potential is amplified by machine intelligence to solve the world’s hardest security challenges. Driven by deep customer obsession, we are committed to the mission, outcome, and to each other. We bring these commitments to life through three core behaviors: ownership and collaboration, trust through outcomes and impact, and a challenge culture with ongoing feedback. Ready to make an impact at the company pioneering security transformation in the AI era? Join us at Zscaler. Role We are looking for a Sr Production Engineer to join our team. This role is available as a hybrid opportunity 3 days a week in San Jose, CA or Bellevue, WA reporting to Production Engineering in the Cloud Infrastructure & Operations department. Join Zscaler to be a force multiplier for the reliability of a global platform processing 200+ billion transactions daily across tens of millions of enterprise users. In this role, you will provide the technical vision and hands-on execution to drive an "automation-first" culture across the company. By maturing our observability and architectural standards, you will directly reduce our Mean Time to Mitigate (MTTM) and shape the scalability of our globally distributed, multi-cloud infrastructure. What you’ll do (Role Expectations) Implement highly available, scalable infrastructure across AWS, GCP, and bare-metal environments Drive an "automation-first" c

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team to define and implement RTL for high-performance CPUs. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in CPU microarchitecture with expertise in Rename, Scheduler, ROB, Load Store, Branch Prediction, Cache or Datapath. Skilled in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation, synthesis, and power analysis. Proficient in debugging RTL/logic across multiple design hierarchies and pre/post-silicon environments. Background in microarchitecture definition, design specification, and performance-driven trade-off analysis. What We Need Own RTL design and microarchitecture development for a portion of a CPU block of a high-performance RISC-V CPU. Collaborate closely with DV, PD, and performance engineers to meet functional, timing, and power goals. Use innovative techniques to optimize power, performance, and

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Design Verification Engineer to lead pre-silicon verification of the Beowulf SoC, with focus on the Compute Subsystem (CSS), DDR memory subsystem, and Fabric NoC. This role will drive coverage, coherency, memory traffic, connectivity, error handling, and bring-up features critical to silicon success. This role is hybrid, based out of Boston, MA; Toronto, ON; or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Deeply curious about SoC architecture, compute systems, DDR behavior, and Fabric NoC/interconnect verification. Expert in UVM, SystemVerilog, coverage-driven verification, assertions, and subsystem-level debug. Experienced in verifying compute subsystems, DDR controllers and PHY-facing logic, NoC/interconnect protocols, coherency, ordering, and data movement. Comfortable with reset, power management, error handling, performance, and high-concurrency system scenarios. Proactive, detail-oriented, and effective in cross-functional technical discussions. Familiar with Python, C/C++, Tcl, CocoTB, or similar verification automation tools. What We Need Develop and own scalable verification environmen

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Sr. Staff Design Verification Engineer to lead end-to-end verification efforts for our advanced CPU and AI compute platforms. This role is ideal for seasoned engineers with deep expertise in CPU verification who excel at driving complex test plans to closure, mentoring teams, and leveraging modern AI tools to accelerate innovation. This role is hybrid, based out of Boston, Toronto, Ottawa or Santa Clara. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Proven track record leading end-to-end CPU verification across processor cores, caches, interconnects, interrupts, MMU/IOMMU, and cache coherency protocols, with multi-chip and emulation experience a plus. Expert in creating comprehensive test plans and building simulation testbenches using SV-UVM, C/DPI, and Cocotb. Skilled in managing high-volume regression execution, complex failure triage, and driving test plans and coverage metrics to closure. Experienced leader and mentor dedicated to guiding junior engineers and fostering verification best practices across teams. Proficient in leveraging modern AI tools like Copilot, Cursor, Claude, Gemini, and ChatGPT to optimize ver

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team to drive infrastructure for performance analysis, correlation and verification. You’ll work on a CPU based on RISC-V ISA, collaborating with core architects and RTL teams to deliver a highly efficient and performant design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Strong problem solver who can identify complex issues, develop practical solutions, and drive them through implementation. Enjoy building tools and improving the infrastructure, workflows, and methodologies that make CPU development more efficient. Skilled in C++ and Python, with experience using industry-standard compilation, simulation, and emulation tools. Experience with verification infrastructure and methodologies along with knowledge of high-performance CPU architecture and microarchitecture. Proficient in debugging RTL and logic across multiple design hierarchies and pre-silicon environments. What We Need Join a team driving improvements in CPU microarchitecture, verifying performance, and correlating results between RTL and the performance mode

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Curious about how cutting-edge hardware actually comes to life? We're looking for someone who’s excited to dive into the core of next-gen systems and help make them real. In this role, you’ll validate high-speed interfaces, solve complex system-level puzzles, and collaborate across teams to shape the future of AI/ML computing. If firmware, hardware, and hands-on debugging sound like your kind of fun — let’s chat! This role is hybrid and based in Vancouver, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You love bringing hardware to life and enjoy the thrill of solving tricky problems across the hardware–firmware boundary. You’re hands-on in the lab and comfortable with tools like oscilloscopes, protocol analyzers, and JTAG — digging deep doesn’t scare you. You’re comfortable jumping into unfamiliar problems and figuring things out — whether it’s in the lab or in firmware. You’re curious, collaborative, and excited to work on technology that pushes the boundaries of performance. What We Need Someone to take the lead in validating our next-gen PCIe interfaces — from controller to PHY, and everything in between. A strong co