Integration Engineer in United States

Job Details: Job Description: Ocotillo Technology Fabrication Yield is looking for Integration Technicians with a strong computing background and capabilities to support all Ocotillo Technology Fabrication platforms and beyond technologies. The candidate will work closely with a team of Integration Technicians to execute experiments/pilots, develop process flows and lot plans for new product introductions, and support taskforces. As a Process Integration and Yield Technician, you will play a critical role in Intel's high-tech manufacturing process, your contributions will directly impact Intel's innovation, enabling the delivery of advanced technologies that power the future of computing. This is an exciting opportunity to grow your technical expertise, work alongside engineering teams, and be part of a collaborative environment where your skills make a tangible difference. The Process Integration and Yield Technician will be responsible for but not limited to: Sustaining factory floors with lot plan/operation/route/process flow checks/rework/critical queue time edits, shipping errors, automation errors, process flow adjustments, wafer shipments, and scraps. Delivering lot plan owner training to the Ocotillo Technology Fabrication organization Collaborate with integration engineers to gather data needed for lot disposition Respond to and contain discrepant material in the fab Conduct engineering tests and detailed experimental testing to collect data or assist in research work related to integration, process, and yield. Provide pilot lot set up and cross site shipment support. Process change support and implementation via global flow changes, global route changes, and lot conversions The ideal candidate should exhibit the following behavioral traits: Self-starter an

Job Details: Job Description: Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans Intel's research divisions and partnerships with leading academic institutions worldwide. We are seeking an exceptional Quantum Interposer Design Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for physical design and integration of advanced packaging interposers within a multidisciplinary team. You'll play a crucial role in advancing Intel's silicon quantum dot technology while contributing to the development of scalable quantum systems that will revolutionize computing. Key Responsibilities - Physical design and integration of interposers used within advanced packaging for quantum computing - Work closely with stakeholders to meet design requirements - e.g., receive feedback from silicon testchip, signal integrity (SI), power integrity (PI), thermal simulation, and system integration engineers - Design validation and verification; including DRC and LVS - Deliver and disseminate design milestones to stakeholders - Communicate designs in presentations and relevant documentation - Stay current with the latest developments in packaging technology and design techniques by attending conferences and reading papers As

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we are transforming how the world uses information to enrich life through innovative memory and storage solutions. The DRAM Thin Films Process Engineering team develops advanced materials and deposition processes that enable future memory scaling, improved device performance, and next-generation semiconductor technology. Our team works at the forefront of process development to support DRAM technologies that power artificial intelligence, cloud computing, and data-intensive applications. As a DRAM Thin Films Process Engineering Intern, you will work alongside experienced engineers on a high-impact summer project focused on semiconductor process development and optimization. This role provides hands-on experience with experimental design, process characterization, data analysis, and multi-functional collaboration. You will contribute to real engineering challenges and present your results to technical and leadership audiences at the conclusion of the internship. Responsibilities Research and develop innovative solutions that support next-generation memory technology and thin film process advancement. Develop, complete, and analyze experiments to improve thin films process performance, manufacturability, and product quality. Apply statistical analysis, data science techniques, and AI-enabled tools to identify process trends, optimize performance, and accelerate engineering decision-making. Partner with process, equipment, and integration engineering teams to solve complex technic

Job Details: Job Description: Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans Intel's research divisions and partnerships with leading academic institutions worldwide. We are seeking an exceptional Quantum IC Substrate Package Layout Design Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for design of large form factor IC substrates within a multidisciplinary team. You'll play a crucial role in advancing Intel's silicon quantum dot technology while contributing to the development of scalable quantum systems that will revolutionize computing. Key Responsibilities - Design of IC substrates using Siemens Xpedition IC package design software - Work closely with stakeholders to meet design requirements - e.g., receive feedback from silicon testchip, signal integrity (SI), power integrity (PI), thermal simulation, and system integration engineers - Deliver and disseminate design milestones to stakeholders - Design validation and verification; including DRC and LVS - Advanced packaging design integration (2.5D and 3D) with IC substrate - Tapeout of designs with substrate suppliers in collaboration with Intel substrate teams - Communicate designs in presentations and relevant documentation - Stay curre

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Metrology Overlay Process Development Engineer you will be primarily responsible for starting up, developing, and optimizing the overlay metrology processes used for DRAM photolithography process flows. Overlay metrology is a critical need within the semiconductor industry, and in this position your responsibilities will include, but are not limited to: · Driving the understanding of new metrology technology and measurement techniques to ensure that our overlay measurement capabilities meet the precision, accuracy, and throughput required to meet our device overlay roadmaps · Partnering with metrology equipment vendors on continuous improvement of software/hardware and development of overlay techniques to support lithography process characterization, process optimization, and process control · Optimizing and maintaining the calibration of metrology systems that support our technology development · Working closely with process development and process integration engineers to optimize measurements for multiple device process flows and layer stacks · Developing applications on next generation processes and technologies within Fab 4 and qualification for tech

About the Team The Finance Platform & Technology team builds and scales the systems and data architecture that power OpenAI’s core financial operations. We enable business agility, compliance, and operational excellence across procure-to-pay, quote-to-cash, supply chain, financial planning, and asset management. We partner with Procurement, Accounting, Tax, Legal, Security, Data, and Engineering to modernize workflows through thoughtful platform design, reliable integrations, scalable automation, and trusted data. About the Role As a Business Systems Lead for Procure-to-Pay, you will be a hands-on engineer who designs, builds, and operates the integrations and first-party applications that power OpenAI’s procurement workflows. You will translate business needs into secure, scalable software, APIs, data flows, and automation across Oracle Fusion, Zip, and connected platforms. You will build the future of buying at OpenAI using OpenAI’s own technology, from guided intake and approval experiences to supplier onboarding, purchasing, receiving, invoicing, and downstream financial data flows. You will own the technical roadmap and support model for these capabilities, improving today’s platforms while deciding where to integrate, configure, or build as OpenAI scales. Your core strength will be software and integration engineering. You will personally write code, troubleshoot cross-system failures, and take solutions through testing, deployment, and production support. You will also make targeted functional configurations in procurement platforms and partner with functional specialists on deeper process and module design. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Design, build, and operate integrations across Oracle Fusion, Zip, and connected systems using APIs, events, messaging, and batch interfaces where appropriate. Build first-party

Job Details: Job Description: The Intel Logic Technology development (LTD) organizations delivers process technology innovation to drive Intel's product roadmap. We give you opportunities to transform technology and create a better future by delivering products that touch the lives of every person on earth. As a global leader in innovation and new technology, we foster a collaborative, supportive, and exciting environment where the brightest minds in the world come together to achieve exceptional results. We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs, and amenities, time off, recreational activities, discounts on various products and services, and many more creative perks that make Intel a Great Place to Work. As a Process Integration Development Engineer, you will play a pivotal role in advancing Intel's semiconductor process technologies within the Logic Technology Development (LTD) group. Your day-to-day involves designing, optimizing, and implementing integrated process solutions that drive Intel's next-generation technology. By leveraging your expertise in process integration, yield analysis, and data-driven problem solving, you will contribute directly to the seamless transition of emerging technologies from development to high-volume manufacturing, ensuring Intel remains at the forefront of semiconductor innovation. Job Responsibilities include but are not limited to: ​ LTD Semiconductor Senior Process Integration Development Engineers are responsible for leading scientific research enabling the manufacture of innovative device architectures but not limited to: Lead scientific research enabling the manufacture of innovative device architectures coupled with the realization of these architectures. <li

Job Details: Job Description: Join Intel and Build a Better Tomorrow What We Do The Intel Foundry Manufacturing Development and Customer Engineering (MDCE) and Logic Technology development (LTD) organizations delivers process technology innovation to drive Intel's product roadmap. What We Offer • We give you opportunities to transform technology and create a better future by delivering products that touch the lives of every person on earth • As a global leader in innovation and new technology, we foster a collaborative, supportive, and exciting environment where the brightest minds in the world come together to achieve exceptional results • We offer a competitive salary and financial benefits such as bonuses, life and disability insurance, opportunities to buy Intel stock at a discounted rate, and Intel stock awards (eligibility at the discretion of Intel Corporation) • We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs, and amenities, time off, recreational activities, discounts on various products and services, and many more creative perks that make Intel a Great Place to Work Benefits We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs, and amenities, time off, recreational activities, discounts on various products and services, and many more creative rewards that make Intel a Great Place to Work. Find more information about our amazing benefits here: Intel Benefits Key Responsibilities MDCE/LTD Semiconductor Senior Process Integration Development Engineers are responsible for leading scientific research enabling the manufacture

We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Position Summary CVS Health is seeking a Senior Varicent Integration & Platform Engineer with expertise in technical architecture and integration to join the Human Resources Technology team. This experienced and motivated professional will support Compensation business operations by delivering optimal, scalable technology solutions. As an integral member of the team responsible for the Varicent Sales Performance Management (SPM) platform, its integrations, and its technical architecture, this role will address the needs of Total Rewards and Human Resources business partners and stakeholders. The ideal candidate will combine deep technical and platform expertise with a demonstrated ability to collaborate with technical and non-technical partners. The role will provide essential support to the Compensation organization for sales incentive technology needs and will collaborate with HR Technology, Centers of Excellence (COEs), and HR Shared Services across all business segments. This individual will establish cross-functional relationships throughout HR Technology and Human Resources to ensure that solutions and initiatives are effectively designed and implemented, with colleague satisfaction as a key goal. Primary Responsibilities: Collaborate with business and technical partners to support the Varicent technical architecture and integration roadmap, including the e

Ship Suitability Engineer Company: The Boeing Company Boeing Defense, Space & Security (BDS) is seeking a Ship Suitability Engineer (Level 5) to support the Systems Engineering Integration & Test ( SEIT) Team in Berkeley, MO . Located within the BDS Air Dominance Systems Engineering core group in St Louis, Missouri supporting the Ship Suitability functions in the core and across individual programs. The candidate will support core efforts in development and maintenance processes and tools and will act as the “user/customer advocate” on naval programs to instill operational quality in Boeing’s products. The candidate will collaborate with Boeing Integrated Product Teams and the maritime customer, working to inform integration into the shipboard environment including approaches to launch and recovery, deck handling, communication modes with the ship, and shipboard qualification testing. The candidate will support engineering and test efforts on programs at the systems level by analyzing designs, participating in trade studies, designing/developing concepts, and assisting with drafting and executing test plans for air ship integration of weapons systems. The candidate will also lead and support training efforts to educate Boeing and customer engineers in naval aviation operations, procedures, equipment and environments pertaining to ship suitability. Training efforts may include, but are not limited to, classroom training at Boeing facilities and leading groups of engineers aboard ships at sea and land-based facilities. Position Responsibilities Applies an interdisciplinary, collaborative approach to lead activities to plan, design, develop and verify complex lifecycle balanced system of

Lead Electrophysics Engineer Company: The Boeing Company Boeing Defense Space & Security (BDS) is seeking highly motivated Lead Electrophysics Engineer (Level 5) to support various programs located in Huntington Beach, CA, Seal Beach, CA , or El Segundo, CA . As a part of one or more Systems Engineering Integration & Test (SEIT) teams, you will provide technical engineering and program support, while serving as the core point of contact between your payload products and the broader system team. In this role you will serve as the technical owner for a range of RF related payload products, with an emphasis on system performance, integration, supplier technical management, and cross-organizational interface management. Your products will include both experimental and operational systems, extending through all lifecycle phases (early feasibility studies through operation and disposal). An ideal candidate will be highly motivated, with a strong technical background in RF and Radar systems, space environments, and RF payload integration onto air or space platforms. Position Responsibilities: Provide expertise over a broad range of radar related activities, including performance and trade studies of radar systems and architectures Oversee development and implementation of radar signal image processing techniques Perform system engineering and integration of Radar Warning Receivers (RWR) into various systems Developing Concept of Operations for the design and utilization of RF products Perform Mission Design and payload effectiveness analysis Lead technical teams, including subcontractors, to oversee hardware and processing

Senior Test & Evaluation Engineer (Test Program Req & Planning) Company: The Boeing Company Boeing Test & Evaluation (BT&E) organization is seeking a Senior Test & Evaluation Engineer (Test Program Req & Planning) to join our team in Oklahoma City, OK . This position supports a diverse portfolio of Boeing programs including the B-1, and B-52 sustainment and modernization programs. The Engineer is responsible for supporting the Test Program Manager (TPM) and other program leadership by leading the Ground Test/Flight Test (GT/FT) Integrated Product Teams (IPTs) and ensuring the integration of Boeing Test & Evaluation (BT&E) capabilities and resources to meet program commitments. This role requires close collaboration with program IPTs, Systems Engineering Integration & Test teams, Program Offices and external developmental test organizations Position Responsibilities: Develop, prepare, and coordinate comprehensive Program Integrated Test Plans (ITP), detailed Test & Evaluation (T&E) plans, and associated documentation including requirements traceability, verification metrics, and program requirements. Lead the development and standardization of test methods, procedures, and processes to ensure repeatability, productivity, and continuous improvement through lessons learned. Integrate BT&E capabilities and resources with other IPTs, Systems Engineering, government stakeholders, industry partners, suppliers, and customers to ensure seamless test execution and alignment with program objectives. Conduct testability assessments of engineering requirements and oversee disciplined cost, schedule, and configuration management to meet program baselines and commitment

F/A-18 Senior Systems Engineer Company: The Boeing Company Boeing Defense, Space & Security (BDS) is seeking a Senior Systems Engineer to join the F/A-18 Systems Engineering Integration and Test (SEIT) Team in Berkeley, MO . The Senior Systems Engineer is responsible for leading cross-functional integration to drive engineering excellence in the execution of our F/A-18 software development activities. The individual selected for this role will be primarily focused on the Technical Integration role for Software Development and Advanced Systems activities. Position Responsibilities Ensure Engineering Excellence: Responsible for leading integration across multiple engineering and program teams to ensure safety, technical excellence, and product integrity. Drives adherence to Boeing and program processes, setting high standards for quality and performance Systems Engineering Approach: Ensure an integrated systems engineering approach. Take ownership to manage requirements and ensure full traceability. Manage the configuration of the integrated system to ensure dependencies are well understood. Responsible for ensuring comprehensive certification and verification activities, demonstrating a commitment to excellence Build Strategic Partnerships: Develop and nurture strong relationships with the United States Navy (USN), engineering functions, and program management. Leverage these partnerships to enhance collaboration and drive program success Manage Technical Baseline: Oversees the technical baseline, including mission systems configuration, technical performance measures, architecture diagrams, and Risk Identification and Opportunity (RIO) assessments. Foster

At Lyft, our mission is to improve people’s lives with the world’s best transportation. To do this, we start with our own community by creating an open, inclusive, and diverse organization. Lyft connects people to transportation to change the way we live and get around our communities. We are looking for product leaders who bring exceptional creative and analytical skills to drive forward a best in class product. Product management at Lyft leads the integration of engineering, data science, and design to achieve the company’s vision for reinventing transportation. We are looking for entrepreneurial and passionate product leaders to innovate and execute across a rapidly growing, fast paced company and industry from our San Francisco and New York offices. The Safety & Customer Care (SCC) Product team builds the platforms, products, and experiences that support riders and drivers when they need help most — and help keep them safe every time they ride. As the Director of Product, Customer Care, you’ll lead a team of product managers driving Lyft’s customer care strategy end to end: AI-powered support across chat and voice, the contact center platforms our support teams run on, and the underlying data layer which is critical to understand where our products can be improved. It’s a rare chance to shape how a category-defining company delivers support at scale — across emerging AI capabilities, global expansion, autonomous vehicle partnerships, and new lines of business. Responsibilities: Own the vision, strategy, and multi-year roadmap for Lyft’s Customer Care product portfolio — spanning AI-driven support automation, contact center platforms, self-service and issue resolution, and the trust and safety products underpinning every interaction Lead, coach, and grow a team of product managers, setting a high bar for product craft, execution, and career development Partner with senior leaders across engineering, data science, design, operations, and finance to set priorit

What you’ll do Be the generalist EE for the scanner system: integration, bring-up, debugging, and making the electrical side of the device reliable and serviceable. Own ultrasound experimentations that feeds the image reconstruction team Design and execute experiment setups for transducer characterization (element sensitivity, bandwidth, cross-talk mapping, beam profile measurements) and ex vivo / phantom clinical testing. Acquire, process, and analyze RF and baseband signals for data quality assessment and benchmarking. Design simple boards and adapters as needed (monitoring, power/safety, interface/conditioning), and take them from prototype through a stable revision. Prototype quickly, then harden what works: wiring/harnessing, grounding, safety interlocks, and reliable integration across subsystems. Own practical test setups and documentation (fixtures, scripts, procedures) that make experiments repeatable and results comparable over time. What we’re looking for Strong hands-on EE background with experience building, debugging, and iterating on real systems in the lab. Solid understanding of signal processing fundamentals — knows what to measure, how to condition and digitize it, and how to evaluate signal quality in the context of an imaging system (SNR, bandwidth, dynamic range, artifacts). Comfortable spanning system integration + occasional design work (schematics/layout reviews or light PCB design) in a fast-moving environment. Ability to work at the boundary between hardware and algorithms: measure reality, communicate constraints, and help close gaps vs simulation. High agency and practicality: able to set up experiments, get trustworthy data, and unblock others on a lean team. Useful experience Analog/mixed-signal, or high-speed data capture experience; strong instincts for instrumentation and noise/debugging. Ultrasound or acoustic sensor handling: hydrophone calibration and field mapping, transducer impedance characterization, element-level sensitivity