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Lead Systems Integrator in United States

2,434 active opportunities · Updated October 2026

Explore current lead systems integrator jobs across United States. Filter by work mode, employment type, experience, department, date posted and distance.

C
📍 Irving Texas United States, United States
✓ High-confidence listingCompany trend +800%
Quick readStrong listing-quality and freshness signals

The Applications Development Technology Lead Analyst is a senior level position responsible for building robust, high-performance, large-scale applications. The overall objective of this role is to lead applications systems analysis and programming activities. Responsibilities: * Partner with multiple management teams to ensure appropriate integration of functions to meet goals as well as identify and define necessary system enhancements to deploy new products and process improvements * Resolve variety of high impact problems/projects through in-depth evaluation of complex business processes, system processes, and industry standards * Provide expertise in area and advanced knowledge of applications programming and ensure application design adheres to the overall architecture blueprint * Utilize advanced knowledge of system flow and develop standards for coding, testing, debugging, and implementation * Develop comprehensive knowledge of how areas of business, such as architecture and infrastructure, integrate to accomplish business goals * Provide in-depth analysis with interpretive thinking to define issues and develop innovative solutions * Serve as advisor or coach to mid-level developers and analysts, allocating work as necessary * Appropriately assess risk when business decisions are made, demonstrating particular consideration for the firm's reputation and safeguarding Citigroup, its clients and assets, by driving compliance with applicable laws, rules and regulations, adhering to Policy, applying sound ethical judgment regarding personal behavior, conduct and business practices, and escalating, managing and reporting control issues with transparency. Qualifications: * 5 to 8 years of relevant experience in Apps Development or systems analysis role * Extensive experience system analysis and in programming of software applications * Hands-on experience in

JavaReactDockerKubernetes
C
📍 Irving Texas United States, United States
✓ High-confidence listingCompany trend +800%
Quick readStrong listing-quality and freshness signals

The Applications Development Technology Lead Analyst is a senior level position responsible for building robust, high-performance, large-scale applications. The overall objective of this role is to lead applications systems analysis and programming activities. Responsibilities: * Partner with multiple management teams to ensure appropriate integration of functions to meet goals as well as identify and define necessary system enhancements to deploy new products and process improvements * Resolve variety of high impact problems/projects through in-depth evaluation of complex business processes, system processes, and industry standards * Provide expertise in area and advanced knowledge of applications programming and ensure application design adheres to the overall architecture blueprint * Utilize advanced knowledge of system flow and develop standards for coding, testing, debugging, and implementation * Develop comprehensive knowledge of how areas of business, such as architecture and infrastructure, integrate to accomplish business goals * Provide in-depth analysis with interpretive thinking to define issues and develop innovative solutions * Serve as advisor or coach to mid-level developers and analysts, allocating work as necessary * Appropriately assess risk when business decisions are made, demonstrating particular consideration for the firm's reputation and safeguarding Citigroup, its clients and assets, by driving compliance with applicable laws, rules and regulations, adhering to Policy, applying sound ethical judgment regarding personal behavior, conduct and business practices, and escalating, managing and reporting control issues with transparency. Qualifications: * 6 to 9 years of relevant experience in Apps Development or systems analysis role * Extensive experience system analysis and in programming of software applications * Hands-on experience in

JavaReactDockerKubernetes
C
📍 Irving Texas United States, United States
✓ High-confidence listingCompany trend +800%
Quick readStrong listing-quality and freshness signals

The Applications Development Technology Lead Analyst is a senior level position responsible for building robust, high-performance, large-scale applications. The overall objective of this role is to lead applications systems analysis and programming activities. Responsibilities: * Partner with multiple management teams to ensure appropriate integration of functions to meet goals as well as identify and define necessary system enhancements to deploy new products and process improvements * Resolve variety of high impact problems/projects through in-depth evaluation of complex business processes, system processes, and industry standards * Provide expertise in area and advanced knowledge of applications programming and ensure application design adheres to the overall architecture blueprint * Utilize advanced knowledge of system flow and develop standards for coding, testing, debugging, and implementation * Develop comprehensive knowledge of how areas of business, such as architecture and infrastructure, integrate to accomplish business goals * Provide in-depth analysis with interpretive thinking to define issues and develop innovative solutions * Serve as advisor or coach to mid-level developers and analysts, allocating work as necessary * Appropriately assess risk when business decisions are made, demonstrating particular consideration for the firm's reputation and safeguarding Citigroup, its clients and assets, by driving compliance with applicable laws, rules and regulations, adhering to Policy, applying sound ethical judgment regarding personal behavior, conduct and business practices, and escalating, managing and reporting control issues with transparency. Qualifications: * 5-8 years of relevant experience in Apps Development or systems analysis role * Extensive experience system analysis and in programming of software applications * Hands-on experience in We

JavaReactDockerKubernetes
O
📍 San Francisco, California, United States· Full-time· Remote
✓ High-confidence listingCompany trend -79.2%
Quick readStrong listing-quality and freshness signals

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for a Rack Power Engineer with deep expertise in high-power conversion and distribution to design, qualify, and support power systems for AI supercomputers. You will own rack power solutions—including power shelves, AC/DC rectifiers, power supply units (PSUs), power management controllers (PMCs), and high-current distribution—from requirements and supplier development through deployment. You will also monitor fleet rack power health, lead debugging and root-cause investigations, and drive improvements into hardware, firmware, and qualification coverage. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Own rack power architecture and requirements for high-power AI supercomputing systems, including power budgets, AC input interfaces, DC distribution, redundancy, efficiency, serviceability, and integration with data center infrastructure. Drive the design and supplier development of power shelves, rectifiers, PSUs, PMCs, busbars, connectors, and protection circuits. Review electrical designs and control behavior, and evaluate performance, cost, reliability, and availability trade-offs. Define and execute component, shelf, and rack qualification plans covering load transients, current sharing, hot-swap, startup and shutdown, redundancy failover, fault protection and recovery, thermal limits, and AC disturbances and ride-through

PythonArtificial IntelligenceAI
C
📍 Work At Home South Carolina, United States
✓ High-confidence listingCompany trend +340.2%
Quick readStrong listing-quality and freshness signals

We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Position Summary Join the CVS Mail Dispensing Applications Technology team as a Software Development Engineer, where you will play a key role in delivering innovative healthcare technology solutions that support automated mail-order pharmacy operations. This role is responsible for designing, developing, implementing, and supporting software applications that enable critical dispensing processes across multiple integrated systems, including prescription intake, inventory management, filling, scanning, sorting, packing, postage, and reporting. You will work in a collaborative, diverse, and fast-paced environment focused on operational excellence, continuous improvement, and high-quality software delivery. The ideal candidate will bring strong technical expertise, a proven ability to lead complex application development initiatives, and experience partnering with both internal and external teams to drive business outcomes. Responsibilities include: Develop and implement technical solutions for Dispensing Applications Technologies, ensuring adherence to established methodologies, standards, and guidelines. Analyze, design, code, test, debug, and document software applications supporting automated mail-order pharmacy operations. Lead the development and implementation of large-scale and complex application and process redesign/improvement initiatives across

AngularSQLAzureDocker
O
📍 San Francisco, California, United States· Full-time
✓ Quality checkedCompany trend -79.2%

About the Team Equity Administration at OpenAI is responsible for the operational foundation of our equity programs. Our team ensures equity data and reporting are reliable, our systems and integrations are resilient, and our processes and controls are built to scale globally. We work cross-functionally with Legal, Finance/Accounting, Payroll, Tax, People, and key vendors to uphold compliance requirements and enable equity strategy as the company evolves. About the Role We’re looking for an experienced Senior Manager, Global Equity Administration to lead the end-to-end equity program for a subsidiary, with a focus on high-quality execution, scalable processes, auditable controls, and reliable equity systems. You will be hands-on in day-to-day equity administration and help improve how we operate as we scale. You will report to the Head of Equity Administration and partner closely with Legal, Equity Programs, Compensation, Tax, Payroll, and Finance to ensure equity operations are accurate, timely, and employee-friendly. Location: This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Execute end-to-end employee equity administration across key lifecycle events (new grants, vesting/RSU releases, option exercises, and related transactions). Run recurring operational cycles by managing timelines, checklists, stakeholder inputs, and issue resolution. Produce audit-ready equity reporting and support accounting, compliance, and reporting needs with accurate, well-documented data. Build and maintain automated reporting (scheduled reports, dashboards, reconciliations) to reduce manual effort and improve speed and accuracy. Support equity system operations (Shareworks or comparable) including troubleshooting, configuration updates, permissions, report builds, and workflow maintenance. Partner with Internal Controls to keep process documentation, narratives,

AWSRestAIRust
O
📍 San Francisco, California, United States· Full-time
✓ Quality checkedCompany trend -79.2%

About the Team: OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. Role Overview We are seeking a Package Reliability Engineer to lead reliability engineering for advanced packages used in high-performance AI and computing systems. The primary focus of this role is to assess package level mechanical and thermal reliability risks and apply thermal and mechanical modeling to optimize package design, material selection, and assembly processes. The engineer will also develop reliability test plans with external partners, identify failure mechanisms, perform root-cause analysis, and recommend practical corrective actions. In this role, you will assess package reliability risks from early architecture development through product qualification and high-volume manufacturing. You will work closely with package design, silicon design, system engineering, manufacturing, and ASIC partners to predict package behavior, develop qualification strategies, resolve reliability issues, and improve overall package robustness and lifetime. In this role you will: Lead reliability test plan and assessments for advanced HPC packages, including risk identification, potential failure-mechanism analysis, root-cause investigation, mitigation planning, and corrective-action development. Drive reliability-focused package design optimization based on thermo-mechanical modeling to improve package reliability, power integrity, thermal performance, mechanical robustness, and platform scalability. Develop, validate, and apply package reliability models and lifetime-prediction

RedisAWSRestAI
O
📍 San Francisco, California, United States· Full-time
✓ Quality checkedCompany trend -79.2%

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role OpenAI's Hardware organization builds supercompute platforms from silicon and boards to full rack-scale systems to power advanced AI workloads. This role owns end-to-end quality for high-speed interconnect hardware across the product lifecycle: early design influence, supplier/contract manufacturer readiness, qualification, ramp, and fleet quality in lab and data center environments. You will be the quality lead for advanced interconnect components and assemblies, including high-speed copper cables, cable cartridges, patch panels, backplane/cable-backplane solutions, high-speed connectors, and related electro-mechanical interfaces. You will partner closely with electrical, mechanical, SI/PI, systems, reliability, operations, and external vendors to prevent escapes and drive rapid, data-driven containment and corrective action. In this role you will: Own quality for advanced interconnect components and assemblies: high-speed connectors, high-speed copper cables, cable cartridges (e.g., cable cassette style assemblies), patch panels & optics, and backplane/cable-backplane interconnect solutions. Drive quality-by-design: participate in design reviews, DFM/DFx, tolerance stacks, material and plating selections, connector mating strategy, strain relief, and assembly methods to reduce variation and field failures. Define and track quality and reliability metrics (DPPM, yield, escapes, RMA/FRACAS trends, Cpk/Ppk where applicable) for interconnects across NPI and m

AWSRestAIRust
O
📍 San Francisco, California, United States· Full-time
✓ Quality checkedCompany trend -79.2%

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for signal integrity (SI) system design engineers who have a deep expertise in the SI area, and hold strong system level design knowledge This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Lead system signal integrity (SI) design for AI supercomputer product in the data center application. Collaborate with chip, package, boards, rack and system engineers, design partners to drive system SI design and develop innovative interconnect and high-speed technologies Identify and evaluate new technologies and methodologies to improve signal and power integrity in product design, and contribute to the development of new products and technology by providing expertise in signal integrity Perform simulation and modeling to identify and troubleshoot signal integrity issues Lead system interconnect design, bring up and qualification As the scope of the role and team grows, understand and influence roadmaps for hardware partners for our datacenter networks, racks, and buildings. You might thrive in this role if you: Have at least 10 years of industry experience, including experience design hardware system and SerDes testing for data center applications Have a strong bias toward action, and won’t take no for an answer. Have experience and good knowledge of system design experience in the SI areas, from chip, SerDes, board, rack level Have ex

AWSRestAIGo
O
📍 San Francisco, California, United States· Full-time
✓ Quality checkedCompany trend -79.2%

About the team: OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the role: We are seeking an experienced Optical Network Engineer to lead Laser related work within our optical interconnect efforts for large-scale compute systems. The role also requires broad, hands-on optical validation experience across IM/DD-based interconnects, working from lab characterization through production readiness and scaled deployment. In this role you will: Drive laser-focused requirements and technical direction within the broader optical interconnect roadmap. Lead evaluation and validation of optical components and subsystems, including laser-based elements, in lab and production-representative environments. Support end-to-end optical testing for IM/DD interconnects (e.g., module/system bring-up, characterization, debug, and readiness for scale). Work with external partners to align on development milestones, performance targets, and quality expectations. Own technical issue triage and resolution across performance, reliability, and manufacturability topics. Collaborate across internal teams to support integration, rollout, and operational success at scale. You might thrive in this role if you have: Strong experience in laser-focused optical engineering (development, validation, manufacturing readiness, or field support). Broad hands-on background with IM/DD optical technologies and optical test/debug workflows. Experience working with external suppliers/manufacturing partners and production-oriented execution. Demonstrated ability to debug complex t

AWSRestAIRust
O
📍 San Francisco, California, United States· Full-time
✓ Quality checkedCompany trend -79.2%

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are seeking an experienced SoC Architect to lead the definition and development of next-generation custom AI silicon for edge deployments. This role will be responsible for shaping the architecture of highly efficient, high-performance SoCs optimized for machine learning inference and on-device intelligence. You will work cross-functionally with internal engineering teams and external ecosystem partners to translate product requirements into scalable silicon solutions, driving execution from concept through delivery. In this role you will: Define the architecture and technical roadmap for custom SoCs targeted for edge applications. Drive system-level tradeoff analysis across compute, memory, interconnect, power, thermal, and cost constraints. Architect energy-efficient ML compute subsystems optimized for inference workloads and real-world deployment environments. Collaborate with internal hardware, software, systems, and product teams to align architecture with platform needs. Partner with external silicon vendors, IP providers, and manufacturing partners to execute development plans. Lead hardware/software co-design efforts to maximize performance per watt and end-to-end system efficiency. Guide implementation teams through microarchitecture, RTL development, validation, and bring-up phases. Operate effectively in agile development environments and help teams deliver against aggressive schedules and milestones. You might thrive in this role if: Proven exper

AWSRestAgileMachine Learning
O
📍 San Francisco, California, United States· Full-time· Remote
✓ High-confidence listingCompany trend -79.2%
Quick readStrong listing-quality and freshness signals

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for a product manufacturing & quality engineer, who will be responsible for driving technical initiatives related to the manufacturing, quality and reliability of our AI supercomputer hardware systems to ensure product success from concept to launch and through mass production. You’ll have the opportunity to coordinate with functional SMEs and work with a wide range of stakeholders, from design engineering and operations teams, TPMs, external industry vendors and partners to ensure that all products are developed and delivered on time and to the highest quality standards. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees In this role, you will: Own the integrated manufacturing and quality readiness for a product across L6, L10, and L11, with clear gates, milestones, deliverables, owners, and closure criteria. Lead readiness of process flows, tooling, fixtures, assembly operations, test interfaces, and production controls. Review and contribute to work instructions. Translate product requirements into qualification plans, process controls, test requirements and acceptance criteria with design engineering and Area SMEs Coordinate and drive execution of product and process qualification, reliability testing, and validation with the relevant SMEs. Maintain traceable evidence that assigned products and processes meet agreed performance, reliability,

AWSRestAIRust
O
📍 San Francisco, California, United States· Full-time
✓ Quality checkedCompany trend -79.2%

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for a Product Manufacturing Engineer to drive manufacturing strategy and execution for next-generation AI hardware within the Silicon & Systems team, with a particular focus on PCBA manufacturing, assembly, process development, and production readiness. You will work closely with design engineering, systems engineering, operations, TPMs, contract manufacturers, suppliers, and other external partners to ensure new hardware products successfully transition from concept and prototype builds through NPI and high-volume production. You’ll own critical manufacturing initiatives, identify and resolve production risks, and help establish the processes and controls required to deliver complex hardware at scale. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Drive manufacturing and quality initiatives to ensure product success from concept and early development through NPI, production launch, and scale. Lead manufacturing process development for next-generation AI hardware systems, partnering closely with design engineering, systems engineering, operations, TPMs, suppliers, and manufacturing partners. Own PCBA manufacturing development and production readiness, including assembly processes, process validation, manufacturing test, rework, yield improvement, and successful transition into volume production. Establish NPI manufact

AWSRestAIRust
O
📍 San Francisco, California, United States· Full-time
✓ Quality checkedCompany trend -79.2%

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role As an AI Accelerator Systems Software Technical Program manager at OpenAI, you will help bring our chips/system hardware roadmap to life, navigating an array of technical and partnership challenges. We’re looking for people excited to push the frontiers of computing by navigating technical explorations and are passionate about building. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Manage the end-to-end software development from design to implementation for our AI acceleration systems, working across technical, cross-functional and external stakeholders Lead planning and scheduling of AI system software designs with our strategic partners and vendors Coordinate and lead internal resources and communication for efficient interaction with partners and vendors. You might thrive in this role if you: Have experience as a software technical program manager for data center system products (server, GPU, TPU, networking, storage and so on) taking products from concept to volume in a data center environment ensuring the systems scale with high quality Know end-to-end software development program management techniques from concept, design, production, deployment into the data center Want to help design some of the world’s largest supercomputing systems, working at the edge of complex hardware challenges Enjoy working with and enabling world-clas

AWSRestAIGo
O
📍 San Francisco, California, United States· Full-time
✓ Quality checkedCompany trend -79.2%

About the Role The Mechanical Commissioning Project Engineer owns mechanical commissioning planning, readiness, quality coordination, and test execution oversight for the project. This role ensures mechanical systems are installed, inspected, started, balanced, controlled, and tested in a way that supports reliable integrated facility performance. Reports to the Commissioning Project Lead and partners closely with mechanical contractors, equipment vendors, design/engineering teams, the electrical commissioning lead, controls stakeholders, and vendor field/test engineers. Key Responsibilities Develop and maintain the mechanical commissioning scope, readiness criteria, inspection strategy, and discipline test execution plan. Review mechanical design packages, specifications, submittals, method statements, controls narratives, sequence assumptions, and testing requirements for commissionability and risk. Coordinate mechanical QA/QC inspections with contractors and vendor field/test engineers, including installation checks, pre-functional readiness, deficiency capture, and closeout tracking. Own mechanical commissioning procedure development and review, including equipment startup, functional testing, controls verification, balancing prerequisites, failure mode validation, and integrated systems testing inputs. Coordinate with equipment vendors on factory/site acceptance requirements, startup support, test prerequisites, documentation packages, and vendor participation during critical tests. Support readiness and execution for cooling, ventilation, hydronic, pumping, heat rejection, controls, and other project-specific mechanical systems. Lead discipline-level review of mechanical test results, deficiencies, corrective actions, retest requirements, trend logs, and acceptance evidence. Maintain mechanical commissioning dashboards and status inputs for the Commissioning Project Lead, including risk items, resource needs, test readiness, and issue aging. Partner with the E

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