Phd Intern in United States

About the Team The Interpretability team studies internal representations of deep learning models. We are interested in using representations to understand model behavior, and in engineering models to have more understandable representations. We are particularly interested in applying our understanding to ensure the alignment of powerful AI systems. Our working style is collaborative and curiosity-driven. About the Role OpenAI is seeking a researcher passionate about understanding deep networks, with a strong background in engineering, quantitative reasoning, and the research process. You will develop and carry out a research plan in mechanistic interpretability, in close collaboration with a highly motivated team. You will play a critical role in helping OpenAI ensure future models remain safe even as they grow in capability. This will make a significant impact on our goal of building and deploying safe AGI. In this role, you will: Develop and publish research on techniques for understanding representations of deep networks. Engineer infrastructure for studying model internals at scale. Collaborate across teams to work on projects that OpenAI is uniquely suited to pursue. Guide research directions toward demonstrable usefulness and/or long-term scalability. You might thrive in this role if you: Are excited about OpenAI’s mission of ensuring AGI benefits all of humanity, and are aligned with OpenAI’s charter . Show enthusiasm for long-term AI safety & alignment, and have thought deeply about technical paths to safe AGI. Bring experience in the field of AI safety & alignment, mechanistic interpretability, or spiritually related disciplines. Hold a Ph.D. or have research experience in computer science, machine learning, or a related field. Thrive in environments involving large-scale AI systems, and are excited to make use of OpenAI’s unique resources in this area. Possess 2+ years of research engineering experience and proficiency in Python or similar languag

At NVIDIA, we are at the forefront of technological innovation, pushing the boundaries of AI and accelerated computing. Our team in Santa Clara, CA is looking for a Senior Software Engineer in Test to join us in this exciting journey. This is a ground breaking opportunity to work with powerful technology, collaborate with a world-class team, and make a significant impact in the industry. If you are passionate about AI and quality assurance, and thrive in a dynamic environment, this role is perfect for you! What you'll be doing: Accomplishing test cases to validate NVIDIA enterprise offerings, such as NIM, NeMo, and BioNeMo. Crafting, implementing, and maintaining automated test cases and supporting automation infrastructure. Collaborating with development teams to triage issues, perform root cause analysis, verify fixes, define additional tests, and improve test plans. Investigating and bringing to bear AI capabilities to accelerate the Quality Assurance (QA) process. What we need to see: MS or PhD degree in computer science or relevant field, or equivalent experience. At least 5&#43; years of professional experience in software testing. Proficiency in oral and written English. Comfort working with Linux OS. Strong skills in shell and Python programming. Strong knowledge of QA principles and background in software testing. Experience using AI development tools for crafting test plans, developing test cases, and automating test cases. Excellent problem-solving abilities. Strong interpersonal skills, quick learning ability, proactive approach, innovation, and dedication. Self-motivation and a passion for learning new hardcore technology. Knowledge in LLM and AI models is a plus. <

About the Team The Interpretability team studies internal representations of deep learning models. We are interested in using representations to understand model behavior, and in engineering models to have more understandable representations. We are particularly interested in applying our understanding to ensure the safety of powerful AI systems. Our working style is collaborative and curiosity-driven. About the Role OpenAI is seeking a researcher passionate about understanding deep networks, with a strong background in engineering, quantitative reasoning, and the research process. You will develop and carry out a research plan in mechanistic interpretability, in close collaboration with a highly motivated team. You will play a critical role in helping OpenAI ensure future models remain safe even as they grow in capability. This will make a significant impact on our goal of building and deploying safe AGI. In this role, you will: Develop and publish research on techniques for understanding representations of deep networks. Engineer infrastructure for studying model internals at scale. Collaborate across teams to work on projects that OpenAI is uniquely suited to pursue. Guide research directions toward demonstrable usefulness and/or long-term scalability. You might thrive in this role if you: Are excited about OpenAI’s mission of ensuring AGI benefits all of humanity, and are aligned with OpenAI’s charter . Show enthusiasm for long-term AI safety, and have thought deeply about technical paths to safe AGI. Bring experience in the field of AI safety, mechanistic interpretability, or spiritually related disciplines. Hold a Ph.D. or have research experience in computer science, machine learning, or a related field. Thrive in environments involving large-scale AI systems, and are excited to make use of OpenAI’s unique resources in this area. Possess 2+ years of research engineering experience and proficiency in Python or similar languages. Are deeply curious. About OpenA

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a highly skilled and experienced Engineer to lead post-silicon power characterization and correlation activities for cutting-edge semiconductor products. In this role, you will be responsible for developing and executing detailed power measurement strategies on silicon, correlating results with pre-silicon models, and driving improvements across power architecture, design, and modeling methodologies. You will serve as a key technical leader, interfacing across design, architecture, validation, and systems teams to ensure silicon meets power and performance specifications under all operating conditions. This role is hybrid, based out of Toronto, ON or Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are A Principal-level engineer with 8+ years in silicon power analysis and characterization, and a Master’s or PhD in EE, CE, or related field. Deep understanding of digital and mixed-signal power domains, including DVFS, leakage vs. dynamic power, and power gating. Highly proficient in lab-based power measurement using oscilloscopes, current probes, power analyzers, and SMUs, plus Python/Perl/MATLAB

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today. Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips. What you'll be doing: As a senior member in our team, you will work with pre-silicon and post-silicon data analytics - visualization, insights and modeling. Design and uphold sturdy data pipelines and ETL processes for the ingestion and processing of DFX Engineering data from various origins Lead engineering efforts by collaborating with cross-functional teams (execution, analytics, data science, product) to define data requirements and ensure data quality and consistency You will work on hard-to-solve problems in the Design For Test space which will involve application of algorithm design, using statistical tools to analyze and interpret complex datasets and explorations using Applied AI methods. In addition, you will help develop and deploy DFT methodologies for our next generation products using Gen AI solutions. You will also help mentor junior engineers on test designs and trade-offs including cost and quality. What we need to see: BSEE (or equivalent experience) with 5&#43;, MSEE with 3&#43;, or PhD wi

We are the GPU Communications Libraries and Networking team at NVIDIA. We deliver communication libraries like NCCL, NVSHMEM, UCX for Deep Learning and HPC. DL and HPC applications have a huge compute demand already and run on scales which go up to tens of thousands of GPUs. The GPUs are connected with high-speed interconnects (eg. NVLink, PCIe) within a node and with high-speed networking (eg. Infiniband, Ethernet) across the nodes. Communication performance between the GPUs has a direct impact on the end-to-end application performance; and the stakes are even higher at huge scales! We are looking for a technical leader to manage our NVSHMEM and UCX libraries. This is an outstanding opportunity to push the limits on the state-of-the-art and deliver platforms the world has never seen before. Are you ready for to contribute to the development of innovative technologies and help realize NVIDIA's vision? What you will be doing: Lead, mentor, and grow your library engineering team and be responsible for the planning and execution of projects as well as the quality, and performance of your libraries. This is a technical leadership role so you will participate in feature design and implementation. Interact with internal and external partners and researchers to understand their use cases and requirements. Collaborate with engineering teams, program and product management, and partners to define the product roadmap. Continuously review and identify improvement opportunities in established processes, infrastructure, and practices to ensure the teams are executing in the most efficient and transparent manner. What we need to see: 10&#43; overall years of experience in the software industry with specialization in HPC networking or system software. 4&#43; years of management experience. BS, MS, or Ph.D. in C

We are now looking for a Senior SRAM Engineer within our Full Custom Memory (FCM) team! The FCM team designs specialized RAM implementations across NVIDIAs wide array of processing chips. Be it high speed, low power, multiport, we engage closely with processor architecture teams to build custom solutions across the entire NVIDIA silicon portfolio. Are you interested in designing circuits for the next generation of AI chips? Join a team of dedicated engineers developing the custom SRAM circuits that help power these chips. What you'll be doing: Design best-in-class SRAM circuits using state-of-the-art technology processes Optimize circuits for performance, area, and power Collaborate with mask designers to craft high quality and dense pitch-matched layout Verify functionality, electrical integrity, and robustness Improve/develop flows and methodologies to streamline design automation, data collection, and analysis to ensure working silicon What we need to see: BS/MS/PhD (or equivalent experience) in Electrical or Computer Engineering Minimum 12 years of circuit design experience Strong understanding of SRAM and memory design techniques and macro/block development Ways to stand out from the crowd: Self-motivation, attention to detail, clear data analysis and presentation skills Familiarity with industry tools such as Cadence Virtuoso for schematic and layout, SPICE simulators, waveform viewers Background with developing and using various flows and methodologies, in

NVIDIA is leading the way in groundbreaking developments in Artificial Intelligence, High-Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables amazing creativity and discovery, and powers what were once science fiction inventions from artificial intelligence to autonomous cars. NVIDIA is looking for phenomenal people like you to help us accelerate the next wave of artificial intelligence. We are looking for a highly motivated senior software engineer for an exciting role in our communication libraries and network software team. The position will be part of a fast-paced crew that develops and maintains software for complex heterogeneous computing systems that power disruptive products in High Performance Computing and Deep Learning. What you will be doing: Design, implement and maintain highly-optimized communication runtimes for Deep Learning frameworks (e.g. NCCL for TensorFlow/Pytorch) and HPC programming interfaces (e.g. UCX for MPI/OpenSHMEM) on GPU clusters. Participating in and contributing to parallel programming interface specifications like MPI/OpenSHMEM. Design, implement and maintain system software that enables interactions among GPUs and interactions between GPUs and other system components. Creating proof-of-concepts to evaluate and motivate extensions in programming models, new designs in runtimes and new features in hardware. What we need to see: M.S./Ph.D. degree in CS/CE or equivalent experience. 5&#43; years of relevant experience. Excellent C/C&#43;&#43; programming and debugging skills. Strong experience with Linux. Expert understanding of computer syst

About the Team Our economics team is continuously working to improve our understanding of an AI-driven economy. About the Role We are seeking a highly technical Economist to join the OpenAI Economic Research team studying the real-world economic impacts of AI. This role is designed for economists with up to 5 years of professional experience post-Ph.D. who are interested in using novel, large-scale datasets to study how AI is reshaping economic systems. We are looking for candidates with deep expertise in at least one core domain relevant to AI’s economic impact, and an interest in contributing to a broader research agenda spanning labor markets, firm behavior, market dynamics, and macroeconomic change. This is an individual contributor role where the candidate will organize and execute on their own data-oriented projects. You will work at the intersection of economic research, data science, and public policy to produce rigorous empirical work that informs decision-makers across the public, industry, and government. Research Areas of Interest We are particularly interested in candidates with demonstrated expertise in one or more of the following areas: Economic Measurement of AI Impact (e.g., adoption trajectories, labor market transitions, productivity growth, and forecasting/scenario modeling for AI-driven economic change) Macroeconomic Implications of AI (e.g., productivity, technology diffusion, economic growth) AI and the Labor Market (e.g., employment, wages, job search, task-level impacts, skill acquisition) Applicants are not expected to have experience across all domains. We aim to build a team with complementary strengths across these areas. In this role, you will: Design and execute empirical research using large-scale observational or experimental data. Apply causal inference and/or structural modeling techniques to study AI-driven economic change. Collaborate with cross-functional teams to translate research questions into testable frameworks and applic

We are looking for a Senior Software Engineer to become part of our storage management plane team. The management plane is a web-based application crafted to provide our storage customers the capabilities to handle and supervise our distributed storage infrastructure. Our team is continually dedicated to acquiring and implementing ground breaking technologies to overcome obstacles and innovate solutions for improving our ability to handle large clusters of machines efficiently. What You Will Be Doing: Maintain and develop Kubernetes operators and our Container Storage Interface (CSI) plugin. Develop a web-based solution that manages, operates and monitors our distributed storage. Work closely with other teams to define and implement new APIs. What We Need to See: B.Sc., M.Sc. or Ph.D. in Computer Science, or related discipline, or equivalent experience. 8&#43; years of experience in web development ( both client and server ) Proven experience with Kubernetes (K8s), including developing or maintaining operators and/or CSI plugins. Experience scripting with Python, Bash or similar. Experience with nodejs is a must At least 5 years of experience working in a Linux OS environment You’re smart and a quick learner You do what it takes to get the job done Passionate about coding and big challenges Ways to stand out from the crowd: NodeJS for the server side: dominant modules are async & express . Kafka, MongoDB, K8s JavaScript frameworks: React, jQuery, c3j

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron Technology, we transform how the world uses information to enrich life for all. The Heterogeneous Integration Group (HIG) HBM Architecture team develops next-generation High-Bandwidth Memory (HBM) solutions that power AI, high-performance computing, cloud infrastructure, and advanced networking systems. The team works across architecture, design, verification, packaging, product engineering, and technology development to evaluate innovative memory architectures and deliver scalable, high-performance semiconductor solutions. As an HBM Design Architect, New College Graduate, you will contribute to the evaluation and development of future HBM and DRAM architectures. Working with experienced architects and engineering teams, you will analyze system and block-level design tradeoffs related to performance, power, area, thermal behavior, reliability, and manufacturability. This role provides an opportunity to leverage AI, Large Language Models (LLMs), and data-driven engineering methodologies to accelerate architecture exploration and improve decision-making. Responsibilities Analyze HBM and DRAM architectures using analytic

About the Role OpenAI’s Industrial Compute organization is responsible for ensuring our compute infrastructure scales efficiently to support millions of users and increasingly sophisticated AI models. We’re looking for a Data Scientist to partner closely with Capacity Systems Engineering, Infrastructure, Product, and Research to optimize inference capacity across our global GPU fleet. This role combines statistical modeling, large-scale data analysis, forecasting, and systems thinking to drive critical decisions around infrastructure investments, performance-efficiency trade-offs, and customer experience. You’ll transform complex operational data into actionable insights that directly influence how OpenAI allocates and scales one of the world’s largest AI compute environments. Key Responsibilities Build statistical and machine learning models to profile and improve GPU utilization, latency, throughput, and overall fleet efficiency. Develop forecasting models for inference demand across products, regions, and model families. Analyze production workloads to identify latency bottlenecks and capacity constraints, highlighting optimization opportunities. Partner with Capacity Systems Engineering to inform infrastructure planning and long-term GPU investment strategies. Design experiments and simulations to evaluate scheduling policies, serving strategies, and infrastructure tradeoffs. Build dashboards and operational metrics that enable leadership to make data-driven capacity decisions. Collaborate with Product, Research, Finance, and Infrastructure teams to align compute planning with business growth and model roadmaps. Communicate technical findings clearly to both engineering teams and executive leadership. Qualifications MS or PhD in Statistics, Computer Science, Operations Research, Applied Mathematics, Economics, or related quantitative discipline (or equivalent industry experience). 5+ years of experience working in the infrastructure data science space. Strong ex

Overview: The Data Acquisition team within the Foundations organization at OpenAI is responsible for all aspects of data collection to support our model training operations. Our team manages web crawling and GPTBot services and works closely with Data Processing, Architecture, and Scaling teams. We are looking for a skilled Software Engineer to join our Data Acquisition team. Responsibilities: Own and lead engineering projects in the area of data acquisition including web crawling, data ingestion, and search. Collaborate with other sub-teams, such as Data Processing, Architecture, and Scaling, to ensure smooth data flow and system operability. Work closely with the legal team to handle any compliance or data privacy-related matters. Develop and deploy highly scalable distributed systems capable of handling petabytes of data. Architect and implement algorithms for data indexing and search capabilities. Build and maintain backend services for data storage, including work with key-value databases and synchronization. Deploy solutions in a Kubernetes Infrastructure-as-Code environment and perform routine system checks. Conduct and analyze experiments on data to provide insights into system performance. Qualifications: BS/MS/PhD in Computer Science or a related field. 4+ years of industry experience in software development. Experience with large web crawlers a plus Strong expertise in large stateful distributed systems and data processing. Proficiency in Kubernetes, and Infrastructure-as-Code concepts. Willingness and enthusiasm for trying new approaches and technologies. Ability to handle multiple tasks and adapt to changing priorities. Strong communication skills, both written and verbal. About OpenAI OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an

NVIDIA’s Executive Briefing Center (EBC) Solutions Architect (SA) team is looking for a highly hands-on Solutions Architect with exemplary communication skills. The role involves developing, demonstrating (in the NVIDIA EBC), and packaging agentic AI systems. Partnering with account SAs you will co-develop proof of concepts (POC) and &#34;uplift&#34; their presentation quality to match the NVIDIA branding and messaging used with Executive meetings. This is a builder’s and presenter's role! You will spend time architecting and writing code. You will develop multi-agent systems, retrieval pipelines, and optimized inference stacks on NVIDIA’s full-stack accelerated computing platform. We want a creative, diligent, and curious engineer energized by agentic AI and ready to make significant change. If that’s you, join us! What you’ll be doing: Architect, build, and ship end-to-end Agentic AI applications for a variety of use cases—spanning multi-agent coordination, long-horizon reasoning, planning, and tool use. Act as Technical Advisor alongside fellow Subject Matter Experts (SME) in Executive Briefings. Creating and presenting demos that are used at Trade Shows or Customer Meetings. Partner with NVIDIA engineering, product, and sales teams to secure build wins, translate customer feedback into actionable product and roadmap insights, and scale global expertise through technical collateral, workshops, and developer communities. What we need to see: BS/MS/PhD in Computer Science, Electrical/Computer Engineering, Physics, Mathematics, AI/ML, or a related field (or equivalent experience) 2&#43; years as an ML/Software Engineer or Solutions Architect writing production-level code in Python and/or C/C&#43;&#43; in Linux environments. Validated experience building sophisticated agentic and multi-agent AI sy

The SCG Architecture team is hiring a Senior Power Integrity Co-Design Engineer to architect and deliver di/dt mitigation across silicon, package, board, and platform. This role bridges architecture, silicon, and platform — translating product noise targets into shipped specifications, and feeding silicon findings back into the next generation's build. Success in this role requires strong systems thinking and a willingness to accept ambiguity. It also requires the ability to apply AI as a force multiplier while maintaining rigorous engineering judgment. What you'll be doing: Architect voltage-noise mitigation across the full stack — silicon, package, board, platform — and own the codesign trade-offs between them. Co-design noise features with Speed, Power, Reliability, Circuit Design , Power-Arch, ASIC, and platform teams. You're the connective tissue across the codesign web. Work with other team members to define product-level voltage noise targets, drive them to closure, and sign them off at shipment. Build and take ownership of the Sim-to-Si correlation methodology for noise. You know when a model is lying and when silicon is. Model and prototype next-gen noise features — transient sense, droop response, mitigation IP, and codify them so every future program inherits them. Lead show-stopper noise bugs during bringup. The critical issues stop with you. Drive architecture-level codesign tradeoffs across V/F Power Noise Reliability Thermal (Noise-Variation) and (Noise-to-Closure) boundary work, where the highest-leverage innovation lives. What we need to see: BS / MS / PhD in EE, CE, or related (or equivalent experience). 5&#43; years in silicon power integrity, voltage noise, or PDN. Deep expertise in at least one of