Platform Architecture Manager in United States

We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. POSITION SUMMARY CVS Health is looking for hands-on, passionate people who want to join a high energy and growing team to make a difference in customers’ lives and who want to be on the forefront of digital innovation that aims to reinvent what a pharmacy and a health care company can be in the digital world. Currently, we are seeking a Staff Software Engineer – Search / AI who as a Senior technical leader, be responsible for driving architecture, design, and delivery of scalable, cloud-native platforms built on microservices architecture and AI capabilities. This role combines deep hands-on engineering with strategic leadership to build intelligent, distributed systems. The right candidate will be a strong analytical thinker and be able to simplify complex problems, processes or projects into component parts explore and evaluate them systematically. We love to collaborate and help each other and we want someone to share that ideology. Expectations for the Role Drive enterprise architecture and technical strategy with strong focus on microservices-based design and AI platform engineering Design and develop highly scalable microservices architectures, including APIs, domain-driven services, and event-driven systems Lead the development and integration of AI/ML solutions, including LLMs, Retrieval-Augmented Generation (RAG), and agentic frameworks Develop sc

We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Position Summary We are seeking a Software Development Engineer In Test, to apply advanced software engineering skills to improve quality across the development lifecycle through scalable test frameworks, developer tooling, and reusable automation solutions. This is a senior individual contributor role for a developer who specializes in testing, testability, and quality engineering. This role combines hands-on engineering with technical leadership across teams. The individual will influence architecture, strengthen automation strategy, improve developer feedback loops, and help establish consistent quality engineering practices that scale across products and platforms. The role carries strong Software Development Engineer in Test expectations, with an emphasis on building engineering solutions that improve product quality, platform reliability, and development velocity. Primary Responsibilities Design, develop, and evolve scalable test frameworks, automation libraries, and developer-facing quality tools Understand how the broader software ecosystem works together and define quality engineering approaches that align to platform strategy Partner with Product, Architecture, and Engineering teams to define test strategy, coverage goals, and acceptance criteria Build reusable utilities, harnesses, mocks, stubs, and data solutions that improve system

We are seeking an experienced Quantitative Developer to join our Markets Quantitative Analytics team, partnering closely with Quantitative Analysts, Traders, and Technology professionals to build the next generation of pricing, risk, and analytics platforms. This is a hands-on technical role for a highly skilled software engineer with a passion for quantitative finance. You will be responsible for designing and delivering high-performance, scalable solutions that support front office trading businesses across asset classes. The role offers the opportunity to work on complex quantitative challenges, modern engineering practices, and large-scale distributed systems while helping shape the strategic direction of Citi's quantitative technology platform. Successful candidates will combine strong software engineering expertise with an understanding of quantitative methodologies and financial markets, translating sophisticated mathematical models into robust, production-grade solutions. Key Responsibilities Design, develop, and maintain high-performance pricing, risk, and analytics libraries used across Global Markets. Partner with Quantitative Analysts to transform research models and prototypes into scalable, production-quality software. Build and optimize quantitative applications using modern C++ and Python, applying strong software architecture and engineering principles. Own the full software development lifecycle, including requirements gathering, design, implementation, testing, deployment, and ongoing support. Drive engineering excellence through CI/CD adoption, automated testing, code reviews, and software quality best practices. Develop and maintain market data platforms and data pipelines supporting analytics, pricing, and risk workflows. Work with infrastructure teams to leverage distributed computing, cloud technologies, and scalable arc

Our Purpose Mastercard powers economies and empowers people in 200+ countries and territories worldwide. Together with our customers, we’re helping build a sustainable economy where everyone can prosper. We support a wide range of digital payments choices, making transactions secure, simple, smart and accessible. Our technology and innovation, partnerships and networks combine to deliver a unique set of products and services that help people, businesses and governments realize their greatest potential. Title and Summary Principal Software Engineer Principal Software Engineer Position Overview The Principal Software Engineer is a senior individual contributor within Architecture & Technology (A&T), responsible for driving enterprise engineering strategy, architecture standards, and technology excellence across Mastercard. This role provides deep technical leadership across distributed systems, cloud-native platforms, resiliency, observability, and software engineering practices while influencing technology direction across multiple teams and domains. The Principal Engineer partners with senior engineering leaders, architects, and platform organizations to define architectural standards, establish reusable patterns, and guide critical technology decisions. Through technical expertise, thought leadership, and cross-functional influence, this role helps teams build secure, scalable, reliable, and operationally excellent solutions that align with Mastercard's long-term engineering strategy. Role • Provide technical leadership and architectural guidance across multiple engineering organizations, driving consistent adoption of engineering standards, best practices, and enterprise technology patterns. • Partner with platform CTOs, architects, and engineering leaders to evaluate technology investments, transformation initi

🚀 About WRITER WRITER is where the world's leading enterprises orchestrate AI-powered work. Our vision is to expand human capacity through superintelligence. And we're proving it's possible – through powerful, trustworthy AI that unites IT and business teams together to unlock enterprise-wide transformation. With WRITER's end-to-end platform, hundreds of companies like Mars, Marriott, Uber, and Vanguard are building and deploying AI agents that are grounded in their company's data and fueled by WRITER's enterprise-grade LLMs. Valued at $1.9B and backed by industry-leading investors including Premji Invest, Radical Ventures, and ICONIQ Growth, WRITER is rapidly cementing its position as the leader in enterprise generative AI. Founded in 2020 with office hubs in San Francisco, New York City, Seattle, Austin, Chicago, and London, our team thinks big and moves fast, and we're looking for smart, hardworking builders and scalers to join us on our journey to create a better future of work with AI. 📐 About the role Every company grows differently, and at WRITER, our growth is directly tied to empowering our users to create better content, faster, and at an unprecedented scale. As a strategic solutions architect, you'll be at the forefront of this mission, working directly with our largest and most strategic prospects to identify, validate, and build innovative agentic AI solutions that unlock massive business value. This isn't just about selling a product; it's about deeply understanding complex enterprise needs and architecting a future where AI transforms how our customers operate. You'll be instrumental in shaping how the world's leading companies adopt and scale AI, making a tangible impact on both their success and WRITER’s continued leadership in the enterprise generative AI space. This is a full-time, hybrid role based out of our Chicago hub. You will report directly to the Director, solutions architecture. 🦸🏻‍♀️ What you'll do Drive strategic technical discovery

Own the end-to-end execution that takes NVIDIA DRIVE Autonomous Driving Software (NDAS) from product definition to production deployment across major OEM vehicle lines. We are seeking an accomplished engineering execution leader to lead adaptation, integration, validation, and production readiness of NVIDIA Autonomous driving solution (NDAS) for strategic automotive OEMs. You will work between NVIDIA product and engineering teams and the OEM's vehicle, software, systems, and validation groups. The role involves converting an agreed feature set into a deliverable vehicle program. This entails clarifying requirements, coordinating interfaces and responsibilities, setting the engineering plan, building consistent productization workflows, and managing issue resolution. You will influence teams such as systems engineering, autonomous-driving development, platform software, functional safety, cybersecurity, quality, validation, release, and customer engineering. What You'll Be Doing: Lead NDAS execution with major OEMs across the full program lifecycle — from feature definition and technical alignment through vehicle integration, validation, launch, and production ramp — owning the coordinated engineering plan per vehicle line, including requirements, architecture, adaptation scope, achievements, staffing, validation strategy, release criteria, and production-readiness gates. Translate OEM vehicle requirements and use cases into clear commitments for NVIDIA teams, while ensuring OEM partners understand product capabilities, constraints, assumptions, and the work required on their side; build scalable, repeatable workflows for adapting NDAS to specific OEM platforms, vehicle architectures, sensor configurations, compute platforms, networks, and development processes. Drive multi-functional implementation across autonomous-driving features, systems, platform software, vehicle integratio

Our Purpose Mastercard powers economies and empowers people in 200+ countries and territories worldwide. Together with our customers, we’re helping build a sustainable economy where everyone can prosper. We support a wide range of digital payments choices, making transactions secure, simple, smart and accessible. Our technology and innovation, partnerships and networks combine to deliver a unique set of products and services that help people, businesses and governments realize their greatest potential. Title and Summary Vice President, Software Engineering Overview Decision Stream is Mastercard's next-generation AI-native decisioning platform, designed to power intelligent, real-time decisions across fraud, authentication, payments, and risk. Built with a startup mindset and enterprise-scale ambition, the platform combines innovation, speed, and engineering excellence to redefine decisioning across Mastercard's global ecosystem. We are seeking a visionary and hands-on VP of Software Engineering to help build and scale the platform. This leader will partner closely with Product, Architecture, AI, and Platform Engineering teams to drive technology strategy, architecture, engineering execution, and organizational growth. What You'll Do Lead Through Technical Excellence • Serve as a senior technology leader and role model for engineering teams. • Drive architecture, design, and technology decisions across distributed systems, streaming, AI, and cloud-native platforms. • Engage deeply with engineers, architects, and product leaders to solve complex technical challenges. • Influence engineering standards, software quality, and operational excellence. Build and Scale the Platform • Help shape and deliver a highly scalable, resilient, and secure decisioning platform operating at Mastercard scale. • Balan

About DevRev At DevRev, we're building the future of work with Computer – your AI teammate. Unlike traditional tools, Computer unifies all your data sources, tools, and workflows into a single AI-ready platform, giving employees real-time insights, proactive suggestions, and powerful agentic actions. It extends your existing software with AI-native apps and agents that work alongside your teams and customers – updating workflows, coordinating across teams, and eliminating repetitive work. We call this Team Intelligence: human-AI collaboration that breaks down silos, brings people back together, and frees you to solve bigger problems. Backed by Khosla Ventures and Mayfield with $150M+ raised, DevRev is trusted by global companies across industries. About the role We are looking for a Senior Data Engineer to help build and evolve the data platform that powers critical business decisions and customer-facing experiences. You will own significant parts of our data architecture that is main powerhouse of DevRev Computer’s memory for accurate and efficient Answers. As a part of data team, you will design and operate scalable data systems, and work closely with Software Engineering, AI Agent teams, Data Science, and Product teams to turn complex data requirements into reliable, high-quality data products. This role is ideal for an experienced engineer who enjoys solving challenging problems involving large-scale data, distributed systems, database architecture, and performance optimization. You will have significant technical ownership and the opportunity to influence the direction of our agentic data platform while helping raise the engineering bar across the team. Responsibilities Own data architecture for large-scale, high-impact projects, making thoughtful tradeoffs across scalability, reliability, performance, maintainability, and operational cost. Design, build, and operate scalable data pipelines and data systems that reliably ingest, transform, store, and serv

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team and lead the front-end RTL physical implementation team. Drive CAD flows on multiple process technologies while working closely with core micro-architects to refine CPU core configurations and optimizing PPA. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, RTL and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An expert in physical design practices used to optimize PPA Experienced in high-performance physical design. Proficient in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation and power analysis. Skilled in synthesis, place and route tools including flows and physical design methodology. Background in CPU micro-architecture. What We Need Own front‑end physical implementation and PPA definition for a high‑performance RISC‑V CPU and CPU subsystem Work closely with microarchitects and RTL designers to “make the IP better” by optimizing frequency, power, and area

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team to drive infrastructure for performance analysis, correlation and verification. You’ll work on a CPU based on RISC-V ISA, collaborating with core architects and RTL teams to deliver a highly efficient and performant design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Strong problem solver who can identify complex issues, develop practical solutions, and drive them through implementation. Enjoy building tools and improving the infrastructure, workflows, and methodologies that make CPU development more efficient. Skilled in C++ and Python, with experience using industry-standard compilation, simulation, and emulation tools. Experience with verification infrastructure and methodologies along with knowledge of high-performance CPU architecture and microarchitecture. Proficient in debugging RTL and logic across multiple design hierarchies and pre-silicon environments. What We Need Join a team driving improvements in CPU microarchitecture, verifying performance, and correlating results between RTL and the performance mode

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we build open, state of the art compute for real workloads and real developers. You will own CPU focused test generator development and verification strategy, shaping how our out-of-order RISC-V CPUs are validated against complex ISA and microarchitectural behavior. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You bring 8+ years in CPU design verification, test generation, or closely related CPU validation work. You have led development of test generators for x86, ARM, or RISC-V ISA environments. You understand CPU ISA behavior, privileged architecture, and high-performance out-of-order CPU microarchitecture. You are comfortable building tools, stimulus, and automation that scale verification across large CPU programs. You communicate clearly across design, DV, architecture, emulation, and post-silicon teams. What We Need Lead development of CPU core-level test generators for high-performance out-of-order RISC-V cores. Own generator strategy, infrastructure, and methodology for ISA and microarchitectural verification in both pre-silico

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Our Tensix Team is building the next generation of high-performance AI compute systems. We’re looking for a Power Architect to drive architectural strategy, modeling, and design decisions that shape how power is understood and optimized across our products. This is a hands-on role with massive influence over how we build power-aware systems from the ground up. This role is hybrid, based out of Santa Clara, CA, Boston, MA, Austin, TX or Toronto. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are 15+ years experience with power estimation tools like PowerArtist, PtPX, RTL Architect, and PrimePower. Skilled in modeling and optimizing power at the architectural level, with deep knowledge of power-gating, voltage domains, and leakage control. Track record of influencing architectural and micro-architectural changes that meaningfully reduced design power. Proficient in Verilog HDL, Design Compiler, C/C++ and Python. Background in power-optimization of compute datapath and/or interconnects. What We Need Predict power consumption early in architecture and track it through RTL evolution. Propose architectural changes for power optimization across server and non-

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an exceptional Senior-level Physical Design Engineer to drive top-level implementation of our complex AI and CPU System-on-Chip designs. You'll orchestrate cross-disciplinary collaboration, implementing sophisticated floorplans, power grids, and clock networks while ensuring design closure at the chip level. If you excel at managing the complexity of full-chip physical design and want to deliver next-generation AI hardware, we need your expertise. This role is hybrid , based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned physical design engineer who thrives on complex, full-chip implementation challenges. Expert at collaborating across disciplines, working effectively with architecture, RTL, and packaging teams. Passionate about optimizing chip-level implementations for power, performance, and area. Detail-oriented professional who drives design closure while maintaining quality and meeting aggressive schedules. What We Need 8+ years of top-level SOC physical design experience on complex, multi-million gate designs. Deep expertise in hierarchic

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a highly skilled and experienced Engineer to lead post-silicon power characterization and correlation activities for cutting-edge semiconductor products. In this role, you will be responsible for developing and executing detailed power measurement strategies on silicon, correlating results with pre-silicon models, and driving improvements across power architecture, design, and modeling methodologies. You will serve as a key technical leader, interfacing across design, architecture, validation, and systems teams to ensure silicon meets power and performance specifications under all operating conditions. This role is hybrid, based out of Toronto, ON or Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are A Principal-level engineer with 8+ years in silicon power analysis and characterization, and a Master’s or PhD in EE, CE, or related field. Deep understanding of digital and mixed-signal power domains, including DVFS, leakage vs. dynamic power, and power gating. Highly proficient in lab-based power measurement using oscilloscopes, current probes, power analyzers, and SMUs, plus Python/Perl/MATLAB

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. This role sits at the center of cutting-edge AI hardware development, keeping the servers, PCIe systems, and engineering infrastructure running that power next-generation compute. You’ll be hands-on with rapidly evolving prototype and production systems, installing, maintaining, and troubleshooting hardware in fast-paced R&D and data center environments. Acting as a critical bridge between hardware engineers, software teams, and IT, you’ll help ensure seamless access to the platforms that turn ideas into working silicon and systems. This role is onsite, based out of Toronto, Canada or Austin, Texas. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on hardware professional who enjoys building, maintaining, and troubleshooting complex computing systems. Comfortable working in fast-paced R&D environments where hardware, firmware, and software are constantly evolving. Knowledgeable in computer architecture, operating systems, and hardware diagnostics, with strong problem-solving skills. Collaborative, detail-oriented, and motivated to improve processes through documentation, scripting, and automation. What We Need Inst