Experienced Engineering Technical Specialist Company: The Boeing Company Boeing Defense, Space & Security (BDS) is seeking Experienced Engineering Technical Specialists (Level 3) to join the team in Berkeley, MO. This position supports Risk Managed Framework compliance across multiple avionics test labs as well as the administration of embedded PCs and host PCs on avionics test benches. The Lab Infrastructure team is responsible for the design, modification, and troubleshooting of all test benches used in the avionics' lab to support systems integration testing on the F-15. Position Responsibilities Build and configure embedded PCs and host PCs on test benches Support RHEL 9 Installation, configuration, patching and maintenance of Linux server environments Support containerization Provide active directory management and file server management Troubleshoot user problems related to hardware, software, or processes Conduct monthly OS patching and anti-virus updates Create user accounts and reset passwords Run backups on workstations and servers Maintain compliance with Risk Managed Framework and NISPOM rules Keep facility signage up to date Maintain lab access list Travel may be required up to 10% of the time; domestically and/or internationally depending on business needs. This position requires an active U.S. Secret Security Clearance (U.S. Citizenship Required). (A U.S. Security Clearance that has been active in the past 24 months is considered active) Basic Qualifications (Required Skills/Experience) <ul
Jobs in United States
Software Freshers It 9989612735 in United States
2,071 active opportunities · Updated October 2026
Showing
15 jobs
Explore current software freshers it 9989612735 jobs across United States. Filter by work mode, employment type, experience, department, date posted and distance.
Distinguished Technologist - Principal Architect, Platform Security and Firmware Systems Description - HP is seeking a senior technical leader to serve as a lead architect for hardware rooted Platform Root of Trust for HP's commercial PC platform. In this role, you will be responsible for envisioning, defining, and driving the architecture of hardware, firmware, software, and cloud-integrated security capabilities that protect HP commercial PCs from current and emerging threats. You will also work across the hardware and security architecture teams, collaborate with HP's Security Research Labs, Firmware (BIOS) team, our security business that creates and deploys industry leading enterprise security and manageability solutions, product management, manufacturing, supply chain, customer enablement, and field organizations to create cohesive system solutions that deliver unique customer value. This position requires deep expertise in embedded systems, platform firmware, hardware, security, device manageability, and PC system architecture. The role also requires the ability to translate complex technical capabilities into customer-relevant value propositions and to influence internal and external stakeholders without relying solely on formal authority. Responsibilities Serve as principal architect for HP Endpoint Security Controller roadmap, associated hardware and firmware based capabilities, cryptographic identity, attestation, secure communication, event logging, and future controller generations. Define and evolve HP Sure Start architecture and related firmware resilience capabilities, including hardware-enforced firmware authenticity, recovery, update, and protection mechanisms. Drive secure BIOS and firmware configuration management strategies, including HP Sure Admin ecosystem capabilities, key management, zero-touch provision
Print Sales Specialist Description - HP is seeking to identify highly motivated and qualified individuals for various future opportunities. Although there may not be an immediate opening, in anticipation of these opportunities becoming available, completing a profile will allow us to evaluate your qualifications and interests and will allow us to stay connected. Job Description: The Print Sales Specialist is responsible for specializing in sales, collaborating with Ownership Teams, managing account relationships, and providing expertise on HP's products and services. This role focuses on achieving sales quotas, developing proposals, landing new logos, and ensuring client hand-offs. The Print Sales Specialist owns Print Solutions focused selling activities aligned to an overall account strategy with existing or new accounts. Key Responsibilities Specialize in sales and collaborate with Ownership Teams. Manage account relationships and provide expertise on HP's products and services including software. Achieve sales quotas and develop proposals. Land new logos and ensure client hand-offs. Identify and pursue expansion opportunities within existing and new accounts Collaborate with the AE and Pursuit resources to identify, land, adopt, expand, renew, and close opportunities. Owns the Print focused selling activities aligned to an overall account strategy and collaborates with AE on Route to Market decisions including dMPS, iMPS or transactional. Develops productive relationships with key print focused channel partners to drive pipeline Ensure high-quality pipeline management and achieve sales quotas. Establish a professional, working, and consultative, relationship with the client, up to and including the C-level for mid-to-large accounts, by develop
The Engineering Lead Analyst – SonarQube & Code Quality Engineering is a senior-level engineering role responsible for leading static code analysis, automated code quality governance, security vulnerability remediation, and AI-augmented developer enablement across enterprise software delivery pipelines. In this role, you will champion software reliability, maintainability, clean-coding standards, and automated quality gates. You will partner with development teams, system architects, and platform engineering to integrate and manage enterprise-scale code quality platforms (such as SonarQube) both on-premises and in cloud/SaaS environments. Additionally, you will drive modern engineering practices by embedding Behavior-Driven Development (BDD) within your own software delivery and leveraging Agentic AI workers and Model Context Protocol (MCP) architectures to optimize developer experience, streamline code governance, and boost engineering velocity. Key Responsibilities 1. Code Quality & Static Analysis Platform Ownership Lead the architecture, deployment, administration, and continuous enhancement of enterprise Static Application Security Testing (SAST) and Code Quality platforms (e.g., SonarQube , DeepSource, Codacy, Semgrep). Configure, calibrate, and enforce automated Quality Gates, code rulesets, technical debt calculation models, and code-coverage baselines across multi-language enterprise repositories. Oversee version upgrades, patching, high availability, and operational maintenance for on-premises and SaaS/cloud-hosted code quality infrastructure. 2. CI/CD & Pipeline Integration <li style=
Become a part of our caring community The Care Management Support Assistant contributes to administration of care management. Provides non-clinical support to the assessment and evaluation of members' needs and requirements to achieve and/or maintain optimal wellness state by guiding members/families toward and facilitate interaction with resources appropriate for the care and wellbeing of members. The Care Management Support Assistant performs basic administrative/clerical/operational/customer support/computational tasks. Typically works on routine and patterned assignments. The Care Management Support Assistant will review inbound referrals and correspondence for processing, fulfilment or resolution utilizing all appropriate software systems and resources. Screen physician’s orders and documentation to identify that all qualifying medical documentation and required information is included. When necessary, request additional applicable information from referring entity. Perform verification of benefits coverage and eligibility for services per Health Plan contract. Review referral data matching it against specified medical terms and diagnoses or procedure codes and follow established procedures for approving request or referring request for further review. Provide referral management education to members and providers regarding medical benefits, referral status and prior authorizations. Communicate with patient to confirm demographics and explain the details of the services/care requested. Coordinate the timely delivery of care and services with providers. Also communicate with referring entities, providers, and members regarding final referral determination while maintaining detailed documentation to record patient, physician, referral source and provider interactions and communications. Work with Pre-Authorization, Utilization Management, Billing, Pharmacy, and Home Care r
Become a part of our caring community The Associate VP, Quality Engineering carries out procedures to ensure that all information systems products and services meet organization standards and end-user requirements. The Associate VP, Quality Engineering requires a in-depth understanding of how organization capabilities interrelate across segments and/or enterprise-wide. The Associate VP, Quality Engineering performs and leads tests of software to ensure proper operation and freedom from defects. May create test data for applications. Documents and works to resolve all complex problems. Reports progress on problem resolution to management. Devises improvements to current procedures and develops models of possible future configurations. Acts as information resource about assigned areas to technical writers. Performs complex work flow analysis and recommends quality improvements. Decisions are typically related to intradepartmental coordination, development and implementation of strategic plans, and business outcomes, and develops and implements strategic plans for the scope of management that are aligned with the Segment or Business strategy. Use your skills to make an impact Required Qualifications Bachelor's degree in a technology field Extensive experience in the information technology field Demonstrated success in leading and developing a team of associates. Expertise in software testing methodologies Record of success in leading quality improvement initiatives Certified Software Test Engineer (CSTE) designation. Must be passionate about contributing to an organization focused on continuously improving consumer experiences Preferred Qualifications Master's degree in a technology field Additional Informa
NVIDIA’s Executive Briefing Center (EBC) Solutions Architect (SA) team is looking for a highly hands-on Solutions Architect with exemplary communication skills. The role involves developing, demonstrating (in the NVIDIA EBC), and packaging agentic AI systems. Partnering with account SAs you will co-develop proof of concepts (POC) and "uplift" their presentation quality to match the NVIDIA branding and messaging used with Executive meetings. This is a builder’s and presenter's role! You will spend time architecting and writing code. You will develop multi-agent systems, retrieval pipelines, and optimized inference stacks on NVIDIA’s full-stack accelerated computing platform. We want a creative, diligent, and curious engineer energized by agentic AI and ready to make significant change. If that’s you, join us! What you’ll be doing: Architect, build, and ship end-to-end Agentic AI applications for a variety of use cases—spanning multi-agent coordination, long-horizon reasoning, planning, and tool use. Act as Technical Advisor alongside fellow Subject Matter Experts (SME) in Executive Briefings. Creating and presenting demos that are used at Trade Shows or Customer Meetings. Partner with NVIDIA engineering, product, and sales teams to secure build wins, translate customer feedback into actionable product and roadmap insights, and scale global expertise through technical collateral, workshops, and developer communities. What we need to see: BS/MS/PhD in Computer Science, Electrical/Computer Engineering, Physics, Mathematics, AI/ML, or a related field (or equivalent experience) 2+ years as an ML/Software Engineer or Solutions Architect writing production-level code in Python and/or C/C++ in Linux environments. Validated experience building sophisticated agentic and multi-agent AI sy
As one of the technology industry's most desirable employers, NVIDIA has been redefining accelerated computing, computer graphics and leading the Artificial Intelligence revolution. NVIDIA's innovation is fueled by its great technology—and amazing people. We are seeking a Senior Silicon and System Product Lead to influence, innovate and take our next generation products to the market. As part of the Silicon Solutions Team, we architect and deliver groundbreaking system solutions that integrate all aspects of the system from silicon design, software design to operations and final deployment in multiple market segments that NVIDIA serves. This position offers an unique opportunity to collaborate with multiple organizations in the company and grow your career in a high impact role. We need a passionate, hard-working and creative individual to lead the products all the way from market analysis to delivering the features on the final product. What you'll be doing: Drive product performance and power targets, trade-off features/configurations and provide innovative solutions to complex silicon and system level problems. Evaluate new market segments and use cases; translate market requirements to engineering problem statements and metrics. Innovate Performance, power, yield and quality optimizations and features for the world’s fastest power-shipping products in the GPU and SoC market segments spanning gaming, automotive, datacenter and DL/AI. Develop methodologies and requirements for multi-functional teams to drive silicon and system product features to production. Incorporate productization feedback to improve the next generation. Lead the team for feature requirements and schedule from architecture to silicon phase of projects. Work alongside system architects, designers, marketing teams, chip and board designers, software/firmware engineers, HW/S
The Silicon Co-Design Group (SCG) sits at the crossroads of architecture, design, marketing, operations, and productization. Our work spans early architecture through final product delivery across Datacenter, Gaming, Robotics, Automotive, and Embedded markets. We work closely across functions to deliver chips that change what is possible. System Integration sits at the intersection of all of them. It is the layer where every architecture, design, software, and manufacturing decision meets reality. When something breaks late in a program, it usually breaks here first. We are hiring a Senior Manager to lead this team in the US and partner closely with teams globally. Your work will sit on the critical path of every NVIDIA silicon program, and the bar you set for system integration is the bar we ship to! The two hardest, highest-leverage problems in this seat: Find critical silicon issues earlier — often before software is production-ready. Left-shifting post-silicon coverage is the highest-value thing System Integration can do. Standing up wide-area testing as a repeatable capability is a core part of the role. Keep programs on milestone when upstream dependencies slip. Validation plans collide with reality every program! The team needs new strategies, not just contingency plans, to keep moving when software, firmware, or methodology slip. You will design and run those strategies. What you’ll be doing: Plan and execute post-silicon feature integration, PVT validation, and wide-area testing across NVIDIA’s GPU, SoC, and CPU programs. Build wide-area and in-system test as a repeatable capability that shifts post-silicon coverage left, so issues surface before we are production-ready. Lead resolution of the most complex system-level issues, RMAs, and HW/SW interaction problems with creative workarounds and focused lab experimentation. Deve
NVIDIA’s Silicon Co-Design Group is the team that gets every GPU, SoC, and CPU silicon program from first power-on to high-volume production. We are hiring a Senior Manager to lead our Test, Manufacturability, Reliability & Quality (TMRQ) organization. This is not a coordination role . Your work decides if a product can be built at scale and trusted in the field. These include production test development (SLT, BLT), control run flow, system reliability stress (HTOL), platform- and board-level manufacturing issue closure, and field diagnostic test development. You lead a team of individual contributors and a first-line manager at the layer where silicon, platform, and software collide with manufacturing reality. Decisions you make show up in yield curves, production ramp , and customer escapes. You are the leader the program turns to when a build is stuck, a control run is fallout-heavy, or a field return points back at silicon . The exceptional hire also uses AI deliberately — with demonstrated workflow impact and the judgment to know where it compresses real work and where it introduces risk. What you will be doing: Keep programs moving. Own the technical execution and velocity of SLT, BLT, Board/Chip/Rack CR, and system reliability stress (HTOL) across every GPU, SoC, and CPU silicon program. Close the hardest multi-functional failures. Resolve Vmin and binning escapes, performance shortfalls, and power anomalies by driving root-cause across design, methodology, DFT, ATE, package, software/firmware, and manufacturing — and own the WARs and productized fixes through to confirmation. Give leadership the clarity to act. Convert raw integration signals — CR fallout, BLT/SLT yield, SHTOL/CHTOL data, RMA trends, customer escalations — into decision-ready options that enable executive leadership to act with confidence on POR, QS/PS gates, a
Are you ready to contribute to world-class innovation and push the boundaries of what's possible? At NVIDIA, you'll have the opportunity to be part of a team that is driving groundbreaking impacts across various markets. As a Thermal Solutions Development Engineer, you will play a pivotal role in our Silicon Codesign Group, transforming thermal solution concepts into lab-ready builds and beyond. What you will be doing: Build thermal solutions for engineering characterization and validation of next-gen GPU/SOC products, ensuring flawless delivery from concept to lab. Drive end-to-end development and deployment of thermal solutions, collaborating with internal teams and external vendors on build requirements, prototype evaluation, test system integration, and software automation. Improve thermal design processes by incorporating feedback and findings, developing workflow and maintaining our world-class standards. Work closely with system architects, chip and board designers, and software/firmware engineers in a dynamic and high-energy environment to bring industry-defining products to market. Apply AI-enabled approaches and AI tools to accelerate design iteration, test planning, and characterization/validation triage (e.g., requirements/spec summarization, experiment prioritization, log/telemetry summarization, anomaly/outlier detection), improving cycle time, coverage, and traceability while validating outputs against physics, specs, and lab measurements. Partner with AI/tooling teams as the thermal domain SME to define use-cases, success criteria, and evaluation methods; provide feedback to improve tool reliability and usability. What we need to see:
NVIDIA has been redefining computer graphics, desktop gaming, and enhanced computing capabilities for more than 25 years. Today, we are tapping into the unlimited potential of AI to define the next era of computing. As a NVIDIAN, you will work on problems that sit at the boundary of architecture, silicon, firmware, software, and production, where strong judgment matters as much as technical depth. We're the Silicon Design for Productization (DFP) Team, within the broader Silicon Co-Design Group, and we turn power and thermal design into executable productization methodology. Power and thermal are among the most complicated problems we work on at NVIDIA because they sit at the intersection of architecture, workload behavior, silicon variation, firmware policy, platform constraints, and product goals. Small decisions here have an outsized impact on performance, efficiency, reliability, bring-up speed, and ultimately what the product can deliver in the field. We define how features move from concepts to bring-up, characterization, validation, and release. In this role, you will help us build that bridge. We're looking for an engineer who reasons from first principles, flourishes with ownership in a fast-paced environment, and uses AI with sound judgment. What you’ll be doing: Lead the effort across multi-functional teams to keep the program’s power and thermal productization strategy clear, executable, and on track. Create methodology and silicon test plan based controller designs and architecture, including characterization process, debug tools, fuse/firmware settings and lab requirements. Drive resolution for challenging silicon issues through structured hypotheses, measurement plans, and root-cause closure. Steward the Power and Thermal playbook when the existing productization methodology
SCG sits at the crossroads of design, architecture, marketing, and productization—owning the journey from the architecture stage through final product definition across Gaming, Datacenter, Automotive, and Embedded markets. As a System Verification CoDesign Engineer, you will work on system-level speed features, develop the verification collaterals and automation infrastructure to characterize and validate them, and lead debug of the complex silicon issues that stand between a program and on-time shipment. This is a hands-on role for an engineer who combines deep technical craft with the drive to compress cycle time using modern tooling—including AI—without losing rigor. What You’ll Be Doing: Collaborate cross-functionally with system architects, hardware, firmware/software, process/reliability, and operations teams to co-design system-level speed features and deliver industry-defining products. Understand system level behavior and speed reliability margins, bounding box constraints and identify solutions that optimize margins . Translate hardware features and architectural requirements into verification techniques that achieve full coverage across testing flows. Perform closed loop validation by correlat ing silicon behavior against timing simulation and design expectations; provide actionable feedback to improve future designs. Define, prototype, and refine pre- and post-silicon bring-up flows to ensure
Work Flexibility: Remote Staff Regulatory Affairs Specialist, Mako and Enabling Technologies (Remote) Join Stryker’s Ortho Tech Business and support a portfolio that spans robotics, navigation, imaging, software, and capital equipment technologies. In this role, you will provide regulatory leadership throughout the product lifecycle, partnering with cross-functional teams to support global product development, regulatory submissions, market access, and ongoing regulatory compliance across U.S. and international markets. Work Flexibility: This is a remote position, with a preference for candidates located in the U.S. Eastern Time Zone What You Will Do Develop and execute global regulatory strategies for new products, product changes, and lifecycle management activities. Participate in product development teams to ensure U.S., European, and international regulatory requirements are incorporated throughout all development phases. Evaluate product classifications, regulatory pathways, and jurisdictional requirements for medical devices and related technologies. Author and submit regulatory filings, including FDA submissions, international registrations, and supporting documentation required for product approvals. Review quality, preclinical, and clinical documentation to ensure submission readiness and regulatory compliance. Partner with global regulatory affiliates to support registrations, market expansions, and post-market regulatory activities. Lead interactions with regulatory authorities and notified bodies, including preparation of responses, submissions, and agency communications. Review product labeling, marketing materials, and product claims for compliance with applicable regulatory requirements and mentor junior regulatory team members on regulatory
$100K – $500K/yr
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is looking for a mid- to senior-level Physical Design Engineer who will contribute to the physical design of high-performance chips for industry-leading AI/ML architectures, spanning implementation from synthesis through tapeout. You will partner with front-end and physical design engineers to optimize floorplanning, timing, power, performance, and area across multiple IPs. Along the way, you will build end-to-end ASIC expertise while learning from experienced engineers across the chip development process. This role is hybrid , based out of Austin, TX, Fort Collins, CO, or Santa Clara, CA . We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An engineer excited to work on high-performance designs for industry-leading AI/ML architectures. A collaborative problem solver who enjoys working with experienced engineers across ASIC disciplines. Grounded in logic design fundamentals and gate- and transistor-level implementation. Curious about how early architectural and RTL decisions shape physical implementation and final chip quality. What We Need A BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a relat
Other cities to consider
More places hiring for this role
Get new software freshers it 9989612735 jobs in United States by email
Daily job updates · Unsubscribe anytime