Sr Performance Solutions Partner in United States

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team and lead the front-end RTL physical implementation team. Drive CAD flows on multiple process technologies while working closely with core micro-architects to refine CPU core configurations and optimizing PPA. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, RTL and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An expert in physical design practices used to optimize PPA Experienced in high-performance physical design. Proficient in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation and power analysis. Skilled in synthesis, place and route tools including flows and physical design methodology. Background in CPU micro-architecture. What We Need Own front‑end physical implementation and PPA definition for a high‑performance RISC‑V CPU and CPU subsystem Work closely with microarchitects and RTL designers to “make the IP better” by optimizing frequency, power, and area

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Sr. Staff Design Verification Engineer to lead end-to-end verification efforts for our advanced CPU and AI compute platforms. This role is ideal for seasoned engineers with deep expertise in CPU verification who excel at driving complex test plans to closure, mentoring teams, and leveraging modern AI tools to accelerate innovation. This role is hybrid, based out of Boston, Toronto, Ottawa or Santa Clara. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Proven track record leading end-to-end CPU verification across processor cores, caches, interconnects, interrupts, MMU/IOMMU, and cache coherency protocols, with multi-chip and emulation experience a plus. Expert in creating comprehensive test plans and building simulation testbenches using SV-UVM, C/DPI, and Cocotb. Skilled in managing high-volume regression execution, complex failure triage, and driving test plans and coverage metrics to closure. Experienced leader and mentor dedicated to guiding junior engineers and fostering verification best practices across teams. Proficient in leveraging modern AI tools like Copilot, Cursor, Claude, Gemini, and ChatGPT to optimize ver

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Design Verification Engineer to lead pre-silicon verification of the Beowulf SoC, with focus on the Compute Subsystem (CSS), DDR memory subsystem, and Fabric NoC. This role will drive coverage, coherency, memory traffic, connectivity, error handling, and bring-up features critical to silicon success. This role is hybrid, based out of Boston, MA; Toronto, ON; or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Deeply curious about SoC architecture, compute systems, DDR behavior, and Fabric NoC/interconnect verification. Expert in UVM, SystemVerilog, coverage-driven verification, assertions, and subsystem-level debug. Experienced in verifying compute subsystems, DDR controllers and PHY-facing logic, NoC/interconnect protocols, coherency, ordering, and data movement. Comfortable with reset, power management, error handling, performance, and high-concurrency system scenarios. Proactive, detail-oriented, and effective in cross-functional technical discussions. Familiar with Python, C/C++, Tcl, CocoTB, or similar verification automation tools. What We Need Develop and own scalable verification environmen

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Curious about how cutting-edge hardware actually comes to life? We're looking for someone who’s excited to dive into the core of next-gen systems and help make them real. In this role, you’ll validate high-speed interfaces, solve complex system-level puzzles, and collaborate across teams to shape the future of AI/ML computing. If firmware, hardware, and hands-on debugging sound like your kind of fun — let’s chat! This role is hybrid and based in Vancouver, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You love bringing hardware to life and enjoy the thrill of solving tricky problems across the hardware–firmware boundary. You’re hands-on in the lab and comfortable with tools like oscilloscopes, protocol analyzers, and JTAG — digging deep doesn’t scare you. You’re comfortable jumping into unfamiliar problems and figuring things out — whether it’s in the lab or in firmware. You’re curious, collaborative, and excited to work on technology that pushes the boundaries of performance. What We Need Someone to take the lead in validating our next-gen PCIe interfaces — from controller to PHY, and everything in between. A strong co

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a SoC Design Verification Engineer to validate the System Management Controller (SMC) and enable seamless multi-chip integration. In this role, you will design and execute tests, build infrastructure, and debug issues across chiplet-based SoCs. You’ll have the opportunity to work with remote mentorship while contributing to the foundation of scalable multi-die systems. This role is hybrid, based out of Toronto, Ontario, Boston, MA or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Proficient in SystemVerilog, SV-UVM, Python, and C/C++ with strong verification skills. Experienced in writing test plans, building infrastructure, and debugging hardware/software flows. Comfortable working with remote mentorship and distributed teams. Familiar with AI-assisted tools like Copilot, Cursor, and Claude to accelerate verification. What We Need Develop and maintain SMC tests and supporting DV infrastructure. Write, execute, and track test plans for chiplet and multi-chip SoC designs. Use C/C++ to develop tests compiled, loaded, and executed directly on the DUT. Triage, analyze, and debug issues in clos

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Design Verification Engineer to contribute to the unit-level verification of our RISC-V CPU front end—including instruction fetch, branch prediction, and surrounding fetch control structures. As a key individual contributor within our front-end DV team, you will focus on building testbenches, generating stimulus, and developing checkers for complex microarchitectural scenarios. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Front-End Experience: Solid background verifying CPU front-end blocks—such as instruction fetch, branch predictors (BTB, TAGE, RAS), instruction caches/TLBs, or decode—using SystemVerilog, UVM, and C++. Unit-Level Focus: Hands-on experience building clean, controllable unit testbench environments with precise stimulus and checking. Reusable Design: Pragmatic approach to building transactors, predictors, and scoreboards that can be reused across verification levels. Collaborative Problem Solver: Comfortable working alongside RTL designers to trace and fix misspeculation, redirect, and edge-case fetch bugs. What We Need Unit-Level Verifica

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent builds AI and RISC-V compute hardware that requires best-in-class design tools and intellectual property to compete globally. The Sr. Strategic Sourcing Manager, Engineering Infrastructure leads procurement strategy for the design ecosystem, owning vendor negotiations, IP licensing agreements, and tool sourcing that enable our worldwide engineering teams to innovate at speed. The role suits someone who takes ownership of complex, multidimensional deals, operates independently with minimal oversight, and commands credibility with vendor executives, internal stakeholders, and the C-suite. This role is hybrid or remote, based out of Santa Clara, CA; Austin, TX or Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A strategic negotiator with 5+ years of experience sourcing complex technology (IP, design tools, or semiconductor components) in fast-paced environments Someone who builds trust-based vendor relationships and leverages them to unlock better terms, faster delivery, and innovative solutions A detail-oriented operator who thrives managing multiple concurrent deals while maintaining executive visibility and cross-func

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s DRAM Design Engineering Group (DDEG) is where innovation meets excellence. We are advancing memory and storage technologies through collaborative engineering and creative problem-solving. Our team works at the forefront of semiconductor design, developing solutions that shape the future of memory products in a fast-paced, learning-focused environment. As a Design Verification Engineer, you will help develop next-generation memory technologies by verifying and optimizing digital and analog circuit designs. In this role, you will work closely with global multi-functional teams across the product lifecycle to deliver high-quality, manufacturable memory solutions that meet performance, reliability, cost, and customer requirements. Your work will directly contribute to bringing advanced memory products from concept to production. Responsibilities: Verify circuit functionality, reliability, power, and compliance with product specifications Drive verification planning, coverage closure, circuit debug, and design improvements Perform circuit modeling and simulation using industry-standard tools Support silicon validation, reticle experiments, and tape-out activities Partner with engineering, manufacturing, and product teams to deliver manufacturable designs Minimum Qualifications: Bachelor’s degree in Electrical Engineering or a related field 4+ years of semiconductor design, verifi

Leidos has an exciting opportunity for a Sr. Java Developer in our Intel Security Sector's Analysis Solutions Business Area . Our talented team is at the forefront in Security Engineering, Computer Network Operations (CNO), Mission Software, Analytical Methods and Modeling, Signals Intelligence (SIGINT), and Cryptographic Key Management. At Leidos , we offer competitive benefits , including Paid Time Off, 11 paid Holidays, 401K with a 6% company match and immediate vesting, Flexible Schedules, Discounted Stock Purchase Plans, Technical Upskilling, Education and Training Support, Parental Paid Leave, and much more. Join us and make a difference in National Security! Job Summary A Java developer on this program provides Agile development and operations and maintenance for mission critical systems. Based in DevOps framework, this role participates in major deliverables of projects through all aspects of the software development lifecycle including scope and work estimation, design, coding and unit testing. Primary Responsibilities: Design, develop, test and maintain high-performance, scalable backend microservices using Java and the Spring Framework to meet customer information technology needs. Participate in software programming initiatives and code reviews. Develops software system validation and testing methods using Junit and Katalon and uses integrated custom developed software solutions to leverage automated deployment technologies Develop, prototype and deploy solutions within a cloud-based platform leveraging platform services. Support the Agile software development lifecycle following Program SAFe practices while coordinating closely with team members, Product Owners and Scrum Masters to ensure User Story alignment and implementation to customer use cases Document and perform systems software development, including dep

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Site Inventory Control (SIC) team is at the forefront of our ambitious expansion efforts. SIC plays a pivotal role in connecting wafer starts, inventory strategy, cycle time management, output delivery, and factory execution. As a Senior Engineer for Fab 4 HVM SIC, you will be the operational hub, driving alignment between Technology Development (TD), High Volume Manufacturing (HVM), Probe, Supply Chain, Planning, and Engineering organizations. This outstanding opportunity allows you to lead the charge in optimizing inventory and cycle time performance while ensuring flawless factory execution! We are looking for individuals who thrive on collaboration and tackling complex operational challenges. You'll have the chance to bring to bear data to drive decisions and implement AI-enabled solutions to improve speed, accuracy, and decision-making. Responsibilities: Lead multi-functional initiatives for wafer starts, inventory, cycle time, and output performance to support business commitments Develop and improve inventory control methodologies, business processes, and operational metrics and recommend corrective actions Develop and implement inventory, priority, and capacity strategies for New Product Introduction (NPI) programs Foster coordination between Technology Development, High Volume Manufacturing, Supply Chain, Planning, and Engineering teams to optimize inventory positions and factory flow Identify and mitigate constraints, risks, and op

What if the work you did every day could impact the lives of people you know? Or all of humanity? At Illumina, we are expanding access to genomic technology to realize health equity for billions of people around the world. Our efforts enable life-changing discoveries that are transforming human health through the early detection and diagnosis of diseases and new treatment options for patients. Working at Illumina means being part of something bigger than yourself. Every person, in every role, has the opportunity to make a difference. Surrounded by extraordinary people, inspiring leaders, and world changing projects, you will do more and become more than you ever thought possible. We are seeking a Senior Mechanical Engineer to support new product development in genomics instrumentation. This is a highly technical mechanical design role focused on the development of custom mechanisms, precision motion systems, and electromechanical assemblies used in advanced instrumentation. The ideal candidate will be an engineer with experience designing motorized mechanisms and precision motion systems, including a strong understanding of system requirements, motion architecture, controls integration, structural design, and performance validation. The ideal candidate also has experience developing motion solutions from requirements through implementation and understands the engineering principles behind achieving precise, reliable motion in complex systems. Responsibilities Design and develop custom mechanical mechanisms for use in genomics instruments, including motion systems, precision assemblies, and fluidic or sample‑handling components. Integrate mechanical designs with electrical, firmware, and control systems Create and maintain 3D CAD models, engineering drawings, and support

The Wealth Relationship Mgmt. (Branch) Sr. Analyst SAFE Act is a seasoned professional role. Applies in-depth disciplinary knowledge, contributing to the development of new techniques and the improvement of processes and workflow for the area or function. Integrates subject matter and industry expertise within a defined area. Requires in-depth understanding of how areas collectively integrate within the sub-function as well as coordinate and contribute to the objectives of the function and overall business. Evaluates moderately complex and variable issues with substantial potential impact, where development of an approach/taking of an action involves weighing various alternatives and balancing potentially conflicting situations using multiple sources of information. Requires good analytical skills to filter, prioritize and validate potentially complex and dynamic material from multiple sources. Strong communication and diplomacy skills required. Regularly assumes informal/formal leadership role within teams. Involved in coaching and training of new recruits. Significant impact in terms of project size, geography, etc. by influencing decisions through advice, counsel and/or facilitating services to others in area of specialization. Work and performance of all teams in the area directly affected by the performance of the individual. Responsibilities : Identify, build and deepen relationships to gain incremental wallet share of the affluent and High Net Worth segment with financial planning and excellent discovery and profiling skills. Anticipate the complex financial needs of the client and offer solutions through a wide range of products, services and tools based on client profiling. With the support of product specialists, intuitively recognize and understand a client's banking, credit and investment needs and goals to provide holistic financial solutions. Provide regular value-add

The Wealth Relationship Mgmt. (Branch) Sr. Analyst SAFE Act is a seasoned professional role. Applies in-depth disciplinary knowledge, contributing to the development of new techniques and the improvement of processes and workflow for the area or function. Integrates subject matter and industry expertise within a defined area. Requires in-depth understanding of how areas collectively integrate within the sub-function as well as coordinate and contribute to the objectives of the function and overall business. Evaluates moderately complex and variable issues with substantial potential impact, where development of an approach/taking of an action involves weighing various alternatives and balancing potentially conflicting situations using multiple sources of information. Requires good analytical skills to filter, prioritize and validate potentially complex and dynamic material from multiple sources. Strong communication and diplomacy skills required. Regularly assumes informal/formal leadership role within teams. Involved in coaching and training of new recruits. Significant impact in terms of project size, geography, etc. by influencing decisions through advice, counsel and/or facilitating services to others in area of specialization. Work and performance of all teams in the area directly affected by the performance of the individual. Responsibilities : Identify, build and deepen relationships to gain incremental wallet share of the affluent and High Net Worth segment with financial planning and excellent discovery and profiling skills. Anticipate the complex financial needs of the client and offer solutions through a wide range of products, services and tools based on client profiling. With the support of product specialists, intuitively recognize and understand a client's banking, credit and investment needs and goals to provide holistic financial solutions. Provide regular value-add

The Wealth Relationship Mgmt. (Branch) Sr. Analyst SAFE Act is a seasoned professional role. Applies in-depth disciplinary knowledge, contributing to the development of new techniques and the improvement of processes and workflow for the area or function. Integrates subject matter and industry expertise within a defined area. Requires in-depth understanding of how areas collectively integrate within the sub-function as well as coordinate and contribute to the objectives of the function and overall business. Evaluates moderately complex and variable issues with substantial potential impact, where development of an approach/taking of an action involves weighing various alternatives and balancing potentially conflicting situations using multiple sources of information. Requires good analytical skills to filter, prioritize and validate potentially complex and dynamic material from multiple sources. Strong communication and diplomacy skills required. Regularly assumes informal/formal leadership role within teams. Involved in coaching and training of new recruits. Significant impact in terms of project size, geography, etc. by influencing decisions through advice, counsel and/or facilitating services to others in area of specialization. Work and performance of all teams in the area directly affected by the performance of the individual. Responsibilities : Identify, build and deepen relationships to gain incremental wallet share of the affluent and High Net Worth segment with financial planning and excellent discovery and profiling skills. Anticipate the complex financial needs of the client and offer solutions through a wide range of products, services and tools based on client profiling. With the support of product specialists, intuitively recognize and understand a client's banking, credit and investment needs and goals to provide holistic financial solutions. Provide regular value-add

We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Position Summary CVS Health's Adjudication & Client Experience Engineering organization is seeking a motivated and highly skilled Senior Analyst - Software Development Engineering to join our Application Production Support team. This role will support critical business applications by providing production support, troubleshooting technical issues, and contributing to ongoing application enhancements and stability improvements. As a Sr. Analyst, you will work closely with Lead Engineers, Software Development Engineers, Product Owners, QA teams, and business stakeholders to investigate and resolve production incidents, perform root cause analysis, and implement code fixes. You will be responsible for supporting enterprise applications built on Java, Angular, APIs, and Cloud platforms while ensuring the reliability and performance of systems that serve our PBM (Pharmacy Benefit Management) business. This role is ideal for a hands-on engineer who enjoys solving production challenges, developing software solutions, and collaborating within a fast-paced environment. The successful candidate will contribute to application support activities, system enhancements, and continuous improvement initiatives while growing their technical and business domain expertise. Required Qualifications 5-8 years of experience in software development, application s