System Engineering Intern in United States

We take play seriously. We’re looking for curious adventurers ready to find their party, fueled by imagination and drive to build what’s never been built before. At Hasbro and Wizards of the Coast, you’ll collaborate with passionate teams to reimagine our iconic brands and create experiences that spark joy, connection, and community through the magic of play. This is your chance to shape legendary play that lasts a lifetime. Ready to shape the future of play? At Hasbro, we entertain and connect generations through storytelling and play. We’re looking for a curious, analytical, and driven Associate Brand Manager to help lead iconic brands — translating consumer and shopper insight into line plans and products kids ask for by name. You’ll work alongside designers, engineers, franchise managers, and licensees to bring new play experiences to life across global markets, partnering closely with regional marketing, demand planning, packaging, and sourcing teams. You’ll be the voice of the consumer throughout — using research and competitive analysis to shape strategy and translating data into stories that move the business. The Preschool & Fashion Team works on brands like Peppa, Potato Head, Baby Alive and Furby! Effective from the date that Hasbro opens its new Boston location, this position will be on-site Tuesday-Thursday at Hasbro's new HQ location in Boston, MA. In the interim, this position will be onsite Tuesday-Thursday at Hasbro's HQ in Pawtucket, RI or at Hasbro's temporary location in Boston, MA. A Day in the Life as an Associate Brand Manager: Business Management Analysis on POS, share, and inventory tracking (Circana or equivalent); forecast inputs P&L stewardship at the item and line level — cost, margin, pricing, and promotional plans Business reviews, retailer line-review content, and the annual brand planning cycle Detailed work in P2M Development System and dashboards Product Development Line plan and range architecture: what to m

Why join us Brex is the intelligent finance platform that enables companies to spend smarter and move faster in more than 200 markets. By combining global corporate cards and banking with intuitive spend management, bill pay, and travel software, Brex enables founders and finance teams to accelerate operations, gain real-time visibility, and control spend effortlessly. Brex’s AI-native automation and world-class service eliminate manual expense and accounting tasks for customers so they can focus on what matters most. Tens of thousands of the world's best companies run on Brex, including DoorDash, Coinbase, Robinhood, Zoom, Plaid, Reddit, and SeatGeek. Working at Brex allows you to push your limits, challenge the status quo, and collaborate with some of the brightest minds in the industry. We’re committed to building a diverse team and inclusive culture and believe your potential should only be limited by how big you can dream. We make this a reality by empowering you with the tools, resources, and support you need to grow your career. Legal at Brex The Legal team helps the company grow responsibly, advocating for Brex and for the thousands of growing businesses we serve. We provide strategic advice and guidance to all Brex teams, protect Brex, advise on risk, and represent the company externally, negotiating with partners and interacting with regulators. Reimagining the financial system in a highly regulated environment requires creativity and resourcefulness, and we welcome the challenge. Where you’ll work This role will be based in our San Francisco office. We are a hybrid environment that combines the energy and connections of being in the office with the benefits and flexibility of working from home. We currently require a minimum of three coordinated days in the office per week, Monday, Wednesday and Thursday. As a perk, we also have up to four weeks per year of fully remote work! What you'll do Reporting to the General Counsel, you will lead Brex's Regulatory

Why join us Brex is the intelligent finance platform that enables companies to spend smarter and move faster in more than 200 markets. By combining global corporate cards and banking with intuitive spend management, bill pay, and travel software, Brex enables founders and finance teams to accelerate operations, gain real-time visibility, and control spend effortlessly. Brex’s AI-native automation and world-class service eliminate manual expense and accounting tasks for customers so they can focus on what matters most. Tens of thousands of the world's best companies run on Brex, including DoorDash, Coinbase, Robinhood, Zoom, Plaid, Reddit, and SeatGeek. Working at Brex allows you to push your limits, challenge the status quo, and collaborate with some of the brightest minds in the industry. We’re committed to building a diverse team and inclusive culture and believe your potential should only be limited by how big you can dream. We make this a reality by empowering you with the tools, resources, and support you need to grow your career. Legal at Brex The Legal team helps the company grow responsibly, advocating for Brex and for the thousands of growing businesses we serve. We provide strategic advice and guidance to all Brex teams, protect Brex, advise on risk, and represent the company externally, negotiating with partners and interacting with regulators. Reimagining the financial system in a highly regulated environment requires creativity and resourcefulness, and we welcome the challenge. Where you’ll work This role will be based in our New York City office. We are a hybrid environment that combines the energy and connections of being in the office with the benefits and flexibility of working from home. We currently require a minimum of three coordinated days in the office per week, Monday, Wednesday and Thursday. As a perk, we also have up to four weeks per year of fully remote work! What you'll do Reporting to the General Counsel, you will lead Brex's Regulatory

Job Details: Job Description: Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans Intel's research divisions and partnerships with leading academic institutions worldwide. We are seeking an exceptional Quantum IC Substrate Package Layout Design Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for design of large form factor IC substrates within a multidisciplinary team. You'll play a crucial role in advancing Intel's silicon quantum dot technology while contributing to the development of scalable quantum systems that will revolutionize computing. Key Responsibilities - Design of IC substrates using Siemens Xpedition IC package design software - Work closely with stakeholders to meet design requirements - e.g., receive feedback from silicon testchip, signal integrity (SI), power integrity (PI), thermal simulation, and system integration engineers - Deliver and disseminate design milestones to stakeholders - Design validation and verification; including DRC and LVS - Advanced packaging design integration (2.5D and 3D) with IC substrate - Tapeout of designs with substrate suppliers in collaboration with Intel substrate teams - Communicate designs in presentations and relevant documentation - Stay curre

Job Details: Job Description: Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans Intel's research divisions and partnerships with leading academic institutions worldwide. We are seeking an exceptional Quantum Interposer Design Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for physical design and integration of advanced packaging interposers within a multidisciplinary team. You'll play a crucial role in advancing Intel's silicon quantum dot technology while contributing to the development of scalable quantum systems that will revolutionize computing. Key Responsibilities - Physical design and integration of interposers used within advanced packaging for quantum computing - Work closely with stakeholders to meet design requirements - e.g., receive feedback from silicon testchip, signal integrity (SI), power integrity (PI), thermal simulation, and system integration engineers - Design validation and verification; including DRC and LVS - Deliver and disseminate design milestones to stakeholders - Communicate designs in presentations and relevant documentation - Stay current with the latest developments in packaging technology and design techniques by attending conferences and reading papers As

Job Details: Job Description: Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans Intel's research divisions and partnerships with leading academic institutions worldwide. We are seeking an exceptional Quantum Packaging Signal/Power Integrity (SI/PI) Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for modeling and simulation of various packaging solutions from silicon redistribution layers to IC substrates within a multidisciplinary team. You'll play a crucial role in advancing Intel's silicon quantum dot technology while contributing to the development of scalable quantum systems that will revolutionize computing. Key Responsibilities - Modeling and simulation of packaging hardware including redistribution layers (e.g., interposers, RDLs), IC substrates, and silicon testchip routing - Work closely with stakeholders to meet design requirements - requirements come from both theory and hardware teams. In some pathfinding projects, you will be asked to participate in creating requirements and novel packaging hardware. - System-level modelling and simulation; end-to-end simulations to ensure designs meet system-level requirements - Deliver and disseminate design milestones to stakeholders - Communicate designs in pr

We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Position Summary The Senior Manager of Pickup Innovations and Execution drives forward the strategic innovation of cutting-edge point of sale solutions for pharmacy pick up processes. This role will oversee the current execution of an enhanced and seamless patient experience while managing the POS platform for enterprise offerings and services. As a Sr Manager, you will lead and oversee the prioritization and implementation of pickup functionality with key stakeholders across the enterprise to ensure compliance, regulatory, and growth opportunities are being integrated during the pickup process. You will drive the patient and customer experience through innovating workflows, patient prompting/notifications, and the overall design/functionality of the point-of-sale system. You will also oversee peripheral processes that include Waiting Bin inventories for financial reconciliation, Reconstitution execution, and Drive Thru/Fill Master maintenance with our outside vendors. Key Responsibilities: Lead implementation of Rx POS innovation and enhancements, ensuring alignment with business goals, financial objectives, and customer/colleague priorities. Oversee day to day Rx POS execution including system support, reporting, and customer ser

Senior Ground-based Midcourse Defense (GMD) Maintenance Operations Center (GMOC) Controller Company: Boeing Aerospace Operations Boeing Global Services (BGS) is seeking a Senior Ground-based Midcourse Defense (GMD) Maintenance Operations Center (GMOC) Controller located at the Missile Defense Integration and Operation Center (MDIOC) at Schriever Space Force Base, Colorado. Must be willing to work variable shifts, including weekends and overtime. Some positions may also be rotating shifts. You are applying for a Field Operations position where our employees must be willing and able (potentially short notice) to travel to a variety of locations (domestic and/or international) to meet our customers’ unique requirements. Field Operations employees may be required to relocate to another Field Operations location based on customer and/or management requirements. Specific contracts supported by Field Operations could require employees to perform a deployment to a US DOD contingency operation. Employees associated with these specific contracts must be able to pass military contractor health standards for deployment. Position Responsibilities: The position frequently uses and applies operational concept analysis standards, principles, theories, concepts, and techniques Crew Lead that research, analyze, and compile complex technical data for the GMD program in the operational and test environments to optimize effectiveness over the program lifecycle Maintain configuration control of the GMD System 24/7/365 days a year supporting the Missile Defense Agency and warfighter community Perform asset management functio

Senior Offensive Cybersecurity Test Analyst Company: The Boeing Company The Boeing Company is seeking a Senior Offensive Cybersecurity Test Analyst to support the Boeing Test & Evaluation (BT&E) cyber test capability. The selected applicant will join a highly technical Test & Evaluation team building an offensive cyber test capability in Berkeley, MO . This position will be providing testing services to Boeing Defense Space & Security (BDS) portfolio. The primary responsibilities will include Product Security (Cyber) test planning, integration, and execution, mission-based risk assessments, vulnerability assessments, and penetration tests. The selected applicant will become a Berkeley team member trained across the broader BT&E Product Security Capability team. Position Responsibilities: Lead execution of penetration tests to identify, exploit, and assess a target system’s vulnerabilities in a threat-representative manner on embedded systems and IP-based networks Subject Matter Expert for emulating advanced cyber adversary (advanced persistent threats) tactics, techniques and procedures (TTPs) Lead controlled attack simulations that test the effectiveness of a blue team and its capabilities to detect, block, and mitigate attacks and breaches</span

Distinguished Technologist - Principal Architect, Platform Security and Firmware Systems Description - HP is seeking a senior technical leader to serve as a lead architect for hardware rooted Platform Root of Trust for HP's commercial PC platform. In this role, you will be responsible for envisioning, defining, and driving the architecture of hardware, firmware, software, and cloud-integrated security capabilities that protect HP commercial PCs from current and emerging threats. You will also work across the hardware and security architecture teams, collaborate with HP's Security Research Labs, Firmware (BIOS) team, our security business that creates and deploys industry leading enterprise security and manageability solutions, product management, manufacturing, supply chain, customer enablement, and field organizations to create cohesive system solutions that deliver unique customer value. This position requires deep expertise in embedded systems, platform firmware, hardware, security, device manageability, and PC system architecture. The role also requires the ability to translate complex technical capabilities into customer-relevant value propositions and to influence internal and external stakeholders without relying solely on formal authority. Responsibilities Serve as principal architect for HP Endpoint Security Controller roadmap, associated hardware and firmware based capabilities, cryptographic identity, attestation, secure communication, event logging, and future controller generations. Define and evolve HP Sure Start architecture and related firmware resilience capabilities, including hardware-enforced firmware authenticity, recovery, update, and protection mechanisms. Drive secure BIOS and firmware configuration management strategies, including HP Sure Admin ecosystem capabilities, key management, zero-touch provision

Abbott is a global healthcare leader that helps people live more fully at all stages of life. Our portfolio of life-changing technologies spans the spectrum of healthcare, with leading businesses and products in diagnostics, medical devices, nutritionals and branded generic medicines. Our 122,000 colleagues serve people in more than 160 countries. JOB DESCRIPTION: About Abbott Abbott is a global healthcare leader, creating breakthrough science to improve people’s health. We’re always looking towards the future, anticipating changes in medical science and technology. The Opportunity This position works out of our Lake Mary location in the Abbott Heart Failure, Acelis Connected Health business. Our Heart Failure solutions are helping address some of the World’s greatest healthcare challenges. As the Verification of Benefits Specialist, you’ll have the chance to assist our patients in having accurate insurance information on file and collecting authorizations or PCP referrals as needed. What You'll Do The following reflects management’s definition of essential functions for this job but does not restrict the tasks that may be assigned. Management may assign or reassign duties and responsibilities to this job at any time due to reasonable accommodation or other reasons. Contacts insurance companies to verify insurance benefits. Initiates Pre-authorization, PCP referral and Letter of Agreement requests for new and ongoing services with insurance companies and performs follow up activities for an outcome. Files Appeals for denied coverage to insurance companies as needed. Maintains customer records in practice management system related to benefit coverage, coordination of benefits, authorizations, denials, appeals, outcomes and communication with insurance companies. </

The Silicon Co-Design Group (SCG) sits at the crossroads of architecture, design, marketing, operations, and productization. Our work spans early architecture through final product delivery across Datacenter, Gaming, Robotics, Automotive, and Embedded markets. We work closely across functions to deliver chips that change what is possible. NVIDIA’s Silicon Co-Design Group is hiring a Chip Lead to serve as the technical lead for one of our most consequential silicon programs! This is not project management, and it is not a senior IC role. You are the person the program partners with on its hardest technical questions — when the right answer is not obvious, and when leadership needs a single technical perspective to align on direction. You are accountable for the technical integrity of the chip end-to-end. You guide co-design feature integration, help resolve the toughest multi-functional bugs, and serve as the project-specific custodian of the qualification playbook. The program runs cleaner because you are on it! What you’ll be doing: You will partner across design, validation, software, and manufacturing to keep the program’s technical narrative clear and on track. Day to day, you will: Serve as the single technical point of contact for multi-functional decisions, issues, and trade-offs. Co-lead program-level feature integration from chip to system, surfacing inter-function dependencies and guiding them to resolution. Help resolve the program’s hardest multi-functional bugs by translating ambiguous, multi-team symptoms into root-cause closure on areas such as HBM, power and thermal, high-speed I/O, and packaging. Steward the qualification playbook. When the playbook does not fit a situation, guide the mitigations and capture the lessons as reusable methodology for other SSG programs. Shape the program’s technical narrative by surfacing key risks, trade

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology and amazing people. Today, we're harnessing the boundless possibilities of AI to build the next era of computing. An era in which our GPU acts as the brain of computers, robots, and self-driving cars that can understand the world. Accomplishing unprecedented goals calls for imagination, inventiveness, and exceptional talent from around the world. As a NVIDIAN, you'll be immersed in a diverse, encouraging environment where everyone is inspired to do their best work. Join our team and discover how you can build a lasting impact on the world. NVIDIA designs the silicon behind AI, accelerated computing, and graphics. Power and thermal architecture decisions sit behind every watt of performance and every degree of thermal headroom! We are the Silicon Co-Design Group (SCG). We are hiring a Principal Architect to scout the research and industry landscape, identify emerging system-level co-design ideas in power and thermal, and drive them across teams into product differentiation across NVIDIA's roadmap. This role shapes system, platform, and datacenter feature/behavior, and partners with teams across Nvidia. SCG scope spans across architecture, design, software, operations, platforms, and productization. What you'll be doing: Architect next-generation system, platform, and datacenter-level power and thermal co-design solutions. Scan internal research, academia, standards bodies, and silicon, memory, packaging, and platform partners for what is emerging. Build the product differentiation case for each candidate idea, performance, power, reliability, schedule, cost, and brainstorm what is worth pursuing. Lead end-to-end co-design from concept to product. Drive alignment across architecture, VLSI, softw

At NVIDIA, we push the boundaries of computing innovation. Our ASIC Verification Engineers focus on developing the world’s top SoCs and GPUs. Joining us as a Senior ASIC Verification Engineer - GPU means working on modern technology powering consumer graphics and AI applications. This position is ideal for those passionate about technology and eager to impact computing’s future. What you'll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs. You will be responsible for verifying the ASIC build, architecture, golden models, and micro-architecture using advanced verification methodologies such as UVM or equivalent. Understand the design and implementation of your unit/cluster/chip, define the verification scope, develop the verification infrastructure, and verify the correctness of the design. Collaborate with architects, designers, and pre- and post-silicon verification teams to accomplish your task. What we need to see: Bachelor's Degree in EE, CS, or CE or equivalent experience. 5&#43; years of relevant experience. Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies. Experience with design and verification tools (VCS or equivalent simulation tools, debug tools like Verdi, Indago, GDB). Expertise in System Verilog or similar HVL. Strong debugging and analytical skills. Perl and C/C&#43;&#43; programming language experience desirable. Strong communication skills and the ability & desire to work as a great teammate are huge pluses. Experience in crafting test bench environments for unit and system level verification. #LI-Hybrid Your base salary will be det

NVIDIA's accelerated computing platforms move data at speeds that push the limits of what silicon and physics allow. Whether a high-speed interface trains reliably, maintains accurate margins, and survives every platform topology it will ever see is a question we answer ourselves. This role does that work. The Silicon Co-Design Group leads the boundary between what was designed and what was built. When a GPU, CPU, or SoC ships with interfaces that work at scale, this team is the reason. Most engineers debug within a layer. You will own the full stack. When an interface fails to train, the link margin is unexpectedly tight, or a customer reports a critical silicon issue, you trace the problem through protocol behavior, signal integrity, firmware, platform topology, and silicon marginalities. You then confirm that the fix works. Your methodology shapes how NVIDIA validates high-speed interfaces across generations. Your decisions affect yield, production ramp, and field quality. This is not a coordination role. The engineers who do it well hold protocol depth and system breadth simultaneously, never lose the thread across hardware, firmware, and software, and have the judgment to know when to go deeper and when to act. They are rare. Should that describe you, read on. What you'll be doing: Own post-silicon bring-up, characterization, validation, and debug of PCIe, NVLink, C2C, and other HSIO interfaces across NVIDIA GPUs, CPUs, and SoCs from first power-on through production readiness. Close the hardest failures. Drive root cause across protocol behavior, signal integrity, firmware and driver interactions, platform topology, and silicon marginalities and own every fix through to confirmation. Define validation strategy. Set test coverage, debug priorities, margining methodology, and stress criteria f