Technology Solutions Director in United States

As one of the technology industry's most desirable employers, NVIDIA has been redefining accelerated computing, computer graphics and leading the Artificial Intelligence revolution. NVIDIA's innovation is fueled by its great technology—and amazing people. We are seeking a Senior Silicon and System Product Lead to influence, innovate and take our next generation products to the market. As part of the Silicon Solutions Team, we architect and deliver groundbreaking system solutions that integrate all aspects of the system from silicon design, software design to operations and final deployment in multiple market segments that NVIDIA serves. This position offers an unique opportunity to collaborate with multiple organizations in the company and grow your career in a high impact role. We need a passionate, hard-working and creative individual to lead the products all the way from market analysis to delivering the features on the final product. What you'll be doing: Drive product performance and power targets, trade-off features/configurations and provide innovative solutions to complex silicon and system level problems. Evaluate new market segments and use cases; translate market requirements to engineering problem statements and metrics. Innovate Performance, power, yield and quality optimizations and features for the world’s fastest power-shipping products in the GPU and SoC market segments spanning gaming, automotive, datacenter and DL/AI. Develop methodologies and requirements for multi-functional teams to drive silicon and system product features to production. Incorporate productization feedback to improve the next generation. Lead the team for feature requirements and schedule from architecture to silicon phase of projects. Work alongside system architects, designers, marketing teams, chip and board designers, software/firmware engineers, HW/S

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Product Engineer in Node Development group, you will be part of a forward-thinking team of engineers that solves complex problems to develop industry leading DRAM! You will engage on new technology at design start and be part of a team responsible for delivering technology to enable the full product portfolio, initial device qualification and production ramp. This will be accomplished through innovation and by cross-functional engagement with partner groups; Design, Test, Technology Development, Marketing, Manufacturing and Quality Assurance departments to co-optimize product and process. While you may not exhibit all of the characteristics/skills listed below today, we are highly interested in a teammate who is motivated to grow in technical breadth and depth. Suppose you are open to learning while being a valued member of a team of world-class engineers. In that case, we are determined to help build upon your existing foundation, while focusing on your individual and collaborative skills in this exciting and outstanding opportunity. Responsibilities Include: Enable new process node startup, qualification, yield, and ramp Collaborate with internal engineering groups; Design, Technology Development, Design for Test, and Quality teams to understand yield issues and priorities. Provide direction to development teams using thorough knowledge for process integration Develop and key metrics for feedback on a new technology Support design verification and validation using CAD tools and simulation

Datadog’s People Technology team is building the future of AI at work. We’re looking for a People Systems Developer to design and deploy AI-native workflows that transform how we hire, develop, and support our employees. This is a high-impact hands-on builder role. You’ll move beyond traditional HRIS configuration to prototype and productionize AI-enabled systems across talent acquisition, onboarding, performance, workforce planning, and internal service delivery. You’ll operate with high autonomy, partner directly with stakeholders, and ship solutions that measurably improve how our People team works. At Datadog, we place value in our office culture - the relationships and collaboration it builds and the creativity it brings to the table. We operate as a hybrid workplace to ensure our Datadogs can create a work-life harmony that best fits them. What You’ll Do Design, build, test, and implement AI-enabled workflows and tools, moving from proofs of concept to full production and adoption based on user feedback. Rapidly prototype using LLMs, APIs, and automation frameworks — and move validated ideas into secure, scalable production systems. Integrate AI capabilities into our ecosystem (Workday, Greenhouse, Slack, Snowflake, Jira, Google Workspace, and more). Partner directly with stakeholders like People Analytics, HRBPs, IT, Legal, and Security to ensure solutions are usable, compliant, and follow responsible AI practices. Evaluate AI tools and vendors through hands-on experimentation. Enable the broader People team to adopt AI effectively and responsibly. Success in this role includes reducing manual People workflows by at least 20% through AI-enabled automation and intelligent system design. At Datadog, we place value in our office culture - the relationships and collaboration it builds and the creativity it brings to the table. We operate as a hybrid workplace to ensure our Datadogs can create a work-life harmony that best fits them. Who You Are 3-5 years of exper

InMobi (Corporate) InMobi Group is a global technology company shaping the future of agentic commerce and advertising. Through its ecosystem of businesses — including InMobi Advertising and flagship consumer platform Glance — InMobi leverages data, machine learning, and generative AI to help brands reach audiences more precisely and consumers discover products more intuitively. Glance, which is pioneering new models of agentic commerce, is owned and operated by Glance InMobi Pte. Ltd., a non-consolidated subsidiary of InMobi Pte. Ltd. InMobi Advertising InMobi Advertising, part of global technology company InMobi, is an agentic advertising platform helping brands and merchants achieve their business outcomes. Through its proprietary intelligence, AI-led solutions, and vast consumer reach — including flagship consumer platform Glance — InMobi Advertising delivers the omnichannel performance defining what's next in advertising and commerce. Glance is owned and operated by Glance InMobi Pte. Ltd., a non-consolidated subsidiary of InMobi Pte. Ltd. To learn more, visit advertising.inmobi.com. Glance Glance is an intelligent shopping agent, redefining the commerce experience. Powered by proprietary agentic intelligence and generative AI, Glance delivers a hyper-personalized consumer experience across mobile and TV — shaping the new era of shopping. Glance is operated by Glance InMobi Pte. Ltd., a non-consolidated subsidiary of global technology leader InMobi, and is backed by Mithril Capital, Google and Jio Platforms. To learn more, visit glance.com. Overview of the Role: The Global Enterprise Marketing team operates across brands, channels, events, and geographies, and moves fast. We're looking for a sharp, organized Marketing Events & Operations Coordinator to be the connective tissue that keeps it all running during our highest-stakes, most visible moments. This role reports to the Head of Experiential Marketing and supports the broader cross-functional enterprise

The Applications Development Technology Senior Lead Analyst is a senior level position responsible for establishing and implementing new or revised application systems and programs in coordination with the Technology Team. The overall objective of this role is to lead applications systems analysis and programming activities. Responsibilities: Lead the architecture, design, development, and delivery of enterprise UI applications. Strong hands-on experience with Angular and Ext JS for developing scalable and responsive user interfaces. Strong experience with Java and Spring Boot for designing and developing backend services and APIs. Experience deploying, supporting, and troubleshooting applications in ECS/containerized environments . Define application architecture, technical standards, reusable components, and development best practices. Provide technical leadership to development teams, including design reviews, code reviews, performance optimization, and troubleshooting . Strong understanding of CI/CD pipelines , including automated build, testing, deployment, and release processes. Hands-on experience with GitHub , including source-code management, branching strategies, pull requests, code reviews, and integration with CI/CD pipelines. Strong knowledge of open-source technologies and frameworks , with hands-on implementation experience. Ability to evaluate and select appropriate open-source libraries, frameworks, and tools , considering security, licensing, maintainability, vulnerabilities, and enterprise standards. Drive application modernization, technical improvements, and adoption of engineering best practices. Work closely with architects, developers, infrastructure teams, product owners, and business stakeholders to deliver solutions successfully. Prov

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Our diverse team of technologists have developed a high performance RISC-V-based CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to build and run the performance infrastructure shared by our RISC-V Software and RISC-V Performance teams. This is the plumbing that both teams' performance work stands on — benchmarking automation, data collection, and workload capture across silicon, FPGA/emulation platforms and performance models. You'll work across both teams, enabling performance and software engineers to spend their time on analysis and optimization instead of running experiments by hand. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Great at identifying problems and developing solutions, with a bias toward owning the systems you build. Enjoys building tools and optimizing workflows so other engineers can move faster. Strong Linux systems engineer, c

Leidos is seeking an experienced Program Analyst to support large information technology programs for our Utility Technologies Solutions team. In this role, you will provide program and project management support across a portfolio of IT projects supporting electric utility operations, technology modernization, and evolving grid initiatives for our utility client. You will help ensure projects remain organized, on track, and aligned with established governance and delivery standards while adhering to Leidos' Mission, Vision, and Values. The Program Analyst will support a Senior Program Manager/Portfolio Manager across a portfolio of utility IT projects, with a focus on project governance, document control, portfolio planning, reporting, and operational coordination. This role will work closely with Project Managers, IT Managers, Project Controllers, Schedulers, EPMO, and other business and technical stakeholders to help ensure projects meet established requirements and remain on track throughout the project lifecycle. The role will support stage-gate activities, maintain project and program documentation, coordinate portfolio information, assist with long-range planning, and help improve program processes and controls. The ideal candidate is highly organized, detail-oriented, proactive, and comfortable working across multiple projects and stakeholders in a fast-paced environment. Location: This position is based in South Plainfield, New Jersey, and requires onsite work three days per week, Tuesday through Thursday. Qualified candidates must reside within a reasonable commuting distance and be able to work onsite on these days. Salary: This position pays a salary in the range of $90,000 to $110,000 annually. Responsibilities: Provide day-to-day program man

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is looking for a mid- to senior-level Physical Design Engineer who will contribute to the physical design of high-performance chips for industry-leading AI/ML architectures, spanning implementation from synthesis through tapeout. You will partner with front-end and physical design engineers to optimize floorplanning, timing, power, performance, and area across multiple IPs. Along the way, you will build end-to-end ASIC expertise while learning from experienced engineers across the chip development process. This role is hybrid , based out of Austin, TX, Fort Collins, CO, or Santa Clara, CA . We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An engineer excited to work on high-performance designs for industry-leading AI/ML architectures. A collaborative problem solver who enjoys working with experienced engineers across ASIC disciplines. Grounded in logic design fundamentals and gate- and transistor-level implementation. Curious about how early architectural and RTL decisions shape physical implementation and final chip quality. What We Need A BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a relat

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is looking for a mid- to senior-level Physical Design Engineer with a strong background in static timing analysis (STA). In this role, you will help converge multi-million-gate designs on advanced process nodes and partner with cross-functional teams through final signoff and tapeout. This role is hybrid , based out of Austin, TX, Fort Collins, CO, or Santa Clara, CA . We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A physical design engineer with 8+ years of experience in STA, timing closure, and advanced-node design implementation. Experienced with timing flows, constraints, clocking, CDC, RDC, derates, uncertainties, guardbanding, and final signoff. Skilled in writing and debugging SDC constraints, creating ECOs, developing closure strategies, and analyzing worst-case corners. A strong collaborator and communicator who can drive results across distributed, cross-functional engineering teams. What We Need Drive timing convergence across blocks, partitions, sections, and top-level designs; generate and validate timing models and publish results. Analyze timing violations, develop and propagate fixes, debug timing-flow issues, and

Hyliion is committed to creating innovative solutions that enable clean, flexible and affordable electricity production. The Company’s primary focus is to develop distributed power generators that can operate on various fuel sources to future-proof against an ever-changing energy economy. Job Purpose The Mechanical Engineer is responsible for end-to-end hardware ownership of components and sub-systems for the KARNO generator, taking designs from CAD through prototype, test, and validation. Working across mechanical, electrical, software, and performance teams, this role designs and troubleshoots complex thermal and mechanical systems that must perform reliably across extreme operating environments and a wide range of fuels. The position exists to advance the development of Hyliion's fuel-agnostic power generation technology through hands-on, test-driven engineering and disciplined design execution. Duties and Responsibilities Own hardware components and sub-systems end-to-end—from concept through durability, manufacturability, serviceability, cost, weight, and validation—taking designs from CAD to hardware running on a test stand. Design components and sub-systems that must survive extreme thermal environments, perform across a wide range of fuels (20+), and push the boundaries of metal additive manufacturing. Create 3D models in NX and generate 2D prints with full GD&T per ASME Y14.5. Perform design checking and print review to ensure tolerances, processes, and material specifications align with Hyliion's GD&T standards (ASME Y14.5). Conduct fluid and thermal systems design and optimization. Perform structural and thermal FEA (ANSYS or equivalent). Install, calibrate, and read instrumentation for pressure, temperature, flow, strain, and acceleration in lab environments. Execute prototype build, test, and validation cycles early and often to identify and resolve issues in the lab rather than the field. Collaborate cross-functionally

Hyliion is committed to creating innovative solutions that enable clean, flexible and affordable electricity production. The Company’s primary focus is to develop distributed power generators that can operate on various fuel sources to future-proof against an ever-changing energy economy. Job Purpose The Metrology Engineer is Hyliion's technical authority on dimensional measurement across internal operations and the supply base. KARNO functionality depends on precision machined components and sub-assemblies held to micron-level form and finish, and this position sits within the Quality function as the interface between Design Engineering, the supply base, Manufacturing, and Quality. The role owns the measurement system end to end: the metrology lab and equipment roadmap, inspection programs and fixtures, the calibration and gage control system, and the measurement standards to which both supplier and internal inspection are held. The position is accountable for the integrity of dimensional data wherever it is generated — at a supplier's machine, at receiving inspection, or in process on Hyliion's floor — and for ensuring that results from those sources agree within defined, documented tolerances. The balance between supplier-facing and internal work shifts with the maturity of the supply base and the product portfolio; both are permanent responsibilities of the role. AI at Hyliion At Hyliion, AI is core to how we work. We equip every team member with leading AI tools and count on you to use them — to move faster, solve harder problems, and help us realize the full potential of KARNO technology for the world. Duties and Responsibilities Supplier Metrology and Source Inspection Serve as Hyliion's technical lead for dimensional verification at key suppliers, including additive manufacturing partners, precision machining sources, and the magnetic assembly supply chain. Assess supplier measurement capability: equipment, environment,

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an Physical Design Engineer to lead cross-functional efforts to solve complex physical design challenges and develop end-to-end RTL-to-GDS methodologies across advanced nodes, with a strong focus on PPA and runtime improvements. The engineer will architect, integrate, and deploy AI/ML-driven solutions into production physical design flows, creating custom CAD tools and partnering with internal teams and EDA vendors to drive next-generation, ML-enabled capabilities. This role is hybrid, based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are BS in Electrical or Computer Engineering (or equivalent experience) with 5+ years in Physical Design CAD methodology at advanced nodes. Proven track record improving PPA and/or runtime on high-performance, low-power taped-out designs. Hands-on with industry-standard EDA tools (e.g., Fusion Compiler) across synthesis, P&R, STA, signoff, and hierarchical flows. Strong Python/Tcl and data skills, with interest or experience in ML frameworks (PyTorch, TensorFlow), and the ability to drive complex projects independent

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team to define and implement RTL for high-performance CPUs. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in CPU microarchitecture with expertise in Rename, Scheduler, ROB, Load Store, Branch Prediction, Cache or Datapath. Skilled in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation, synthesis, and power analysis. Proficient in debugging RTL/logic across multiple design hierarchies and pre/post-silicon environments. Background in microarchitecture definition, design specification, and performance-driven trade-off analysis. What We Need Own RTL design and microarchitecture development for a portion of a CPU block of a high-performance RISC-V CPU. Collaborate closely with DV, PD, and performance engineers to meet functional, timing, and power goals. Use innovative techniques to optimize power, performance, and

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking talented Physical Design Engineers to implement high-performance blocks for our industry-leading CPU and AI/ML architectures. You'll own the complete implementation flow from synthesis to tapeout, working alongside world-class engineers to push the boundaries of performance, power, and area. If you're passionate about crafting silicon that powers the future of AI computing and thrive on solving complex design challenges, we want you on our team. This role is hybrid , based out of Austin, TX, Santa Clara, CA or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on engineer with deep expertise in SOC/ASIC physical design and a track record of successful tapeouts. Passionate about optimizing PPA through innovative implementation techniques and close RTL collaboration. Strong problem solver who excels at debugging complex issues across design hierarchies. Collaborative team player who thrives in fast-paced, technically challenging environments. What We Need BS/MS/PhD in EE/ECE/CE/CS with proven experience in synthesis, PnR, and timing closure on taped-out designs. Expertise with industry-

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a Staff Forward Deployed Engineer who’s excited to build with the engineers using the AI computers Tenstorrent makes. You will create continuity between customers, engineering, and AI inference service products. This is an engineering role first: you contribute production code, operate deployments, and you can explain a trade-off to customer leadership as clearly as to core engineering teams. This is a high-autonomy role with direct customer impact. This role is remote, based out of North America, with preference near one of our main hubs: Santa Clara, CA; Austin, TX; or Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You understand how accelerator compute, memory, and networking topology constrain AI workloads, and don't treat hardware as a black box. You're an early adopter of AI for your work from coding to building agentic workflows that multiply your impact. You work directly with customers to understand their challenges and provide effective solutions. You are comfortable debugging across the full inference stack: from failing requests, through the serving layer, down to OOMs or kernel dispatch if n