Cpu Physical Design Engineer in India

An HSE (Health Safety and Environment) or Food Safety Manager in the food industry oversees plant compliance worker safety and product hygiene standards. Address: HITEX Exhibition Centre, Opp. Hitex Hall No 1, Survey Number 5, 6 to 5/12, Izzath Nagar, Kondapur, Hyderabad, Telanagana 500084 Facility: CPU HYDERABAD Qualification: 12th Experience: 7 - 8 years Source: Sodexo India | Job Code: IJP576108

A Multi Purpose Worker in the food industry handles various tasks across food preparation Kitchen operations and facility sanitation Depending on daily Production. Address: HITEX Exhibition Centre, Opp. Hitex Hall No 1, Survey Number 5, 6 to 5/12, Izzath Nagar, Kondapur, Hyderabad, Telanagana 500084 Facility: CPU HYDERABAD Qualification: 12th Experience: 1 - 2 years Source: Sodexo India | Job Code: IJP575991

A Multi Purpose Worker in the food industry handles various tasks across food preparation Kitchen operations and facility sanitation Depending on daily Production. Address: HITEX Exhibition Centre, Opp. Hitex Hall No 1, Survey Number 5, 6 to 5/12, Izzath Nagar, Kondapur, Hyderabad, Telanagana 500084 Facility: CPU HYDERABAD Qualification: 12th Experience: 1 - 2 years Source: Sodexo India | Job Code: IJP575990

A Demi Chef de Partie (DCDP) is a junior section chef who assists the Chef de Partie in running a specific station in a professional kitchen. Address: HITEX Exhibition Centre, Opp. Hitex Hall No 1, Survey Number 5, 6 to 5/12, Izzath Nagar, Kondapur, Hyderabad, Telanagana 500084 Facility: CPU HYDERABAD Qualification: 12th Experience: 3 - 4 years Source: Sodexo India | Job Code: IJP574674

NK Securities Research is a leading financial firm that leverages cutting-edge technology and sophisticated algorithms to trade the financial markets. Founded in 2011, we have gained invaluable experience in the field of High-Frequency Trading (HFT) across different asset classes. Role Overview We’re looking for engineers who can take AI work beyond experiments and make it hold up in production. You’ll work closely with quant researchers and infra engineers to build AI systems that actually get used improving research speed and internal tooling without slowing down the core stack. We value engineers who think about trade-offs, test what they build, and care about how things run in production. What You’ll Build Production AI Ship models that meet defined latency and reliability expectation Add monitoring, rollback, and guardrails before anything goes live Optimise inference across CPU/GPU environments when it matters Integration into Real Systems Plug AI into data-heavy workflows without hurting performance Work within existing low-latency architecture instead of fighting it Profile and remove bottlenecks rather than guessing AI for Engineers & Researchers Build tools that genuinely speed up research and development Improve code understanding, review workflows, and internal knowledge retrieval Keep systems auditable and predictable LLM & Retrieval Systems Implement structured RAG and embedding pipelines with validation in place Create safe integration layers between models and internal systems Performance & Standards Track latency, drift, and stability — not just accuracy Build observability into everything you ship Help raise the bar for how AI is engineered here What We’re Looking For Strong Python fundamentals Clear thinking around system design and performance trade-offs Experience deploying AI systems in production (1–5 years is typical) Familiarity with transformers, embeddings, or LLM deployment Nice to have: Exposure to C++ / Rust / Go E

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a Senior Accounts Payable Analyst to drive accurate, efficient AP operations and solve complex finance challenges. You’ll own AP quality, reconciliations, payments, and month-end activities while partnering across Finance and Procurement. Help us build smarter, scalable AP processes through automation, ERP, and AI-enabled workflows. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are 4+ years of Accounts Payable experience, ideally in a shared services/GCC environment, with strong exposure to PO/non-PO invoices, vendor reconciliations, AP aging and payment support. B.Com/BBA/BBM Finance or equivalent; M.Com, MBA Finance, CA Inter or CMA Inter is a plus. Strong attention to detail, ownership, communication skills and a solid understanding of AP controls, GST/TDS, payment terms and audit requirements. What We Need Own day-to-day AP quality control, review invoices and coding, resolve complex exceptions, blocked invoices, PO mismatches and vendor account discrepancies. Support payment proposals, AP aging, vendor reconciliations and month-end close while maintaining strong maker-ch

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking an experienced and motivated System IP RTL Design Lead to drive the definition and implementation of complex datacenter class IP for our next-generation semiconductor products. The ideal candidate possesses a deep understanding of System IP and SoC architecture, IP integration challenges, and is adept at leading a design team to deliver high-quality, scalable IP solutions. This role requires strong hands-on technical leadership, excellent communication skills, and a proven track record in the successful delivery of silicon IP. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned IP / SoC design leader with 20+ yrs of strong expertise in complex SoC architectures, high-speed protocols, and large-scale IP integration. Skilled in RTL design and debug (Verilog/SystemVerilog) with hands-on experience using industry-standard tools for simulation, synthesis, lint, CDC, and power analysis on high-frequency designs. Experienced in driving microarchitecture decisions, authoring design specifications, and performing complex PPA trade-off optimizations. A proactive problem so

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a hands-on RTL Design Engineer to own the microarchitecture and RTL implementation of the Power Management Subsystem/Interrupt Controllers/AXI Interconnect/Cache Controller . You’ll collaborate with cross-functional teams—architecture, firmware, software, DV, and PD—to define, design, and optimize power management solutions for next-generation RISC-V/ARM-based SoCs. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels. During the interview process, you will beevaluated and offered a level that aligns with your experience, which may differ from the one in this posting. Who You Are 5–10 years of experience in ASIC/SOC/IP design, with hands-on experience in microarchitecture and RTL development Skilled in Verilog/SystemVerilog and comfortable working across design, debug, and analysis Design and develop microarchitectures for a set of highly configurable IPs Microarchitecture and RTL coding ensuring optimal performance, power, area Work with verification teams on assertions, test plans, debug, coverage, etc. Deep understanding of power management concepts—clocking, reset, DVFS, and low-power modes Familiar with RISC-V or ARM-based SoCs and standard bus protocols (AXI, AHB, APB, CHI) Awareness of functional safety (ISO 26262) practices in hardware design What We Need Abil

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is building the future of AI compute, and this role will build the talent pipeline that makes it possible. As an Early Talent Recruiter, you will own university and early-career recruiting for your site, shaping which schools we invest in, building relationships with students and faculty, and leading intern, co-op, and new-grad hiring from first outreach through accepted offer. You will not simply run an existing campus calendar. You will decide where to focus, raise the quality of the funnel, and build the recruiting motion that our growing hardware and software teams need. This role is hybrid, based out of Tokyo, Japan, Bangalore, India, or New Taipei City, Taiwan. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have owned a full campus recruiting cycle, including school selection, university partnerships, sourcing, screening, interview coordination, offer management, and closing. You use judgment and influence to partner with hiring managers, challenge assumptions when needed, and hold a clear hiring bar without relying on authority. You work from funnel data and can connect measures such as applications, conversions

Envoy Global is a proven innovator in the global immigration space. Our mission combines our industry-leading tech platform with holistic service to streamline, simplify and expedite the immigration process for employers and individuals. We are looking for a highly skilled Lead Software Engineer to join our team on a full-time, permanent basis. In this role, you will lead the design and implementation of robust, scalable systems, provide technical direction to the team, and take ownership of end-to-end delivery. You will play a key role in building high-quality solutions across APIs, microservices, and integrations, while driving engineering excellence and best practices. As our Lead Engineer, you will be required to: Design, code, and unit test platform and integration components Develop frameworks for standardizing and enabling data flows via APIs, files, microservices, and message queues. Provide technical guidance to the team and take ownership of delivery Responsible to technically groom backlog items providing design, architecture, and implementation details Quality is the key driver to product engineering, ensure highly testable and quality deliverables To apply for this role, you should possess the following skills, experience and qualifications: Minimum 8+ years of strong programming experience on .NET platform, Microsoft Tech Stack Expertise in C#, ASP.NET Web API / Typescript / Angular (or any front-end framework or passion to learn Angular) Experience developing with containers, micro-services, and message queues Dedication to delivering high-performance, secure and scalable services Experience working with a wide variety of systems and integrating APIs from third parties Hands on experience with SQL and query optimization Analytical and troubleshooting skills to investigate and resolve issues Ability to dig through Memory, CPU and IO bottlenecks to improve performance and scalability Azure experience is a plus Knowledge and experience

... Address: HITEX Exhibition Centre, Opp. Hitex Hall No 1, Survey Number 5, 6 to 5/12, Izzath Nagar, Kondapur, Hyderabad, Telanagana 500084 Facility: CPU HYDERABAD Qualification: 12th Experience: 1 - 2 years Source: Sodexo India | Job Code: IJP568558

A store executive manages daily inventory stock movements and warehouse or retail floor operations to ensure materials or products are organized recorded and supplied efficiently Address: HITEX Exhibition Centre, Opp. Hitex Hall No 1, Survey Number 5, 6 to 5/12, Izzath Nagar, Kondapur, Hyderabad, Telanagana 500084 Facility: CPU HYDERABAD Qualification: 12th Experience: 2 - 3 years Source: Sodexo India | Job Code: IJP568226

... Address: HITEX Exhibition Centre, Opp. Hitex Hall No 1, Survey Number 5, 6 to 5/12, Izzath Nagar, Kondapur, Hyderabad, Telanagana 500084 Facility: CPU HYDERABAD Qualification: 12th Experience: 1 - 2 years Source: Sodexo India | Job Code: IJP567207

For over 20 years, Smartsheet has empowered teams to manage work seamlessly and scale solutions smarter. Now, in our most ambitious chapter yet, we are uniting human teams with AI agents. By orchestrating the work agents do best, automating manual tasks and uncovering insights at scale, we create the space for people to focus on what truly matters: judgment, creativity, and big thinking. That is magic at work, and it’s what we show up for every day. Job Description/ Responsibilities: Designing, developing and maintaining stable and reliable AI/ML Ops platforms / pipelines Minimum experience of 4-6 Years required in AI ML Ops Model Deployment: Package and deploy AI/ML services to production, ensuring they are reproducible and interpretable CI/CD Pipeline Development: Design and implement automated CI/CD (Continuous Integration/Continuous Deployment) pipelines to accelerate model deployment using tools Infrastructure Management: Provision and optimize infrastructure for training and serving, utilizing Docker, Kubernetes, or serverless platforms Monitoring & Observability : Implement post-deployment monitoring for model performance, data drift, and latency using tools. Experience in Monte Carlo is preferable Automation: Automate retraining and data pipeline workflows to ensure models stay accurate over time. Manage the deployment of foundation models, fine-tuning workflows, and Retrieval-Augmented Generation (RAG) stacks (Vector DBs, Knowledge Graph. Experience with AWS Bedrock is preferable Resource Optimization: Manage GPU/CPU utilization to minimize cloud costs while maintaining low-latency inference for users Collaboration: Work closely with data scientists, data engineers, and software engineers to bridge the gap between model development and production. Version Control & Governance: Manage versioning for data, code, and models using tools like MLflow. Security & Compliance: Implementing data security measures, ensuring compliance with data governance

Job Overview: We are seeking a high-caliber Rust Systems Engineer to design, build, and optimize high-throughput, low-latency backend systems and infrastructure. In this role, you will go beyond web APIs—tackling low-level performance bottlenecks, complex state management, parallel compute algorithms, and concurrent data processing pipelines. If you thrive on deterministic memory management, zero-cost abstractions, and writing safe, blazingly fast concurrent systems, this role is for you. Key Responsibilities: High-Performance Architecture: Design and implement zero-cost, high-throughput, low-latency engine components and data processing pipelines in Rust. Concurrent & Thread-Safe Systems: Build thread-safe, lock-free, or fine-grained locked data structures and state machines capable of scaling across multi-core architectures without race conditions. Priority & Real-Time Threading: Design custom thread pools, task schedulers, and execution queues with priority-based task scheduling and resource allocation controls. Algorithmic Optimization: Implement complex computational logic, including high-efficiency recursive algorithms, tail-call optimizations, and dynamic cache-friendly data structures. Resource & Memory Management: Leverage Rust’s ownership model, lifetime annotations, custom allocators, and non-blocking I/O to achieve predictable low-latency profiling (minimizing allocations and cash misses). System Profiling & Benchmarking: Conduct continuous benchmarking (criterion), flame graph analysis, memory profiling (Val grind/heap track), and CPU SIMD/vectorization optimizations. Key Skills: Core Rust & Functional Programming: Advanced Rust Mastery: Deep experience with Rust internals (stdsync, stdcell, custom Drop, unsafe Rust boundaries, and macro systems). Closures & Higher-Order Functions: Mastery of Rust’s functional traits (Fn, FnMut, FnOnce), capturing environments, move semantics within closures, and passing unboxed closures for zero