AI SOC Solutions Architect - Professional Services

Datadog’s Implementation Services team helps customers implement and deploy Datadog quickly. Our team of architects leads the discovery, design, build, and launch of the Datadog platform to help customers accelerate time to value and get the most out of their investment. As a member of our team, you will be responsible for developing the technical roadmap for a customer’s implementation, and leading them through it every step of the way. At Datadog, we place value in our office culture - the relationships and collaboration it builds and the creativity it brings to the table. We operate as a hybrid workplace to ensure our Datadogs can create a work-life harmony that best fits them. What You’ll Do: Design and guide execution of Datadog implementations, including gathering requirements, building technical architecture, and supporting deployment and launch Guide customer onboarding through co-development working sessions and assist when they run into roadblocks Write automation and design architecture for deployment templates Manage the operation of implementation projects Collaborate with other teams, including Customer Success, Technical Account Management, and Sales to deliver an exceptional onboarding experience Who You Are: Experience designing and delivering technical solutions for DevOps Monitoring or architecture systems Hands-on experience with cloud platforms (AWS, Azure, GCP) and compute technologies (EC2, serverless, VMware, VMs, Docker, Kubernetes). Experience with Config Management, IAC and CI/CD tools, including Ansible, Puppet, Terraform, Chef, Jenkins, Circle CI, GitHub Actions, Azure Pipelines, etc… Experience programming/scripting with any of the following: Java, Python, Ruby, Go, Node.JS, PHP, and .NET etc Background in security operations, including SOC management, SIEM tooling (e.g. Splunk Professional Services), and designing or supporting zero-trust networking architectures Successful track record with 6+ years exper

Datadog’s Implementation Services team helps customers implement and deploy Datadog quickly. Our team of architects leads the discovery, design, build, and launch of the Datadog platform to help customers accelerate time to value and get the most out of their investment. As a member of our team, you will be responsible for developing the technical roadmap for a customer’s implementation, and leading them through it every step of the way. At Datadog, we place value in our office culture - the relationships and collaboration it builds and the creativity it brings to the table. We operate as a hybrid workplace to ensure our Datadogs can create a work-life harmony that best fits them. What You’ll Do: Design and guide execution of Datadog implementations, including gathering requirements, building technical architecture, and supporting deployment and launch Guide customer onboarding through co-development working sessions and assist when they run into roadblocks Write automation and design architecture for deployment templates Manage the operation of implementation projects Collaborate with other teams, including Customer Success, Technical Account Management, and Sales to deliver an exceptional onboarding experience Who You Are: Experience designing and delivering technical solutions for DevOps Monitoring or architecture systems Hands-on experience with cloud platforms (AWS, Azure, GCP) and compute technologies (EC2, serverless, VMware, VMs, Docker, Kubernetes). Experience with Config Management, IAC and CI/CD tools, including Ansible, Puppet, Terraform, Chef, Jenkins, Circle CI, GitHub Actions, Azure Pipelines, etc… Experience programming/scripting with any of the following: Java, Python, Ruby, Go, Node.JS, PHP, and .NET etc Background in security operations, including SOC management, SIEM tooling (e.g. Splunk Professional Services), and designing or supporting zero-trust networking architectures Successful track record with 5+ years exper

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we’re building cutting-edge hardware and software solutions that power AI, HPC, and general-purpose workloads. As a Performance Architect on our Platform Architecture team, you’ll work across ML software stacks, compilers, CPU design, cache coherency protocols, and interconnect fabrics to shape the future of high-performance systems. This role is all about bridging software execution and silicon design—making data-driven decisions that directly influence our SoC performance. This role is remote, based out of The United States. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Passionate about solving complex system-level performance problems. Comfortable working across hardware and software boundaries. Analytical and data-driven, with a talent for turning workloads into architectural insights. Collaborative, thriving in cross-functional teams spanning compilers, CPU, and interconnect. Excited to shape the future of AI/HPC platforms through performance architecture. What We Need BS/MS/PhD in EE, ECE, CE, or CS Deep understanding of NoC topologies, routing algorithms, QoS, and traffic scheduling. Expertise in cache coherenc

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are seeking an experienced SoC Architect to lead the definition and development of next-generation custom AI silicon for edge deployments. This role will be responsible for shaping the architecture of highly efficient, high-performance SoCs optimized for machine learning inference and on-device intelligence. You will work cross-functionally with internal engineering teams and external ecosystem partners to translate product requirements into scalable silicon solutions, driving execution from concept through delivery. In this role you will: Define the architecture and technical roadmap for custom SoCs targeted for edge applications. Drive system-level tradeoff analysis across compute, memory, interconnect, power, thermal, and cost constraints. Architect energy-efficient ML compute subsystems optimized for inference workloads and real-world deployment environments. Collaborate with internal hardware, software, systems, and product teams to align architecture with platform needs. Partner with external silicon vendors, IP providers, and manufacturing partners to execute development plans. Lead hardware/software co-design efforts to maximize performance per watt and end-to-end system efficiency. Guide implementation teams through microarchitecture, RTL development, validation, and bring-up phases. Operate effectively in agile development environments and help teams deliver against aggressive schedules and milestones. You might thrive in this role if: Proven exper

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Interested in changing the landscape of artificial intelligence workloads? Join our team where we are building next-generation, high-bandwidth memory products. In Micron's High Bandwidth Memory Architecture organization, we partner closely with customers to deliver memory solutions purpose-built for emerging AI systems and applications. As a Member of Technical Staff, SoC Power and Physical Architect in the Next-generation HBM Architecture Team, you will drive SoC-level specification 3D-stacked, high-performance memories. Apply your knowledge to analyze SoC trade-offs in close collaboration with peer architecture and design teams. Drive power architecture, physical planning, and early SoC design activities, including definition of IP interfaces (e.g., signals, power delivery), clocking, power sequencing, design-for-test, floorplanning, and specification development. Responsibilities: Define clocking architectures, power sequencing, power delivery, and on-die signal interfaces. Define and analyze on-die power delivery networks (PDN) and full-chip thermal implications, including power hot-spot identification and mitigation. Define DFT architectures (e.g., scan chain topology) and set verification requirements. Define SoC floorplans in collaboration with physical designers. Compose and maintain clear SoC physical documentation. Preferred Qualifications: Experie

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The DRAM Architecture team is responsible for defining the system‑level and silicon‑level architectures that enable Micron’s memory products. The team works across technology generations and product lines, collaborating with design, product, systems, and ecosystem partners to deliver scalable, reliable, and high‑performance memory solutions aligned with customer and market needs. This role provides senior‑level architectural leadership to help shape Micron’s next‑generation DRAM products. As a Distinguished Member of Technical Staff, you will influence memory architecture decisions across semiconductor chips, assembly methods, component units, and system interfaces, contributing to both near‑term product execution and long‑term technology direction. This role requires AI proficiency or AI‑enabled ways of working. Responsibilities: • Define and evolve DRAM system architectures that address performance, capacity scaling, reliability (RAS), and observability requirements. • Collaborate across functions to evaluate architectural trade‑offs spanning DRAM silicon, packaging, modules, boards, and system platforms. • Influence host memory controller and platform architecture through technical engagement with CPU, GPU, and SoC partners. • Contribute to RAS and telemetry feature definition, translating system‑level needs into implementable architectural concepts. • Support exploration of emerging memory technologies and assess their impact on future product roadmaps. • Engage with cus