Architect- Subsystem

About the job Shape the SoC architecture behind Graphcore's next generation of AI acceleration platforms. Graphcore is expanding its Silicon Architecture Team in Bristol to deliver complex AI compute platforms. As a SoC Architect, you will define how critical subsystems are specified, modelled and integrated. You will turn product requirements into architecture choices across interfaces, interconnect, memory and platform behaviour. Your work will guide implementation, validation and trade-offs across multiple chip programmes. You will work with processor, SoC and system architects, plus design, verification, hardware and software teams. Together, you will evaluate IP, resolve integration questions and support silicon bring-up where needed. This is a rare chance to influence real AI silicon while Graphcore scales its contribution to SoftBank Group's AI ecosystem. The team and culture The team owns SoC architecture, subsystem modelling and system-level trade-offs across future AI acceleration platforms. Work moves from requirements to specifications, models, reviews and guidance for implementation teams. People here are expected to take responsibility early and keep decisions moving. You will speak directly with adjacent teams to clarify constraints, challenge assumptions and close open questions. Decisions are made through technical evidence, clear specifications and direct cross-functional discussion. The team values people who think big, act fast and speak up when architecture needs sharper choices. What we're looking for • Experience specifying or architecting complex SoC devices or subsystems. • Strong understanding of computer architecture, SoC integration, RTL development and verification processes. • Ability to turn product requirements into clear technical specifications and practical design trade-offs. • Software development capability, ideally with Python, C++, Rust or architecture modelling experience. • Knowledge of PCIe, LPDDR, DDR, E

About the job Shape the SoC architecture behind Graphcore’s next generation AI acceleration platforms. Graphcore is building AI compute systems that push far beyond a single chip. As a SoC Architect, you will define, specify and integrate critical subsystems for complex silicon devices. You will work across processor, SoC and system architecture to turn product requirements into practical design choices. Your work will influence performance, integration, modelling, validation and bring-up. This role is for someone who enjoys deep technical ownership and broad system context. You will help Graphcore deliver multiple AI silicon projects in parallel, at real scale. You will work on interfaces, interconnects and SoC subsystems that sit at the centre of advanced AI platforms. The problems are complex, visible and difficult to find elsewhere. The team and culture The Silicon Architecture team sits at the point where product ambition becomes silicon reality. Architects work closely with design, verification, hardware, software and systems teams. The team is growing because the scope is expanding. You will own meaningful technical areas, move quickly on decisions and keep momentum across groups. Ideas are tested through modelling, specification, discussion and evidence. People are expected to speak up, take responsibility and help others move faster. What we're looking for · Strong understanding of computer architecture, SoC architecture or complex silicon systems · Experience writing clear technical specifications for engineering teams · Knowledge of RTL development, verification processes or logical design · Ability to work across architecture, design, verification, hardware and software teams · Domain knowledge in areas such as PCIe, DDR, LPDDR, Ethernet or on-chip networks · Motivation to take ownership, mentor others and drive practical decisions Benefits Flexible working: Balance your work and personal life with great

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a System Architect in Advanced System Architecture Group at Micron Semiconductor Products, Inc., you will work with the memory industry's leading architecture team on new concepts that will craft the future of electronic systems around AI, servers, and mobile systems. You should be able leverage Artificial Intelligence for driving the processes and build next gen solutions with AI Supported frameworks. Your Responsibilities Will Include, But Are Not Limited To Delivering architectures and innovative solutions to optimize power and performance of next-generation memory and storage subsystems. Working with design and system architecture teams to identify key system requirements, seek the current bottlenecks and propose novel solutions for a wide range of applications. These activities will entail: Performing system-level simulations of innovative architectures to compare with existing design paradigms, using both open and closed-loop system performance analysis. Developing models of new controllers, components, memory devices, interconnects, and processors. Capturing, benchmarking, analyzing applications and their corresponding memory and storage access patterns. The scope of this analysis will span from the low-level software stack (operating system, drivers, etc…) down to the hardware and firmware controllers. You should have very strong knowledge of computer architecture and deep understanding sophisticated blocks such as caches, interconnects,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: • Own and deliver critical HBM IO blocks and subsystems from architectural definition through circuit and RTL implementation, verification, tape-out, silicon bring-up, and post-silicon debug, including interfaces supporting future CPO systems. • Define HBM PHY, controller-to-PHY, die-to-die, clocking, training, calibration, power-management, error-handling, and test requirements for advanced heterogeneous systems. • Drive robust, high-performance builds by balancing bandwidth, latency, power, area, reliability, electrical signal quality, power stability, yield, and manufacturability trade-offs. • Lead architecture and design of analog, mixed-signal, and digital interface functions used in high-speed memory subsystems. • Partner with package, interposer, physical design, signal integrity, power integrity, and thermal teams to optimize interface implementation across 2.5D and 3D systems. • Lead root-cause analysis and resolution of complex pre-silicon and post-silicon issues across circuit design, RTL, architecture, process, package, interposer, and system interactions. • Serve as technical project lead for one or more advanced interface programs, coordinating execution across architecture, design, layout, verification, validation, packaging, test, and product engineering teams. • Define and communicate technical priorities, interface specifications, execution plans, risks, dependencies, and schedule impacts. • Work with internal teams, customers, IP pr

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are seeking an experienced SoC Architect to lead the definition and development of next-generation custom AI silicon for edge deployments. This role will be responsible for shaping the architecture of highly efficient, high-performance SoCs optimized for machine learning inference and on-device intelligence. You will work cross-functionally with internal engineering teams and external ecosystem partners to translate product requirements into scalable silicon solutions, driving execution from concept through delivery. In this role you will: Define the architecture and technical roadmap for custom SoCs targeted for edge applications. Drive system-level tradeoff analysis across compute, memory, interconnect, power, thermal, and cost constraints. Architect energy-efficient ML compute subsystems optimized for inference workloads and real-world deployment environments. Collaborate with internal hardware, software, systems, and product teams to align architecture with platform needs. Partner with external silicon vendors, IP providers, and manufacturing partners to execute development plans. Lead hardware/software co-design efforts to maximize performance per watt and end-to-end system efficiency. Guide implementation teams through microarchitecture, RTL development, validation, and bring-up phases. Operate effectively in agile development environments and help teams deliver against aggressive schedules and milestones. You might thrive in this role if: Proven exper

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Hardware Emulation Architect on the HBM architecture team you will be responsible for architecting, enabling, and deploying hardware emulation capabilities for next generation HBM products. You will work with design, verification, firmware, and system teams to determine emulation needs and opportunities. You will drive the development of hardware emulation ecosystem including procurement of hardware emulation platforms, creation of emulation testbenches and transactors, and development of emulation friendly verification IP. You will be responsible for proactively developing emulation capabilities to meet the needs of current and future products. You will also lead the effort to enable and integrate AI-driven tools and AI-enabled workflows into the team's methodologies. Responsibilities will include, but are not limited to: Develop and maintain hardware emulation environments for complex SoCs and subsystems. Compile, configure, and debug large-scale RTL designs on emulation platforms (e.g., Palladium, Veloce, Zebu). Support pre-silicon validation, firmware bring-up, and early software development using emulation. Debug functional, performance, and connectivity issues across RTL, firmware, and system layers. Work closely with design, verification, firmware, and architecture teams to enable rapid debug and issue resolution. Create emulation testbenches, transactors, and models for system-level use cases. Enable hybrid validation flows (simulation + emulation