CAD & Graphic Designer

Where Performance Meets Purpose Join a team that values excellence and innovation, at a company known for its iconic golf brands. At Acushnet Company, your background and experience contribute to creating the best products for dedicated golfers worldwide. Here, your performance has purpose. What You Will Be Doing The Senior Associate Product Designer plays a key role in bringing innovative, performance‑driven products to life across the Titleist Gear, Club Glove, and Links & Kings franchises. Working under the guidance of the Design Manager and Senior Designers, this role contributes to the creation, development, and refinement of new product concepts using a blend of art, design, graphic, and 2D/3D CAD skills. The position collaborates closely with cross‑functional product design and development teams to translate form, function, and brand intent into commercially viable solutions that align with critical timelines. Through hands‑on concepting, prototyping, research, and documentation, the Senior Associate Product Designer supports IP efforts, participates in design critiques and vendor engagements, and continually expands technical and creative expertise. With a strong passion for golf and travel gear, this role helps drive thoughtful design, material innovation, and visual storytelling that elevate product performance and presentation from inspiration through commercialization. When submitting your resume, please also include a cover letter describing why the golf industry inspires you and what motivates you to pursue a career with the Acushnet Company. What You Bring B.S. or B.A. Product Design or a closely related field. 1–3 years of professional experience in product design or a related

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work , to amplify human imagination and intelligence. Make the choice to join us today. Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips. What you'll be doing: As a member in our team, you will own and work with cross functional teams, implementing state-of-the-art designs in test access mechanisms, IO BIST, memory BIST and scan compression. In addition, you will help develop and deploy DFT methodologies for our next generation products. You will have the chance to define, prototype and deploy next generation DFX architectures and methodologies across all our products. This includes high speed test access architectures, the in-system-test architecture, ISO26262 functional safety diagnostic for in-field testing and beyond, silicon debug & bring-up, productization, and silicon life-cycle management among others As a member on our DFX Architecture team, your responsibility will be to craft key DFX architecture and methodologies to meet system level safety diagnostic test quality, in-field test quality, advanced defect screening and diagnosis to enable SLM for automotive, industrial, and robotics safety platforms etc. Collaborate with multi-functional teams like system architecture, chip architecture, ASIC design, verification, CAD, VLSI,

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today. NVIDIA’s DFX team is looking for an exceptional DFT Engineer to help shape the future of compute. As stewards of the entire Scan Test Lifecycle, we drive innovation for the most advanced silicon in the world—spanning 2.5D/3D AI data center platforms, Gaming and Enterprise GPUs, and complex SOCs powering Autonomous Machines, Robotics, and Industrial systems. You will innovate at scale, designing and prototyping breakthrough Test Architectures for reticle sized, multi-chiplet products—from RTL to verification to post-silicon ATE bring-up. Join a globally recognized team that consistently delivers breakthrough performance across multiple high-impact tape-outs each year. What you'll be doing: Develop and deploy Industry-leading test methodologies on NVIDIA’s next-generation silicon platforms. Collaborate with leading EDA vendors to shape tool capabilities that meet NVIDIA’s ambitious design goals, and partner with internal CAD teams to drive scalable, automated solutions. Co-architect novel DFT strategies alongside VLSI and Product Engineering teams to push the boundaries of silicon test innovation. Own the full ATPG lifecycle—verification, coverage analysis, pattern generation, and ATE bring-up—across NVIDIA’s full product portfolio. Guide and mentor junior engineers, helping them navigate complex design

We are looking for a Sr. ASIC Design Engineer! NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have developed an outstanding team stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. What you'll be doing: You will document, implement, and deliver fully verified, high performance, area and power efficient RTL to achieve the design targets and specifications. Your responsibilities will include architecture and micro-architecture design, RTL design and synthesis, and logic and timing verification using pioneering CAD tools and semiconductor process technologies. In addition to the design role, you will participate in the verification of the design using sophisticated verification methodologies. You are expected to help define the verification scope and support the development of verification infrastructure. You will collaborate with several ASIC development teams and will need to communicate and coordinate with members of those teams, some of whom are in remote locations. What we need to see: A Bachelors or Masters Degree (or equivalent experience) 5+ years of relevant / meaningful work experience Proven hardware engineering background with a concentration in VLSI and Computer Architecture Expertise in Verilog, System Verilog or similar HDL. Proficient programming in Perl/Python

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we are transforming how the world uses information to enrich life. The High Bandwidth Memory (HBM) Design team develops industry-leading memory solutions that enable advances in Artificial Intelligence, high-performance computing, graphics, and data-center applications. Our engineers collaborate across global teams to deliver innovative memory architectures and semiconductor technologies that power next-generation computing systems. As an HBM Design Engineer Intern, you will work alongside experienced memory engineers and gain hands-on experience in semiconductor design, simulation, verification, and analysis. This internship provides exposure to industry-standard design methodologies, EDA tools, and cross-functional collaboration throughout the product development lifecycle. You will also have opportunities to apply AI-Assisted and AI-Enabled workflows to improve engineering productivity, debug efficiency, and design quality. Responsibilities Assist with the design, simulation, analysis, and verification of HBM memory and logic circuits using industry-standard semiconductor design tools. Support RTL development, circuit implementation, timing analysis, power analysis, and functional validation activities. Develop scripts, automation solutions, and AI-Assisted workflows to improve design productivity, debug efficiency, and design-flow quality. Collaborate with Design, Verification, Physical Design, CAD, and Product Engineering teams on technical reviews, debug activities, and project deliv

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we are transforming how the world uses information to enrich life. The High Bandwidth Memory (HBM) Design team develops industry-leading memory solutions that enable advances in Artificial Intelligence, high-performance computing, graphics, and data-center applications. Our engineers collaborate across global teams to deliver innovative memory architectures and semiconductor technologies that power next-generation computing systems. As an HBM Design Engineer Intern, you will work alongside experienced memory engineers and gain hands-on experience in semiconductor design, simulation, verification, and analysis. This internship provides exposure to industry-standard design methodologies, EDA tools, and cross-functional collaboration throughout the product development lifecycle. You will also have opportunities to apply AI-Assisted and AI-Enabled workflows to improve engineering productivity, debug efficiency, and design quality. Responsibilities Assist with the design, simulation, analysis, and verification of HBM memory and logic circuits using industry-standard semiconductor design tools. Support RTL development, circuit implementation, timing analysis, power analysis, and functional validation activities. Develop scripts, automation solutions, and AI-Assisted workflows to improve design productivity, debug efficiency, and design-flow quality. Collaborate with Design, Verification, Physical Design, CAD, and Product Engineering teams on technical reviews, debug activities, and project deliv