Instructional Systems Designer

At Vanta, our mission is to help businesses earn and prove trust. We believe that security should be monitored and verified continuously, and we empower companies to practice better security and prove it with ease. Vanta has a kind and talented team, and while some have prior security experience, many have been successful at Vanta without it. You will build the operating system for EPD — the systems, agents, and practices that make engineering, product, and design unreasonably effective at delivery, with Jira as the substrate. The EPD Systems team is building the infrastructure Vanta's engineering, product, and design organization depends on to understand itself and operate well. We're constructing three interlocking layers: sources of truth at the foundation, a shared interpretive layer that reasons across all of them, and the operating system that makes the work itself legible. This role owns the operating system. This is not a traditional PMO or status-reporting role. You build — agents, automation, workflow design, and the practices that make teams want to use the system rather than route around it. What you’ll do as a Senior Systems Designer at Vanta: Design and own workflow and hierarchy across engineering, product, and design in Jira Make sure Jira reflects real practice, and real practice reflects what needs to show up in Jira — in both directions Build the agents and automation that run the system yourself, with AI as part of how you work Drive adoption: go to the teams whose practice doesn't match the substrate today and change that — through conversation, well-built artifacts, or clear instruction that works without you in the room Understand delivery breakdowns at the mechanism level and build fixes that address the root cause, not the symptom Build alongside teammates who are growing into more technical work — raise their ceiling, not just your own output How to be successful in this role: You build and ship, recently, with AI as part of how you work. "

About the Team The ChatGPT organization at OpenAI supports our mission by bringing advanced AI capabilities to hundreds of millions of users worldwide. The Image Generation team is responsible for one of the fastest-growing experiences in ChatGPT, enabling users to create, edit, and transform images through natural language. Recent advances in our multimodal image models have dramatically improved image quality, instruction following, editing precision, consistency, and text rendering, unlocking entirely new creative and professional workflows. We work at the intersection of research, infrastructure, and product to build the systems that power image generation at global scale. Our team partners closely with researchers, product engineers, designers, and platform teams to bring state-of-the-art image capabilities to millions of users while continuously pushing the boundaries of what AI-powered creation can do. About the Role We are looking for an experienced Backend Engineer to join the Image Generation team and help build the systems that power image creation and editing across ChatGPT. You'll work on the core backend infrastructure that enables users to generate, edit, and iterate on visual content using cutting-edge multimodal AI models. This includes building highly scalable services, orchestration systems, APIs, storage platforms, and distributed infrastructure that support billions of image generations and editing workflows. You'll partner closely with product, research, and mobile teams to transform breakthrough AI capabilities into reliable, performant experiences used by millions around the world. In this role, you will: Design, build, and operate backend systems that power image generation and image editing experiences in ChatGPT. Develop scalable APIs, services, and infrastructure that support multimodal AI workflows. Optimize reliability, latency, throughput, and cost across large-scale distributed systems. Partner with researchers to productionize new im

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Design Verification Engineer to contribute to the unit-level verification of our RISC-V CPU front end—including instruction fetch, branch prediction, and surrounding fetch control structures. As a key individual contributor within our front-end DV team, you will focus on building testbenches, generating stimulus, and developing checkers for complex microarchitectural scenarios. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Front-End Experience: Solid background verifying CPU front-end blocks—such as instruction fetch, branch predictors (BTB, TAGE, RAS), instruction caches/TLBs, or decode—using SystemVerilog, UVM, and C++. Unit-Level Focus: Hands-on experience building clean, controllable unit testbench environments with precise stimulus and checking. Reusable Design: Pragmatic approach to building transactors, predictors, and scoreboards that can be reused across verification levels. Collaborative Problem Solver: Comfortable working alongside RTL designers to trace and fix misspeculation, redirect, and edge-case fetch bugs. What We Need Unit-Level Verifica

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Our Tensix Team is building the future of AI compute with a ground-up architecture centered on scalable RISC-V processors. As we push performance boundaries, we’re reimagining the frontend of our RISC-V cores to deliver major gains in programmability, efficiency, and developer experience. This is a rare opportunity to shape the CPU architecture at the heart of our AI platform and lead one of the most strategic technical efforts at Tenstorrent. This role is hybrid, based out of Toronto, ON, Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced Microarchitect: 10+ years of deep expertise in CPU performance modeling and microarchitecture design. AI Workload Expert: Deeply familiar with the computational and memory bottlenecks of modern AI workloads, particularly Large Language Models (LLMs). Hardware-Software Co-Designer: Driven to architect custom instruction set extensions and validate their performance gains against real-world workloads. Ways to stand-out: Familiarity with open-source RISC-V cores, AI-based agentic workflow experience What We Need Profile & Analyze: Dissect cutting-edge AI workloads to identi

Embedded Firmware and Software Engineer Description - This role is responsible for driving design, development, and debugging of embedded software/firmware for hardware, ensuring efficient and reliable operation. The role collaborates with hardware engineers to integrate software and firmware with hardware components, ensuring seamless communication and functionality. The role works closely with software developers, hardware engineers, quality assurance, and product managers to deliver high-quality products. Responsibilities Owns the preparation and creation of instructional technical manuscripts for firmware operation. Allocates resources to complete programming projects, and designing detailed plans to ensure firmware is functioning properly. Designs enhancements, updates, and programming changes for portions and subsystems of firmware, including DSP, embedded code, EFI drivers, EFI applications and BIOS/UEFI. Analyzes design and determines coding, programming, and integration activities required based on general objectives and knowledge of overall architecture of product or solution. Writes and executes complete testing plans, protocols, and documentation for assigned portion of application; creates solutions for issues with code and integrates into application architecture. Leads a project team of other software firmware engineers and internal and outsourced development partners to develop reliable, cost effective and high quality solutions for assigned systems portion or subsystem. Collaborates and communicates with management, internal, and outsourced development partners regarding firmware design status, project progress, and issue resolution. Represents the software firmware engineering team for all phases of larger and more-complex development projects, from microarchitecture design thro

Replit is the agentic software creation platform that enables anyone to build applications using natural language. With millions of users worldwide, Replit is democratizing software development by removing traditional barriers to application creation. Replit is building a modern, AI-native learning function, and we're looking for a Sr. Learning Experience Lead to own it. You'll own our learning platform and the onboarding and enablement experiences that run on it: designing them, delivering them, turning them into durable on-demand learning, and proving they work. This is a builder-leader role. You'll design learning, facilitate it live, build it into the platform, and measure its impact, and you'll do much of that hands-on, in the tools, the way a modern builder works. You'll start close to home and grow the mandate. Your initial focus is owning the onboarding experience for our Support organization, taking it end-to-end and turning it into a real, tracked, repeatable system. Over time, you'll elevate onboarding and enablement beyond Support to the broader company, partnering with our People team, with the learning platform as the vehicle. What You'll Do Own the learning platform. As its DRI, you own the roadmap, the learning journeys, and the instructional design behind them. You make the calls and own the outcomes. Support onboarding, end-to-end. Facilitation, the live-to-on-demand pipeline, and the role-based journeys that get new team members confident and productive fast. Create content and learning plans. Prescriptive learning paths and the content that fills them. Own measurement criteria and data-driven results: The layer that proves onboarding and enablement change behavior and speed ramp, not just completion rates, with the tracking and feedback loops that keep it healthy over time. As the mandate grows. Grow the platform and the learning function as adoption expands, raising the bar for how people learn at Replit. Required Skills & Experience Deep L&