Intern - NAND Wafer Reliability

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Location Singapore Department NAND Product Engineering, Probe Product Engineering Project Title AI-Enabled Wafer Probe Test Optimization and Yield Analytics Project Description The NAND Probe Product Engineering Intern will undertake an engineering project focused on wafer probe testing, silicon characterization, yield analysis, and test optimization. Working under the guidance of experienced Product Engineers, the intern will study how probe test strategies are developed and evaluated across product development and manufacturing phases. The project provides exposure to advanced NAND semiconductor technologies, wafer-level testing, statistical data analysis, yield improvement methodologies, and Artificial Intelligence-enabled engineering workflows. The intern will collaborate with cross-functional teams, including Design, Design for Test, Design Validation, Process Integration, Backend Test, Reliability, and Manufacturing Engineering. Objective of the Project Develop an understanding of wafer probe testing and its role in NAND product development and manufacturing. Evaluate probe test data to identify yield patterns, product behavior, and test optimization opp

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Location Singapore Department Product Engineering Project Title Machine Learning and Agentic AI Solutions for Semiconductor Product Engineering Project Description The Product Engineering Machine Learning and Agentic AI Intern will undertake an engineering project focused on applying Artificial Intelligence to semiconductor yield analysis, test optimization, data processing, and workflow automation. Working under the guidance of experienced Product Engineers and Citizen Data Scientist mentors, the intern will develop Machine Learning models, explore Agentic AI solutions, and evaluate engineering data from probe, wafer, test, and manufacturing processes. The project provides hands-on exposure to structured data analytics, Artificial Intelligence agents, engineering automation, and production-oriented AI applications in a semiconductor environment. Objective of the Project Develop Machine Learning solutions for semiconductor yield, reliability, test-time, or cycle-time improvement. Explore Agentic AI applications that automate selected engineering analysis and documentation workflows. Transform high-volume semiconductor datasets into structur

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Location Micron F10, 1 North Coast Drive. Department Process and Equipment Engineering (Diffusion) Project Title F10 CMOS Matching and RegE Wafer Edge Exclusion Programme Project Description The Process and Equipment Engineering Intern will participate in an engineering project focused on CMOS matching analysis and wafer edge yield enhancement within advanced semiconductor manufacturing processes. Working alongside Process and Equipment Engineers, the intern will gain hands-on exposure to yield learning methodologies, inline process monitoring, defect characterization, and data-driven manufacturing optimization. The project provides opportunities to investigate process variations, evaluate wafer edge performance, and develop analytical solutions that enhance manufacturing quality and yield performance. The project combines semiconductor process engineering fundamentals with advanced data analytics, automation, and AI-enabled engineering tools to accelerate learning, improve engineering efficiency, and drive fact-based decision making. The internship provides exposure to: Semiconductor manufacturing processes and process integration. Yield analysis, defect characterization, and process m

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Location F10N, 1 North Coast Drive, Singapore 757432 Department Non-Volatile Memory Test Engineering Project Title AI-Driven Test Engineering Automation and Analytics for NAND Products Project Description As an Intern Test Solutions Engineer in Non-Volatile Memory Test Engineering, you will work on advanced semiconductor test engineering projects focused on NAND memory product development, manufacturing test optimization, and Artificial Intelligence-enabled engineering automation. The project provides hands-on exposure to wafer probe, burn-in, and assembly test solutions used in high-volume semiconductor manufacturing environments. You will collaborate with experienced test engineers and cross-functional teams to develop analytical and automation solutions that improve test quality, engineering productivity, cost efficiency, and decision-making. Through this project, you will apply data analytics, machine learning, scripting, and software development techniques to real engineering challenges while developing practical knowledge of semiconductor memory testing. Objective of the Project Develop data analytics and Artificial Intelligence-enabled solutions for NAND test engineer

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Project Title F10N/W CMOS Matching and RegE Wafer Edge Exclusion (WEE) Program Role Overview The intern will be responsible for driving yield improvement initiatives through CMOS matching analysis and RegE Wafer Edge Exclusion (WEE) program. The role focuses on identifying inline mismatches, reducing wafer edge-related yield loss, and developing robust analytical solutions to enable sustainable manufacturing performance. Key Responsibilities F10 N/W CMOS Matching Conduct fab to fab offload interaction studies to identify and diagnose inline mismatches between N and W processes that contribute to yield differences. Perform detailed bevel characterization to assess defectivity performance differences and quantify their impact on inline die loss. Analyze cross-module data to establish root cause relationships between process variation and yield performance. RegE Wafer Edge Exclusion (WEE) Program Drive key WEE performance metrics, including 22UE capability and 1H edge coat performance, to maximize overall yield. Identify, troubleshoot, and mitigate

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Location Singapore Department NAND Probe Product Engineering Project Title AI-Enabled Test Mode Innovation and Integration Project Description The NAND Probe Product Engineering Intern will undertake a structured learning and innovation project focused on test mode development concepts, silicon validation methodologies, and AI-Enabled engineering solutions for advanced NAND technologies. Working alongside experienced Product and Design Engineers, the intern will develop knowledge of NAND test methodologies, Design for Test (DFT) concepts, and silicon validation processes. This internship combines semiconductor engineering fundamentals with Artificial Intelligence, data analytics, automation, and Generative AI technologies, providing an opportunity to explore how AI-Enabled tools and Agentic AI solutions can enhance engineering learning, technical knowledge discovery, test effectiveness, and innovation. Objective of the Project The intern will have the opportunity to: Develop an understanding of NAND architecture, probe testing concepts, Design for Test methodologies, and test mode integration practices. Explore engineering datasets to identify product behaviour